Convert PWM period and duty cycle to u64
Subsystems (16)
v10 cover Convert PWM period and duty cycle to u64
Because period and duty cycle are defined in the PWM framework structs as ints with units of nanoseconds, the maximum time duration that can be set is limited to ~2.147 seconds. Consequently, applications desiring to set greater time periods via the PWM framework are not be able to do so - like, for instance, causing an LED to blink at an interval of 5 seconds.
Redefining the period and duty cycle struct members in the core PWM framework structs as u64 values will enable larger time durations to be set and solve this problem. Such a change to the framework mandates that drivers using these struct members (and corresponding helper functions) also be modified correctly in order to prevent compilation errors.
This patch series introduces the changes to all the drivers first, followed by the framework change at the very end so that when the latter is applied, all the drivers are in good shape and there are no compilation errors.
Changes from v9:
- Gathered the received "Reviewed-by: " tag
- Added back the clk-pwm.c patch because kbuild test robot complained [3] and addressed received review comments.
- clps711x: Addressed review comments.
Changes from v8:
- Gathered all received "Acked-by: " and "Reviewed-by: " tags
- Dropped patch to clk-pwm.c for reasons mentiond in [2]
- Expanded audience of unreviewed patches
Changes from v7:
- Changed commit messages of all patches to be brief and to the point.
- Added explanation of change in cover letter.
- Dropped change to pwm-sti.c as upon review it was unnecessary as struct pwm_capture is not being modified in the PWM core.
Changes from v6:
- Split out the driver changes out into separate patches, one patch per file for ease of reviewing.
Changes from v5:
- Dropped the conversion of struct pwm_capture to u64 for reasons mentioned
in https://www.spinics.net/lists/linux-pwm/msg11541.html
Changes from v4:
- Split the patch into two: one for changes to the drivers, and the actual switch to u64 for ease of reverting should the need arise.
- Re-examined the patch and made the following corrections:
* intel_panel.c:
DIV64_U64_ROUND_UP -> DIV_ROUND_UP_ULL (as only the numerator would be 64-bit in this case).
* pwm-sti.c:
do_div -> div_u64 (do_div is optimized only for x86 architectures, and div_u64's comment block suggests to use this as much as possible).
Changes from v3:
- Rebased to current tip of for-next.
Changes from v2:
- Fixed %u -> %llu in a dev_dbg in pwm-stm32-lp.c, thanks to kbuild test robot
- Added a couple of fixes to pwm-imx-tpm.c and pwm-sifive.c
Changes from v1:
- Fixed compilation errors seen when compiling for different archs.
v1:
- Reworked the change pushed upstream earlier [1] so as to not add an extension to an obsolete API. With this change, pwm_ops->apply() can be used to set pwm_state parameters as usual.
[1] https://lore.kernel.org/lkml/20190916140048.GB7488@ulmo/
[2] https://lore.kernel.org/lkml/[email protected]/
[3] https://www.spinics.net/lists/linux-pwm/msg11906.html
Guru Das Srinagesh (12):
drm/i915: Use 64-bit division macro
hwmon: pwm-fan: Use 64-bit division macro
ir-rx51: Use 64-bit division macro
pwm: clps711x: Cast period to u32 before use as divisor
pwm: pwm-imx-tpm: Use 64-bit division macro
pwm: imx27: Use 64-bit division macro and function
pwm: sifive: Use 64-bit division macro
pwm: stm32-lp: Use %llu format specifier for period
pwm: sun4i: Use 64-bit division function
backlight: pwm_bl: Use 64-bit division function
clk: pwm: Assign u64 divisor to unsigned int before use
pwm: core: Convert period and duty cycle to u64
drivers/clk/clk-pwm.c | 4 +++- drivers/gpu/drm/i915/display/intel_panel.c | 2 +- drivers/hwmon/pwm-fan.c | 2 +- drivers/media/rc/ir-rx51.c | 3 ++- drivers/pwm/core.c | 4 ++-- drivers/pwm/pwm-clps711x.c | 5 ++++- drivers/pwm/pwm-imx-tpm.c | 2 +- drivers/pwm/pwm-imx27.c | 5 ++--- drivers/pwm/pwm-sifive.c | 2 +- drivers/pwm/pwm-stm32-lp.c | 2 +- drivers/pwm/pwm-sun4i.c | 2 +- drivers/pwm/sysfs.c | 8 ++++---- drivers/video/backlight/pwm_bl.c | 3 ++- include/linux/pwm.h | 12 ++++++------ 14 files changed, 31 insertions(+), 25 deletions(-)
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 1/12 drm/i915: Use 64-bit division macro
Since the PWM framework is switching struct pwm_state.duty_cycle's datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL to handle a 64-bit dividend.
--- drivers/gpu/drm/i915/display/intel_panel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/i915/display/intel_panel.c +1 -1
@@ -1868,7 +1868,7 @@ static int pwm_setup_backlight(struct intel_connector *connector, panel->backlight.min =0 ;/* 0% */ panel->backlight.max =100 ;/* 100% */ - panel->backlight.level =DIV_ROUND_UP ( + panel->backlight.level =DIV_ROUND_UP_ULL (pwm_get_duty_cycle (panel->backlight.pwm) *100 ,CRC_PMIC_PWM_PERIOD_NS ); panel->backlight.enabled = panel->backlight.level !=0 ;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 2/12 hwmon: pwm-fan: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL to handle a 64-bit dividend.
--- drivers/hwmon/pwm-fan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/hwmon/pwm-fan.c +1 -1
@@ -437,7 +437,7 @@ static int pwm_fan_resume(struct device *dev)return 0 ;pwm_get_args (ctx->pwm, &pargs); - duty =DIV_ROUND_UP (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); + duty =DIV_ROUND_UP_ULL (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); ret =pwm_config (ctx->pwm, duty, pargs.period);if (ret)return ret;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Guenter Roeck
maintainerRe: [PATCH v10 02/12] hwmon: pwm-fan: Use 64-bit division macro
Quoted 12 lines · Guru Das Srinagesh
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
DIV_ROUND_UP_ULLto handle a 64-bit dividend.Cc Kamil Debski <[email protected]>Cc Bartlomiej Zolnierkiewicz <[email protected]>Cc Jean Delvare <[email protected]>Cc Guenter Roeck <[email protected]>Cc Liam Girdwood <[email protected]>Cc Mark Brown <[email protected]>
Quoted 1 line
Signed-off-by Guru Das Srinagesh <[email protected]>
https://patchwork.kernel.org/patch/11430549/
includes my previous Ack. v9 included it, in v10 it is dropped. I don't see a change in the patch. Please explain.
Guenter
Quoted 18 lines
--- drivers/hwmon/pwm-fan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/hwmon/pwm-fan.c +1
-1@@ -437,7 +437,7 @@ static int pwm_fan_resume(struct device *dev)return 0 ;pwm_get_args (ctx->pwm, &pargs); - duty =DIV_ROUND_UP (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); + duty =DIV_ROUND_UP_ULL (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); ret =pwm_config (ctx->pwm, duty, pargs.period);if (ret)return ret;
Re: [PATCH v10 02/12] hwmon: pwm-fan: Use 64-bit division macro
Quoted 13 lines · Guenter Roeck
Quoted 12 lines · Guru Das Srinagesh
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
DIV_ROUND_UP_ULLto handle a 64-bit dividend.Cc Kamil Debski <[email protected]>Cc Bartlomiej Zolnierkiewicz <[email protected]>Cc Jean Delvare <[email protected]>Cc Guenter Roeck <[email protected]>Cc Liam Girdwood <[email protected]>Cc Mark Brown <[email protected]>
Quoted 6 lines
Quoted 1 line
Signed-off-by Guru Das Srinagesh <[email protected]>https://patchwork.kernel.org/patch/11430549/
includes my previous Ack. v9 included it, in v10 it is dropped. I don't see a change in the patch. Please explain.
Sorry, I missed adding the Acked-by and Reviewed-by tags for the all the patches that have received them in this v10 patchset. I will add them back and re-push.
PATCH v10 3/12 ir-rx51: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using DIV_ROUND_CLOSEST_ULL to handle a 64-bit dividend.
--- drivers/media/rc/ir-rx51.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/media/rc/ir-rx51.c +2 -1
@@ -241,7 +241,8 @@ static int ir_rx51_probe(struct platform_device *dev) }/* Use default, in case userspace does not set the carrier */ - ir_rx51.freq =DIV_ROUND_CLOSEST (pwm_get_period (pwm),NSEC_PER_SEC ); + ir_rx51.freq =DIV_ROUND_CLOSEST_ULL (pwm_get_period (pwm), +NSEC_PER_SEC );pwm_put (pwm);hrtimer_init (&ir_rx51.timer,CLOCK_MONOTONIC ,HRTIMER_MODE_REL );
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 4/12 pwm: clps711x: Cast period to u32 before use as divisor
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by typecasting it to u32.
Also, since the dividend is still a 32-bit number, any divisor greater than UINT_MAX will cause the quotient to be zero, so return 0 in that case to efficiently skip the division.
--- drivers/pwm/pwm-clps711x.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
drivers/pwm/pwm-clps711x.c +4 -1
@@ -43,7 +43,10 @@ static void clps711x_pwm_update_val(struct clps711x_chip *priv, u32 n, u32 v)static unsigned int clps711x_get_duty (struct pwm_device *pwm,unsigned int v) {/* Duty cycle 0..15 max */ -return DIV_ROUND_CLOSEST (v *0xf , pwm->args.period); +if (pwm->args.period >UINT_MAX ) +return 0 ; + +return DIV_ROUND_CLOSEST (v *0xf , (u32 )pwm->args.period); }static int clps711x_pwm_request (struct pwm_chip *chip,struct pwm_device *pwm)
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 5/12 pwm: pwm-imx-tpm: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using DIV64_U64_ROUND_CLOSEST to handle a 64-bit divisor.
--- drivers/pwm/pwm-imx-tpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-imx-tpm.c +1 -1
@@ -126,7 +126,7 @@ static int pwm_imx_tpm_round_state(struct pwm_chip *chip, real_state->duty_cycle = state->duty_cycle; tmp = (u64 )p->mod * real_state->duty_cycle; - p->val =DIV_ROUND_CLOSEST_ULL (tmp, real_state->period); + p->val =DIV64_U64_ROUND_CLOSEST (tmp, real_state->period); real_state->polarity = state->polarity; real_state->enabled = state->enabled;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 6/12 pwm: imx27: Use 64-bit division macro and function
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL to handle a 64-bit dividend, and div64_u64 to handle a 64-bit divisor.
--- drivers/pwm/pwm-imx27.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
drivers/pwm/pwm-imx27.c +2 -3
@@ -208,7 +208,7 @@ static void pwm_imx27_wait_fifo_slot(struct pwm_chip *chip, sr =readl (imx->mmio_base +MX3_PWMSR ); fifoav =FIELD_GET (MX3_PWMSR_FIFOAV , sr);if (fifoav ==MX3_PWMSR_FIFOAV_4WORDS ) { - period_ms =DIV_ROUND_UP (pwm_get_period (pwm), + period_ms =DIV_ROUND_UP_ULL (pwm_get_period (pwm),NSEC_PER_MSEC );msleep (period_ms);
@@ -240,8 +240,7 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm, period_cycles /= prescale; c = (unsigned long long )period_cycles * state->duty_cycle; -do_div (c, state->period); - duty_cycles = c; + duty_cycles =div64_u64 (c, state->period);/* * according to imx pwm RM, the real period value should be PERIOD
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 7/12 pwm: sifive: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using DIV64_U64_ROUND_CLOSEST to handle a 64-bit divisor.
--- drivers/pwm/pwm-sifive.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-sifive.c +1 -1
@@ -181,7 +181,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm,* consecutively */ num = (u64 )duty_cycle * (1U <<PWM_SIFIVE_CMPWIDTH ); - frac =DIV_ROUND_CLOSEST_ULL (num, state->period); + frac =DIV64_U64_ROUND_CLOSEST (num, state->period);/* The hardware cannot generate a 100% duty cycle */ frac =min (frac, (1U <<PWM_SIFIVE_CMPWIDTH ) -1 );
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 8/12 pwm: stm32-lp: Use %llu format specifier for period
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using the right specifier for printing a 64-bit value.
--- drivers/pwm/pwm-stm32-lp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-stm32-lp.c +1 -1
@@ -61,7 +61,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,do_div (div,NSEC_PER_SEC );if (!div) {/* Clock is too slow to achieve requested period. */ -dev_dbg (priv->chip.dev,"Can't reach %u ns\n" , state->period); +dev_dbg (priv->chip.dev,"Can't reach %llu ns\n" , state->period);return -EINVAL ; }
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 9/12 pwm: sun4i: Use 64-bit division function
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using div_u64 to handle a 64-bit dividend instead of a straight division operation.
--- drivers/pwm/pwm-sun4i.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-sun4i.c +1 -1
@@ -286,7 +286,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, val = (duty &PWM_DTY_MASK ) |PWM_PRD (period);sun4i_pwm_writel (sun4i_pwm, val,PWM_CH_PRD (pwm->hwpwm)); sun4i_pwm->next_period[pwm->hwpwm] = jiffies + -usecs_to_jiffies (cstate.period /1000 +1 ); +usecs_to_jiffies (div_u64 (cstate.period,1000 ) +1 ); sun4i_pwm->needs_delay[pwm->hwpwm] = true;if (state->polarity !=PWM_POLARITY_NORMAL )
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 10/12 backlight: pwm_bl: Use 64-bit division function
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using div_u64 to handle a 64-bit dividend instead of a straight division operation.
--- drivers/video/backlight/pwm_bl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/video/backlight/pwm_bl.c +2 -1
@@ -625,7 +625,8 @@ static int pwm_backlight_probe(struct platform_device *pdev) pb->scale = data->max_brightness; } - pb->lth_brightness = data->lth_brightness * (state.period / pb->scale); + pb->lth_brightness = data->lth_brightness * (div_u64 (state.period, + pb->scale)); props.type =BACKLIGHT_RAW ; props.max_brightness = data->max_brightness;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 11/12 clk: pwm: Assign u64 divisor to unsigned int before use
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by assigning the 64-bit divisor to an unsigned int variable to use as the divisor. This is being done because the divisor is a 32-bit constant and the quotient will be zero if the divisor exceeds 2^32.
--- drivers/clk/clk-pwm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/clk/clk-pwm.c +3 -1
@@ -72,6 +72,7 @@ static int clk_pwm_probe(struct platform_device *pdev)struct pwm_device *pwm;struct pwm_args pargs;const char *clk_name; +unsigned int period;int ret; clk_pwm =devm_kzalloc (&pdev->dev,sizeof (*clk_pwm),GFP_KERNEL );
@@ -88,8 +89,9 @@ static int clk_pwm_probe(struct platform_device *pdev)return -EINVAL ; } + period = pargs.period;if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =NSEC_PER_SEC / period;if (pargs.period !=NSEC_PER_SEC / clk_pwm->fixed_rate && pargs.period !=DIV_ROUND_UP (NSEC_PER_SEC , clk_pwm->fixed_rate)) {
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v10 12/12 pwm: core: Convert period and duty cycle to u64
In reply to Guru Das SrinageshBecause period and duty cycle are defined as ints with units of nanoseconds, the maximum time duration that can be set is limited to ~2.147 seconds. Change their definitions to u64 in the structs of the PWM framework so that higher durations may be set.
--- drivers/pwm/core.c | 4 ++-- drivers/pwm/sysfs.c | 8 ++++---- include/linux/pwm.h | 12 ++++++------ 3 files changed, 12 insertions(+), 12 deletions(-)
drivers/pwm/core.c +2 -2
@@ -1163,8 +1163,8 @@ static void pwm_dbg_show(struct pwm_chip *chip, struct seq_file *s)if (state.enabled)seq_puts (s," enabled" ); -seq_printf (s," period: %u ns" , state.period); -seq_printf (s," duty: %u ns" , state.duty_cycle); +seq_printf (s," period: %llu ns" , state.period); +seq_printf (s," duty: %llu ns" , state.duty_cycle);seq_printf (s," polarity: %s" , state.polarity ?"inverse" :"normal" );
drivers/pwm/sysfs.c +4 -4
@@ -42,7 +42,7 @@ static ssize_t period_show(struct device *child,pwm_get_state (pwm, &state); -return sprintf (buf,"%u\n" , state.period); +return sprintf (buf,"%llu\n" , state.period); } static ssize_t period_store(struct device *child,
@@ -52,10 +52,10 @@ static ssize_t period_store(struct device *child,struct pwm_export *export =child_to_pwm_export (child);struct pwm_device *pwm = export->pwm;struct pwm_state state; -unsigned int val; +u64 val;int ret; - ret =kstrtouint (buf,0 , &val); + ret =kstrtou64 (buf,0 , &val);if (ret)return ret;
@@ -77,7 +77,7 @@ static ssize_t duty_cycle_show(struct device *child,pwm_get_state (pwm, &state); -return sprintf (buf,"%u\n" , state.duty_cycle); +return sprintf (buf,"%llu\n" , state.duty_cycle); } static ssize_t duty_cycle_store(struct device *child,
include/linux/pwm.h +6 -6
@@ -39,7 +39,7 @@ enum pwm_polarity {* current PWM hardware state. */ struct pwm_args { -unsigned int period; +u64 period;enum pwm_polarity polarity; };
@@ -56,8 +56,8 @@ enum {* @enabled: PWM enabled status */ struct pwm_state { -unsigned int period; -unsigned int duty_cycle; +u64 period; +u64 duty_cycle;enum pwm_polarity polarity;bool enabled; };
@@ -105,13 +105,13 @@ static inline bool pwm_is_enabled(const struct pwm_device *pwm)return state.enabled; } -static inline void pwm_set_period (struct pwm_device *pwm,unsigned int period) +static inline void pwm_set_period (struct pwm_device *pwm,u64 period) {if (pwm) pwm->state.period = period; } -static inline unsigned int pwm_get_period (const struct pwm_device *pwm) +static inline u64 pwm_get_period (const struct pwm_device *pwm) {struct pwm_state state;
@@ -126,7 +126,7 @@ static inline void pwm_set_duty_cycle(struct pwm_device *pwm, unsigned int duty) pwm->state.duty_cycle = duty; } -static inline unsigned int pwm_get_duty_cycle (const struct pwm_device *pwm) +static inline u64 pwm_get_duty_cycle (const struct pwm_device *pwm) {struct pwm_state state;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
This is a giant CC list.
There was one version where you CC'd me on patch 6/12 but after that you just CC'd me on the cover page. Something is messed up in your scripts because Cc'ing me on just the cover is pointless.
regards,
dan carpenter
Quoted 1 line · Dan Carpenter
This is a giant CC list.
Yes, this is because I received feedback [1] on an earlier patchset directing me to add the reviewers of patches to the cover letter as well so that they get some context for the patch.
Quoted 1 line
There was one version where you CC'd me on patch 6/12 but after that you
Yes, that would be v9 [2].
Quoted 2 lines
just CC'd me on the cover page. Something is messed up in your scripts because Cc'ing me on just the cover is pointless.
Sorry about that - was initially adding reviewers only to the final email being sent out instead of listing them in the commit message directly, which I now realize is untenable and have subsequently fixed.
[1] https://www.spinics.net/lists/linux-pwm/msg11735.html
[2] https://www.spinics.net/lists/linux-pwm/msg11852.html
Thank you.
Guru Das.
Quoted 8 lines · Guru Das Srinagesh
Quoted 1 line · Dan Carpenter
This is a giant CC list.
Yes, this is because I received feedback [1] on an earlier patchset directing me to add the reviewers of patches to the cover letter as well so that they get some context for the patch.
...
[1] https://www.spinics.net/lists/linux-pwm/msg11735.html
Strictly speaking I only asked for backlight maintainers to be Cc:ed. I was fairly careful to be specific since I'm aware there are a variety of differing habits when putting together the Cc: list for covering letters.
With the original patch header the purpose of the patch I was Cc:ed on was impossible to determine without the covering letter.
Daniel.
Quoted 10 lines · Daniel Thompson
Quoted 8 lines · Guru Das Srinagesh
Quoted 1 line · Dan Carpenter
This is a giant CC list.
Yes, this is because I received feedback [1] on an earlier patchset directing me to add the reviewers of patches to the cover letter as well so that they get some context for the patch.
...
[1] https://www.spinics.net/lists/linux-pwm/msg11735.html
Quoted 7 lines
Strictly speaking I only asked for backlight maintainers to be Cc:ed. I was fairly careful to be specific since I'm aware there are a variety of differing habits when putting together the Cc: list for covering letters.
With the original patch header the purpose of the patch I was Cc:ed on was impossible to determine without the covering letter.
I suspect this might be the case for all the other reviewers as well - that they also would appreciate context for the specific patch they are being added to review.
I wasn't entirely sure what the convention was, so I applied your suggestion to all the files. How do you suggest I handle this in my next patchset? I fully agree that such a large CC list does look really ungainly.
Thank you.
Guru Das.
Quoted 19 lines · Guru Das Srinagesh
Quoted 10 lines · Daniel Thompson
Quoted 8 lines · Guru Das Srinagesh
Quoted 1 line · Dan Carpenter
This is a giant CC list.
Yes, this is because I received feedback [1] on an earlier patchset directing me to add the reviewers of patches to the cover letter as well so that they get some context for the patch.
...
[1] https://www.spinics.net/lists/linux-pwm/msg11735.htmlQuoted 7 lines
Strictly speaking I only asked for backlight maintainers to be Cc:ed. I was fairly careful to be specific since I'm aware there are a variety of differing habits when putting together the Cc: list for covering letters.
With the original patch header the purpose of the patch I was Cc:ed on was impossible to determine without the covering letter.
Quoted 8 lines
I suspect this might be the case for all the other reviewers as well - that they also would appreciate context for the specific patch they are being added to review.
I wasn't entirely sure what the convention was, so I applied your suggestion to all the files. How do you suggest I handle this in my next patchset? I fully agree that such a large CC list does look really ungainly.
IHMO there should not be a mechanical convention. Instead your goal needs to be how to make it as easy as possible to review your patches.
Think about it this way: Each person in the To: of a patch (and maybe also Cc: depending on how you construct things) is a person you are asking to review and comment on the patch. If that person will find it easier to review the patch if they are included in the cover letter then either they should be included or you should improve the patch description of the patch itself (sometimes both).
Either way it is about optimizing the patchset for readability. More people read them than write them.
Daniel.
Quoted 39 lines · Daniel Thompson
Quoted 19 lines · Guru Das Srinagesh
Quoted 10 lines · Daniel Thompson
Quoted 8 lines · Guru Das Srinagesh
Quoted 1 line · Dan Carpenter
This is a giant CC list.
Yes, this is because I received feedback [1] on an earlier patchset directing me to add the reviewers of patches to the cover letter as well so that they get some context for the patch.
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[1] https://www.spinics.net/lists/linux-pwm/msg11735.htmlQuoted 7 lines
Strictly speaking I only asked for backlight maintainers to be Cc:ed. I was fairly careful to be specific since I'm aware there are a variety of differing habits when putting together the Cc: list for covering letters.
With the original patch header the purpose of the patch I was Cc:ed on was impossible to determine without the covering letter.
Quoted 8 lines
I suspect this might be the case for all the other reviewers as well - that they also would appreciate context for the specific patch they are being added to review.
I wasn't entirely sure what the convention was, so I applied your suggestion to all the files. How do you suggest I handle this in my next patchset? I fully agree that such a large CC list does look really ungainly.
IHMO there should not be a mechanical convention. Instead your goal needs to be how to make it as easy as possible to review your patches.
Think about it this way: Each person in the To: of a patch (and maybe also Cc: depending on how you construct things) is a person you are asking to review and comment on the patch. If that person will find it easier to review the patch if they are included in the cover letter then either they should be included or you should improve the patch description of the patch itself (sometimes both).
Quoted 2 lines
Either way it is about optimizing the patchset for readability. More people read them than write them.
Thank you for the explanation! I shall keep your suggestions in mind while sending out future patchsets.
Thank you.
Guru Das.