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Support PWM on MediaTek MT7981

PATCH Superseded Daniel Golle 3 participants 6 messages Apr 19, 2023 – Apr 20, 2023

Subsystems (3)
Device tree bindings Arm MediaTek PWM

v1 of 3 Superseded Latest is v3 →

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Daniel Golle

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#0 lore raw

cover Support PWM on MediaTek MT7981

Add support for PWM on the MediaTek MT7981 to pwm-mediatek.c as well as new mediatek,mt7981-pwm compatible string to the existing bindings.

Daniel Golle (2):
dt-bindings: pwm: mediatek: Add mediatek,mt7981 compatible
pwm: mediatek: Add support for MT7981

 .../bindings/pwm/mediatek,mt2712-pwm.yaml     |  1 +
 drivers/pwm/pwm-mediatek.c                    | 54 ++++++++++++++++---
 2 files changed, 47 insertions(+), 8 deletions(-)

base-commit: 67d5d9f013d6c3829383c08162939cabff14fccc

Signature · 1 line
2.40.0
author
#1 lore raw

PATCH 1/2 dt-bindings: pwm: mediatek: Add mediatek,mt7981 compatible

Add compatible string for the PWM unit found of the MediaTek MT7981 SoC. This is in preparation to adding support in the pwm-mediatek.c driver.

Signed-off-by Daniel Golle <[email protected]>
---
 Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml +1 -0
index 8e176ba7a525f..0fbe8a6469eb2 100644
@@ -22,6 +22,7 @@ properties:
           - mediatek,mt7623-pwm
           - mediatek,mt7628-pwm
           - mediatek,mt7629-pwm
+          - mediatek,mt7981-pwm
           - mediatek,mt7986-pwm
           - mediatek,mt8183-pwm
           - mediatek,mt8365-pwm
Signature · 1 line
2.40.0
Acked-by on v1 1/2
#3 lore raw

Re: [PATCH 1/2] dt-bindings: pwm: mediatek: Add mediatek,mt7981 compatible

In reply to Daniel Golle
Quoted 7 lines · Daniel Golle

Add compatible string for the PWM unit found of the MediaTek MT7981 SoC. This is in preparation to adding support in the pwm-mediatek.c driver.

Signed-off-by Daniel Golle <[email protected]>
---
 Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml | 1 +
 1 file changed, 1 insertion(+)
Acked-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

author
#4 lore raw

PATCH 2/2 pwm: mediatek: Add support for MT7981

In reply to Daniel Golle

The PWM unit on MT7981 uses different register offsets than previous MediaTek PWM units. Add support for these new offsets and add support for PWM on MT7981 which has 3 PWM channels, one of them is typically used for a temperature controlled fan.

Signed-off-by Daniel Golle <[email protected]>
---
 drivers/pwm/pwm-mediatek.c | 54 ++++++++++++++++++++++++++++++++------
 1 file changed, 46 insertions(+), 8 deletions(-)
drivers/pwm/pwm-mediatek.c +46 -8
index 5b5eeaff35da6..2bfb5bedf570b 100644
@@ -34,10 +34,14 @@
 
 #define PWM_CLK_DIV_MAX		7
 
+#define REG_V1			1
+#define REG_V2			2
+
 struct pwm_mediatek_of_data {
 	unsigned int num_pwms;
 	bool pwm45_fixup;
 	bool has_ck_26m_sel;
+	u8 reg_ver;
 };
 
 /**

@@ -59,10 +63,14 @@ struct pwm_mediatek_chip {
 	const struct pwm_mediatek_of_data *soc;
 };
 
-static const unsigned int pwm_mediatek_reg_offset[] = {
+static const unsigned int mtk_pwm_reg_offset_v1[] = {
 	0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
 };
 
+static const unsigned int mtk_pwm_reg_offset_v2[] = {
+	0x0080, 0x00c0, 0x0100, 0x0140, 0x0180, 0x1c0, 0x200, 0x0240
+};
+
 static inline struct pwm_mediatek_chip *
 to_pwm_mediatek_chip(struct pwm_chip *chip)
 {

@@ -111,7 +119,19 @@ static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,
 				       unsigned int num, unsigned int offset,
 				       u32 value)
 {
-	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);
+	u32 pwm_offset;
+
+	switch (chip->soc->reg_ver) {
+	case REG_V2:
+		pwm_offset = mtk_pwm_reg_offset_v2[num];
+		break;
+
+	case REG_V1:
+	default:
+		pwm_offset = mtk_pwm_reg_offset_v1[num];
+	}
+
+	writel(value, chip->regs + pwm_offset + offset);
 }
 
 static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,

@@ -285,60 +305,77 @@ static const struct pwm_mediatek_of_data mt2712_pwm_data = {
 	.num_pwms = 8,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = false,
+	.reg_ver = REG_V1,
 };
 
 static const struct pwm_mediatek_of_data mt6795_pwm_data = {
 	.num_pwms = 7,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = false,
+	.reg_ver = REG_V1,
 };
 
 static const struct pwm_mediatek_of_data mt7622_pwm_data = {
 	.num_pwms = 6,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_ver = REG_V1,
 };
 
 static const struct pwm_mediatek_of_data mt7623_pwm_data = {
 	.num_pwms = 5,
 	.pwm45_fixup = true,
 	.has_ck_26m_sel = false,
+	.reg_ver = REG_V1,
 };
 
 static const struct pwm_mediatek_of_data mt7628_pwm_data = {
 	.num_pwms = 4,
 	.pwm45_fixup = true,
 	.has_ck_26m_sel = false,
+	.reg_ver = REG_V1,
 };
 
 static const struct pwm_mediatek_of_data mt7629_pwm_data = {
 	.num_pwms = 1,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = false,
+	.reg_ver = REG_V1,
 };
 
-static const struct pwm_mediatek_of_data mt8183_pwm_data = {
-	.num_pwms = 4,
+static const struct pwm_mediatek_of_data mt7981_pwm_data = {
+	.num_pwms = 3,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_ver = REG_V2,
 };
 
-static const struct pwm_mediatek_of_data mt8365_pwm_data = {
-	.num_pwms = 3,
+static const struct pwm_mediatek_of_data mt7986_pwm_data = {
+	.num_pwms = 2,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_ver = REG_V1,
 };
 
-static const struct pwm_mediatek_of_data mt7986_pwm_data = {
-	.num_pwms = 2,
+static const struct pwm_mediatek_of_data mt8183_pwm_data = {
+	.num_pwms = 4,
+	.pwm45_fixup = false,
+	.has_ck_26m_sel = true,
+	.reg_ver = REG_V1,
+};
+
+static const struct pwm_mediatek_of_data mt8365_pwm_data = {
+	.num_pwms = 3,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_ver = REG_V1,
 };
 
 static const struct pwm_mediatek_of_data mt8516_pwm_data = {
 	.num_pwms = 5,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_ver = REG_V1,
 };
 
 static const struct of_device_id pwm_mediatek_of_match[] = {

@@ -348,6 +385,7 @@ static const struct of_device_id pwm_mediatek_of_match[] = {
 	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
 	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
 	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
+	{ .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
 	{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
 	{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
 	{ .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },
Signature · 1 line
2.40.0
maintainer
#5 lore raw

Re: [PATCH 2/2] pwm: mediatek: Add support for MT7981

Il 19/04/23 21:25, Daniel Golle ha scritto:

Quoted 16 lines

The PWM unit on MT7981 uses different register offsets than previous MediaTek PWM units. Add support for these new offsets and add support for PWM on MT7981 which has 3 PWM channels, one of them is typically used for a temperature controlled fan.

Signed-off-by Daniel Golle <[email protected]>
---
  drivers/pwm/pwm-mediatek.c | 54 ++++++++++++++++++++++++++++++++------
  1 file changed, 46 insertions(+), 8 deletions(-)
drivers/pwm/pwm-mediatek.c +0 -0
index 5b5eeaff35da6..2bfb5bedf570b 100644
@@ -34,10 +34,14 @@

drivers/pwm/pwm-mediatek.c line 44

Quoted 10 lines
drivers/pwm/pwm-mediatek.c +4 -0
  #define PWM_CLK_DIV_MAX		7
 
+#define REG_V1			1
+#define REG_V2			2
+
  struct pwm_mediatek_of_data {
  	unsigned int num_pwms;
  	bool pwm45_fixup;
  	bool has_ck_26m_sel;
+	u8 reg_ver;

You're overcomplicating this one... checking for a register version and then deciding at every pwm_mediatek_writel() call what to use...

It's way simpler than that!
Pass a pointer to the register array in pwm_mediatek_of_data and then...

Quoted 20 lines
drivers/pwm/pwm-mediatek.c +5 -1
  };
 
  /**

@@ -59,10 +63,14 @@ struct pwm_mediatek_chip {
  	const struct pwm_mediatek_of_data *soc;
  };
 
-static const unsigned int pwm_mediatek_reg_offset[] = {
+static const unsigned int mtk_pwm_reg_offset_v1[] = {
  	0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
  };
 
+static const unsigned int mtk_pwm_reg_offset_v2[] = {
+	0x0080, 0x00c0, 0x0100, 0x0140, 0x0180, 0x1c0, 0x200, 0x0240
+};
+
  static inline struct pwm_mediatek_chip *
  to_pwm_mediatek_chip(struct pwm_chip *chip)
  {

drivers/pwm/pwm-mediatek.c static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip, · line 114

Quoted 4 lines
drivers/pwm/pwm-mediatek.c +0 -1
@@ -111,7 +119,19 @@ static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,
  				       unsigned int num, unsigned int offset,
  				       u32 value)
  {
-	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);

...this simply becomes:

writel(value, chip->regs + chip->reg_offset[num] + offset);

Quoted 17 lines
drivers/pwm/pwm-mediatek.c +13 -0
+	u32 pwm_offset;
+
+	switch (chip->soc->reg_ver) {
+	case REG_V2:
+		pwm_offset = mtk_pwm_reg_offset_v2[num];
+		break;
+
+	case REG_V1:
+	default:
+		pwm_offset = mtk_pwm_reg_offset_v1[num];
+	}
+
+	writel(value, chip->regs + pwm_offset + offset);
  }
 
  static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,

drivers/pwm/pwm-mediatek.c static const struct pwm_mediatek_of_data mt2712_pwm_data = { · line 308

Quoted 4 lines
drivers/pwm/pwm-mediatek.c +1 -0
@@ -285,60 +305,77 @@ static const struct pwm_mediatek_of_data mt2712_pwm_data = {
  	.num_pwms = 8,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = false,
+	.reg_ver = REG_V1,

...so instead of assigning that, you'd be assigning

	.reg_offset = mtk_pwm_reg_offset_v1;

Better, right? :-)

Cheers,
Angelo