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Support PWM on MediaTek MT7981

PATCH Applied Daniel Golle 4 participants 6 messages Apr 20, 2023 – Jun 23, 2023

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#0 lore raw

v3 cover Support PWM on MediaTek MT7981

Add support for PWM on the MediaTek MT7981 to pwm-mediatek.c as well as new mediatek,mt7981-pwm compatible string to the existing bindings.

Changes since v2:
* improve commit message, adding that alphabetic order is restored

Changes since v1:
* use pointer to reg_offset instead of u8 reg_ver and if-else

Daniel Golle (2):
dt-bindings: pwm: mediatek: Add mediatek,mt7981 compatible
pwm: mediatek: Add support for MT7981

 .../bindings/pwm/mediatek,mt2712-pwm.yaml     |  1 +
 drivers/pwm/pwm-mediatek.c                    | 39 +++++++++++++++----
 2 files changed, 32 insertions(+), 8 deletions(-)

base-commit: 44bf136283e567b2b62653be7630e7511da41da2

Signature · 1 line
2.40.0
#1 lore raw

PATCH v3 1/2 dt-bindings: pwm: mediatek: Add mediatek,mt7981 compatible

Add compatible string for the PWM unit found of the MediaTek MT7981 SoC. This is in preparation to adding support in the pwm-mediatek.c driver.

---
 Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml +1 -0
index 8e176ba7a525f..0fbe8a6469eb2 100644
@@ -22,6 +22,7 @@ properties:
           - mediatek,mt7623-pwm
           - mediatek,mt7628-pwm
           - mediatek,mt7629-pwm
+          - mediatek,mt7981-pwm
           - mediatek,mt7986-pwm
           - mediatek,mt8183-pwm
           - mediatek,mt8365-pwm
Signature · 1 line
2.40.0
#2 lore raw

PATCH v3 2/2 pwm: mediatek: Add support for MT7981

In reply to Daniel Golle

The PWM unit on MT7981 uses different register offsets than previous MediaTek PWM units. Add support for these new offsets and add support for PWM on MT7981 which has 3 PWM channels, one of them is typically used for a temperature controlled fan.
While at it, also reorder pwm_mediatek_of_data entries to restore alphabetic order.

---
 drivers/pwm/pwm-mediatek.c | 39 ++++++++++++++++++++++++++++++--------
 1 file changed, 31 insertions(+), 8 deletions(-)
drivers/pwm/pwm-mediatek.c +31 -8
index 5b5eeaff35da6..7a51d210a8778 100644
@@ -38,6 +38,7 @@ struct pwm_mediatek_of_data {
 	unsigned int num_pwms;
 	bool pwm45_fixup;
 	bool has_ck_26m_sel;
+	const unsigned int *reg_offset;
 };
 
 /**
@@ -59,10 +60,14 @@ struct pwm_mediatek_chip {
 	const struct pwm_mediatek_of_data *soc;
 };
 
-static const unsigned int pwm_mediatek_reg_offset[] = {
+static const unsigned int mtk_pwm_reg_offset_v1[] = {
 	0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
 };
 
+static const unsigned int mtk_pwm_reg_offset_v2[] = {
+	0x0080, 0x00c0, 0x0100, 0x0140, 0x0180, 0x01c0, 0x0200, 0x0240
+};
+
 static inline struct pwm_mediatek_chip *
 to_pwm_mediatek_chip(struct pwm_chip *chip)
 {
@@ -111,7 +116,7 @@ static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,
 				       unsigned int num, unsigned int offset,
 				       u32 value)
 {
-	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);
+	writel(value, chip->regs + chip->soc->reg_offset[num] + offset);
 }
 
 static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -285,60 +290,77 @@ static const struct pwm_mediatek_of_data mt2712_pwm_data = {
 	.num_pwms = 8,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
 static const struct pwm_mediatek_of_data mt6795_pwm_data = {
 	.num_pwms = 7,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
 static const struct pwm_mediatek_of_data mt7622_pwm_data = {
 	.num_pwms = 6,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
 static const struct pwm_mediatek_of_data mt7623_pwm_data = {
 	.num_pwms = 5,
 	.pwm45_fixup = true,
 	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
 static const struct pwm_mediatek_of_data mt7628_pwm_data = {
 	.num_pwms = 4,
 	.pwm45_fixup = true,
 	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
 static const struct pwm_mediatek_of_data mt7629_pwm_data = {
 	.num_pwms = 1,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
-static const struct pwm_mediatek_of_data mt8183_pwm_data = {
-	.num_pwms = 4,
+static const struct pwm_mediatek_of_data mt7981_pwm_data = {
+	.num_pwms = 3,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v2,
 };
 
-static const struct pwm_mediatek_of_data mt8365_pwm_data = {
-	.num_pwms = 3,
+static const struct pwm_mediatek_of_data mt7986_pwm_data = {
+	.num_pwms = 2,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
-static const struct pwm_mediatek_of_data mt7986_pwm_data = {
-	.num_pwms = 2,
+static const struct pwm_mediatek_of_data mt8183_pwm_data = {
+	.num_pwms = 4,
+	.pwm45_fixup = false,
+	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
+};
+
+static const struct pwm_mediatek_of_data mt8365_pwm_data = {
+	.num_pwms = 3,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
 static const struct pwm_mediatek_of_data mt8516_pwm_data = {
 	.num_pwms = 5,
 	.pwm45_fixup = false,
 	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
 };
 
 static const struct of_device_id pwm_mediatek_of_match[] = {
@@ -348,6 +370,7 @@ static const struct of_device_id pwm_mediatek_of_match[] = {
 	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
 	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
 	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
+	{ .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
 	{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
 	{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
 	{ .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },
Signature · 1 line
2.40.0
maintainer Reviewed-by on v3 2/2
#3 lore raw

Re: [PATCH v3 2/2] pwm: mediatek: Add support for MT7981

Quoted 9 lines · Daniel Golle

The PWM unit on MT7981 uses different register offsets than previous MediaTek PWM units. Add support for these new offsets and add support for PWM on MT7981 which has 3 PWM channels, one of them is typically used for a temperature controlled fan.
While at it, also reorder pwm_mediatek_of_data entries to restore alphabetic order.

Quoted 133 lines
---
  drivers/pwm/pwm-mediatek.c | 39 ++++++++++++++++++++++++++++++--------
  1 file changed, 31 insertions(+), 8 deletions(-)
drivers/pwm/pwm-mediatek.c +31 -8
index 5b5eeaff35da6..7a51d210a8778 100644
@@ -38,6 +38,7 @@ struct pwm_mediatek_of_data {
  	unsigned int num_pwms;
  	bool pwm45_fixup;
  	bool has_ck_26m_sel;
+	const unsigned int *reg_offset;
  };
 
  /**
@@ -59,10 +60,14 @@ struct pwm_mediatek_chip {
  	const struct pwm_mediatek_of_data *soc;
  };
 
-static const unsigned int pwm_mediatek_reg_offset[] = {
+static const unsigned int mtk_pwm_reg_offset_v1[] = {
  	0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
  };
 
+static const unsigned int mtk_pwm_reg_offset_v2[] = {
+	0x0080, 0x00c0, 0x0100, 0x0140, 0x0180, 0x01c0, 0x0200, 0x0240
+};
+
  static inline struct pwm_mediatek_chip *
  to_pwm_mediatek_chip(struct pwm_chip *chip)
  {
@@ -111,7 +116,7 @@ static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,
  				       unsigned int num, unsigned int offset,
  				       u32 value)
  {
-	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);
+	writel(value, chip->regs + chip->soc->reg_offset[num] + offset);
  }
 
  static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -285,60 +290,77 @@ static const struct pwm_mediatek_of_data mt2712_pwm_data = {
  	.num_pwms = 8,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
  static const struct pwm_mediatek_of_data mt6795_pwm_data = {
  	.num_pwms = 7,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
  static const struct pwm_mediatek_of_data mt7622_pwm_data = {
  	.num_pwms = 6,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
  static const struct pwm_mediatek_of_data mt7623_pwm_data = {
  	.num_pwms = 5,
  	.pwm45_fixup = true,
  	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
  static const struct pwm_mediatek_of_data mt7628_pwm_data = {
  	.num_pwms = 4,
  	.pwm45_fixup = true,
  	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
  static const struct pwm_mediatek_of_data mt7629_pwm_data = {
  	.num_pwms = 1,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = false,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
-static const struct pwm_mediatek_of_data mt8183_pwm_data = {
-	.num_pwms = 4,
+static const struct pwm_mediatek_of_data mt7981_pwm_data = {
+	.num_pwms = 3,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v2,
  };
 
-static const struct pwm_mediatek_of_data mt8365_pwm_data = {
-	.num_pwms = 3,
+static const struct pwm_mediatek_of_data mt7986_pwm_data = {
+	.num_pwms = 2,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
-static const struct pwm_mediatek_of_data mt7986_pwm_data = {
-	.num_pwms = 2,
+static const struct pwm_mediatek_of_data mt8183_pwm_data = {
+	.num_pwms = 4,
+	.pwm45_fixup = false,
+	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
+};
+
+static const struct pwm_mediatek_of_data mt8365_pwm_data = {
+	.num_pwms = 3,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
  static const struct pwm_mediatek_of_data mt8516_pwm_data = {
  	.num_pwms = 5,
  	.pwm45_fixup = false,
  	.has_ck_26m_sel = true,
+	.reg_offset = mtk_pwm_reg_offset_v1,
  };
 
  static const struct of_device_id pwm_mediatek_of_match[] = {
@@ -348,6 +370,7 @@ static const struct of_device_id pwm_mediatek_of_match[] = {
  	{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
  	{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
  	{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
+	{ .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
  	{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
  	{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
  	{ .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },
Acked-by on the v3 series
#4 lore raw
In reply to Daniel Golle

Hello,

Quoted 9 lines · Daniel Golle

Add support for PWM on the MediaTek MT7981 to pwm-mediatek.c as well as new mediatek,mt7981-pwm compatible string to the existing bindings.

Changes since v2:
* improve commit message, adding that alphabetic order is restored

Changes since v1:
* use pointer to reg_offset instead of u8 reg_ver and if-else

Quoted 7 lines

Daniel Golle (2):
dt-bindings: pwm: mediatek: Add mediatek,mt7981 compatible
pwm: mediatek: Add support for MT7981

 .../bindings/pwm/mediatek,mt2712-pwm.yaml     |  1 +
 drivers/pwm/pwm-mediatek.c                    | 39 +++++++++++++++----
 2 files changed, 32 insertions(+), 8 deletions(-)

whole series looks good to me,

Best regards
Uwe

Signature · 2 lines
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |
#5 lore raw
In reply to Daniel Golle
Quoted 10 lines · Daniel Golle

Add support for PWM on the MediaTek MT7981 to pwm-mediatek.c as well as new mediatek,mt7981-pwm compatible string to the existing bindings.

Changes since v2:
* improve commit message, adding that alphabetic order is restored

Changes since v1:
* use pointer to reg_offset instead of u8 reg_ver and if-else

[...]

Applied, thanks!

[1/2] dt-bindings: pwm: mediatek: Add mediatek,mt7981 compatible

      commit: 88c66e018aa8b5a15d7fdba9908c01260c657bff
[2/2] pwm: mediatek: Add support for MT7981
      commit: 967da67a745fb73fd0fc7aa61fd197b76fceb273

Best regards,

Signature · 1 line
Thierry Reding <[email protected]>