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dt-bindings: xilinx: Add missing firmware child nodes

PATCH Superseded Michal Simek 3 participants 8 messages Dec 20, 2023 – Dec 21, 2023

Subsystems (3)
Device tree bindings Arm/Zynq architecture System reset/shutdown drivers

v2 of 3 Superseded Latest is v3 →

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Michal Simek

author maintainer
#0 lore raw

v2 cover dt-bindings: xilinx: Add missing firmware child nodes

Hi,

series is converting missing descriptions for child nodes and also synchronizing name for power-controller discussed with Krzysztof in v1 version available here.
https://lore.kernel.org/r/[email protected]

Thanks,
Michal

Changes in v2:
- Sort nodes by name
- Rename zynqmp-power to power-controller
- Keep only single patch for easier handling as done in v1
- New patch in series
- New patch is series
- New patch is series

Michal Simek (4):
dt-bindings: firmware: xilinx: Describe missing child nodes
dt-bindings: firmware: xilinx: Sort node names (clock-controller)
dt-bindings: power: reset: xilinx: Rename node names in examples
arm64: zynqmp: Rename zynqmp-power node to power-controller

 .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 49 +++++++++++++++----
 .../power/reset/xlnx,zynqmp-power.yaml        |  4 +-
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi        |  2 +-
 3 files changed, 43 insertions(+), 12 deletions(-)
Signature · 1 line
2.36.1
author maintainer
#1 lore raw

PATCH v2 1/4 dt-bindings: firmware: xilinx: Describe missing child nodes

Firmware node has more than fpga, aes and clock child nodes but also power, reset, gpio, pinctrl and pcap which are not described yet.
All of them have binding in separate files but there is missing connection to firmware node that's why describe it.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- Sort nodes by name
- Rename zynqmp-power to power-controller
- Keep only single patch for easier handling as done in v1

 .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +31 -0
index 98945220c33c..310c334e88a2 100644
@@ -41,6 +41,37 @@ properties:
   "#power-domain-cells":
     const: 1
 
+  gpio:
+    $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
+    description: The gpio node describes connect to PS_MODE pins via firmware
+      interface.
+    type: object
+
+  pcap:
+    $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml
+    description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
+      configure the Programmable Logic (PL). The configuration uses the
+      firmware interface.
+    type: object
+
+  pinctrl:
+    $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
+    description: The pinctrl node provides access to pinconfig and pincontrol
+      functionality available in firmware.
+    type: object
+
+  power-controller:
+    $ref: /schemas/power/reset/xlnx,zynqmp-power.yaml#
+    description: The zynqmp-power node describes the power management
+      configurations. It will control remote suspend/shutdown interfaces.
+    type: object
+
+  reset-controller:
+    $ref: /schemas/reset/xlnx,zynqmp-reset.yaml#
+    description: The reset-controller node describes connection to the reset
+      functionality via firmware interface.
+    type: object
+
   versal-fpga:
     $ref: /schemas/fpga/xlnx,versal-fpga.yaml#
     description: Compatible of the FPGA device.
Signature · 1 line
2.36.1
#2 lore raw

Re: [PATCH v2 1/4] dt-bindings: firmware: xilinx: Describe missing child nodes

Quoted 11 lines · Michal Simek
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +11 -0
+  gpio:
+    $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
+    description: The gpio node describes connect to PS_MODE pins via firmware
+      interface.
+    type: object
+
+  pcap:
+    $ref: /schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml
+    description: The ZynqMP SoC uses the PCAP (Processor Configuration Port) to
+      configure the Programmable Logic (PL). The configuration uses the
+      firmware interface.

Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml properties: · line 64

Quoted 10 lines
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +10 -0
+    type: object
+
+  pinctrl:
+    $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
+    description: The pinctrl node provides access to pinconfig and pincontrol
+      functionality available in firmware.
+    type: object
+
+  power-controller:
+    $ref: /schemas/power/reset/xlnx,zynqmp-power.yaml#

This should be "power-controller" only if it is a power domain provider. Is it? Bot's report suggest it is not, therefore I suggested power-management.

Also, please extend the example. The top-level example for complex devices should be complete. Apologies for not bringing it earlier.

Best regards,
Krzysztof

author maintainer
#3 lore raw

PATCH v2 2/4 dt-bindings: firmware: xilinx: Sort node names (clock-controller)

In reply to Michal Simek

Nodes should be sorted that's why move clock-controller to the top of list.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- New patch in series

 .../firmware/xilinx/xlnx,zynqmp-firmware.yaml  | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +9 -9
index 310c334e88a2..d64033140c53 100644
@@ -41,6 +41,15 @@ properties:
   "#power-domain-cells":
     const: 1
 
+  clock-controller:
+    $ref: /schemas/clock/xlnx,versal-clk.yaml#
+    description: The clock controller is a hardware block of Xilinx versal
+      clock tree. It reads required input clock frequencies from the devicetree
+      and acts as clock provider for all clock consumers of PS clocks.list of
+      clock specifiers which are external input clocks to the given clock
+      controller.
+    type: object
+
   gpio:
     $ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
     description: The gpio node describes connect to PS_MODE pins via firmware

@@ -84,15 +93,6 @@ properties:
       vector.
     type: object
 
-  clock-controller:
-    $ref: /schemas/clock/xlnx,versal-clk.yaml#
-    description: The clock controller is a hardware block of Xilinx versal
-      clock tree. It reads required input clock frequencies from the devicetree
-      and acts as clock provider for all clock consumers of PS clocks.list of
-      clock specifiers which are external input clocks to the given clock
-      controller.
-    type: object
-
 required:
   - compatible
Signature · 1 line
2.36.1
author maintainer
#5 lore raw

PATCH v2 3/4 dt-bindings: power: reset: xilinx: Rename node names in examples

In reply to Michal Simek

Rename zynqmp-power node name to power-controller which is more aligned with generic node name recommendation.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- New patch is series

 .../devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml    | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml +2 -2
index 45792e216981..3484be1c89d3 100644
@@ -57,7 +57,7 @@ examples:
 
     firmware {
       zynqmp-firmware {
-        zynqmp-power {
+        power-controller {
           compatible = "xlnx,zynqmp-power";
           interrupts = <0 35 4>;
         };

@@ -70,7 +70,7 @@ examples:
 
     firmware {
       zynqmp-firmware {
-        zynqmp-power {
+        power-controller {
           compatible = "xlnx,zynqmp-power";
           interrupt-parent = <&gic>;
           interrupts = <0 35 4>;
Signature · 1 line
2.36.1
maintainer
#6 lore raw

Re: [PATCH v2 3/4] dt-bindings: power: reset: xilinx: Rename node names in examples

Quoted 12 lines · Michal Simek

Rename zynqmp-power node name to power-controller which is more aligned with generic node name recommendation.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- New patch is series

 .../devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml    | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.example.dtb: power-controller: '#power-domain-cells' is a required property
from schema $id: http://devicetree.org/schemas/power/power-domain.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.example.dtb: power-controller: '#power-domain-cells' is a required property
from schema $id: http://devicetree.org/schemas/power/power-domain.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/26aa3459310ba4624ccb5865ca32017357591e4d.1703066422.git.michal.simek@amd.com

The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.

author maintainer
#7 lore raw

PATCH v2 4/4 arm64: zynqmp: Rename zynqmp-power node to power-controller

In reply to Michal Simek

Rename zynqmp-power node name to power-controller which is more aligned with generic node name recommendation.

Signed-off-by Michal Simek <[email protected]>

---

Changes in v2:
- New patch is series

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/xilinx/zynqmp.dtsi +1 -1
index eaba466804bc..b1bac486c3f7 100644
@@ -186,7 +186,7 @@ zynqmp_firmware: zynqmp-firmware {
 			method = "smc";
 			bootph-all;
 
-			zynqmp_power: zynqmp-power {
+			zynqmp_power: power-controller {
 				bootph-all;
 				compatible = "xlnx,zynqmp-power";
 				interrupt-parent = <&gic>;
Signature · 1 line
2.36.1