LoongArch: DTS: Fix dtbs_check warnings
Subsystems (5)
v2 cover LoongArch: DTS: Fix dtbs_check warnings
Hi all:
As Krzysztof pointed out in the OSS talk, LoongArch only has three DTS, but has a bunch of warnings. The patchset attempts to fix them.
Patch-1 and patch-3 are taken from Yao[1],thanks a lot!
[1]: https://lore.kernel.org/all/[email protected]/
Test environment and results:
Package Version
------------------------- -----------
attrs 25.4.0 dtschema 2025.12 jsonschema 4.25.1 jsonschema-specifications 2025.9.1 pip 25.3 pylibfdt 1.7.2.post1 referencing 0.37.0 rfc3987 1.3.8 rpds-py 0.30.0 ruamel.yaml 0.18.16 ruamel.yaml.clib 0.2.15 typing_extensions 4.15.0
---------
make dtbs_check W=1
SYNC include/config/auto.conf
UPD include/config/kernel.release
DTC [C] arch/loongarch/boot/dts/loongson-2k0500-ref.dtb DTC [C] arch/loongarch/boot/dts/loongson-2k1000-ref.dtb DTC [C] arch/loongarch/boot/dts/loongson-2k2000-ref.dtb
========
V2:
patch(1/7)(3/7):
- Add my own Signed-off-by tag;
patch(2/7):
- Define the value of #address-cells to 0;
patch(5/7):
- Set #address-cells = <0> to liointc0 node;
patch(7/7):
- Fix commit msg about i2c@address;
- Add Reviewed-by tag form Krzysztof, thanks.
Link to V1:
https://lore.kernel.org/all/[email protected]/
Thanks.
Binbin
Binbin Zhou (5):
dt-bindings: interrupt-controller: loongson,pch-pic: Change to
unevaluatedProperties
LoongArch: dts: loongson-2k0500: Add default Extend I/O Interrupt
controller address cells
LoongArch: dts: loongson-2k1000: Add default Local I/O Interrupt
controller address cells
LoongArch: dts: loongson-2k2000: Add default PCH PIC controller
address cells
LoongArch: dts: loongson-2k1000: Fix i2c-gpio node names
Yao Zi (2):
dt-bindings: PCI: loongson: Document msi-parent property
LoongArch: dts: Describe PCI sideband IRQ through interrupt-extended
.../loongson,pch-pic.yaml | 10 +++++- .../devicetree/bindings/pci/loongson.yaml | 2 ++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 1 + arch/loongarch/boot/dts/loongson-2k1000.dtsi | 31 ++++++++--------- arch/loongarch/boot/dts/loongson-2k2000.dtsi | 33 ++++++++----------- 5 files changed, 38 insertions(+), 39 deletions(-)
base-commit: 4c2aab372d819471df4fec9e3240d80938fcc983
Signature · 1 line
2.47.3
PATCH v2 1/7 dt-bindings: PCI: loongson: Document msi-parent property
From: Yao Zi <[email protected]>
Loongson PCI controllers found in LS2K1000/2000 SoCs (loongson,ls2k-pci), 7A1000/2000 bridge chips (loongson,ls7a-pci), and RS780E bridge chips (loongson,rs780e-pci) all have their paired MSI controllers.
Though only the one in LS2K2000 SoC is described in devicetree, we should document the property for all variants. For the same reason, it isn't marked as required for now.
--- Documentation/devicetree/bindings/pci/loongson.yaml | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/pci/loongson.yaml +2 -0
@@ -32,6 +32,8 @@ properties: minItems: 1 maxItems: 3 + msi-parent: true + required: - compatible - reg
Signature · 1 line
2.47.3
PATCH v2 2/7 dt-bindings: interrupt-controller: loongson,pch-pic: Change to unevaluatedProperties
In reply to Binbin ZhouChange additionalProperties to unevaluatedProperties because it refs to interrupt-controller.yaml.
Fix below CHECK_DTBS warnings:arch/loongarch/boot/dts/loongson-2k2000-ref.dtb: interrupt-controller@10000000 (loongson,pch-pic-1.0): '#address-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml
--- .../interrupt-controller/loongson,pch-pic.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +9 -1
@@ -14,6 +14,9 @@ description: transforming interrupts from on-chip devices into HyperTransport vectorized interrupts. +allOf: + - $ref: /schemas/interrupt-controller.yaml# + properties: compatible: const: loongson,pch-pic-1.0
@@ -34,14 +37,18 @@ properties: '#interrupt-cells': const: 2 + '#address-cells': + const: 0 + required: - compatible - reg - loongson,pic-base-vec - interrupt-controller - '#interrupt-cells' + - '#address-cells' -additionalProperties: false +unevaluatedProperties: false examples: - |
@@ -50,6 +57,7 @@ examples: compatible = "loongson,pch-pic-1.0"; reg = <0x10000000 0x400>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; loongson,pic-base-vec = <64>; interrupt-parent = <&htvec>;
Signature · 1 line
2.47.3
Huacai Chen
maintainerRe: [PATCH v2 2/7] dt-bindings: interrupt-controller: loongson,pch-pic: Change to unevaluatedProperties
Hi, Binbin,
Quoted 28 lines · Binbin Zhou
Change additionalProperties to unevaluatedProperties because it refs to
interrupt-controller.yaml.Fix below
CHECK_DTBSwarnings:arch/loongarch/boot/dts/loongson-2k2000-ref.dtb: interrupt-controller@10000000 (loongson,pch-pic-1.0): '#address-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yamlSigned-off-by Binbin Zhou <[email protected]>--- .../interrupt-controller/loongson,pch-pic.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +3
-0@@ -14,6 +14,9 @@ description: transforming interrupts from on-chip devices into HyperTransport vectorized interrupts. +allOf: + - $ref: /schemas/interrupt-controller.yaml# + properties: compatible: const: loongson,pch-pic-1.0
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 42
Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +3
-0@@ -34,14 +37,18 @@ properties: '#interrupt-cells': const: 2 + '#address-cells': + const: 0 +
In the example address-cells is before interrupt-cells, so I think here it is better to put it before interrupt -cells.
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 49
Quoted 7 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-0required: - compatible - reg - loongson,pic-base-vec - interrupt-controller - '#interrupt-cells' + - '#address-cells'
The same.
Huacai
Quoted 17 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +2
-2-additionalProperties: false +unevaluatedProperties: false examples: - |@@ -50,6 +57,7 @@ examples: compatible = "loongson,pch-pic-1.0"; reg = <0x10000000 0x400>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; loongson,pic-base-vec = <64>; interrupt-parent = <&htvec>; --2.47.3
Rob Herring
maintainerRe: [PATCH v2 2/7] dt-bindings: interrupt-controller: loongson,pch-pic: Change to unevaluatedProperties
In reply to Binbin ZhouQuoted 17 lines · Binbin Zhou
Change additionalProperties to unevaluatedProperties because it refs to
interrupt-controller.yaml.Fix below
CHECK_DTBSwarnings:arch/loongarch/boot/dts/loongson-2k2000-ref.dtb: interrupt-controller@10000000 (loongson,pch-pic-1.0): '#address-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yamlSigned-off-by Binbin Zhou <[email protected]>--- .../interrupt-controller/loongson,pch-pic.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +0
-0
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml description: · line 18
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +2
-0@@ -14,6 +14,9 @@ description: transforming interrupts from on-chip devices into HyperTransport vectorized interrupts. +allOf: + - $ref: /schemas/interrupt-controller.yaml#
This is not really needed because interrupt-controller.yaml is applied to all nodes named 'interrupt-controller', but fine to add.
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 42
Quoted 11 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +4
-0+ properties: compatible: const: loongson,pch-pic-1.0@@ -34,14 +37,18 @@ properties: '#interrupt-cells': const: 2 + '#address-cells': + const: 0 +
This part is the only change actually needed.
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 49
Quoted 7 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-0required: - compatible - reg - loongson,pic-base-vec - interrupt-controller - '#interrupt-cells' + - '#address-cells'
Unless there's some guarantee that this node is *always* referenced by an interrupt-map property, then it's not really required. After all, presumably things worked without it.
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 51
Quoted 3 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-1-additionalProperties: false +unevaluatedProperties: false
Also not needed.
Quoted 14 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-0examples: - |@@ -50,6 +57,7 @@ examples: compatible = "loongson,pch-pic-1.0"; reg = <0x10000000 0x400>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; loongson,pic-base-vec = <64>; interrupt-parent = <&htvec>;Signature · 1 line
2.47.3
Re: [PATCH v2 2/7] dt-bindings: interrupt-controller: loongson,pch-pic: Change to unevaluatedProperties
Hi Rob:
Thanks for your detailed review.
Quoted 36 lines · Rob Herring
Quoted 17 lines · Binbin Zhou
Change additionalProperties to unevaluatedProperties because it refs to
interrupt-controller.yaml.Fix below
CHECK_DTBSwarnings:arch/loongarch/boot/dts/loongson-2k2000-ref.dtb: interrupt-controller@10000000 (loongson,pch-pic-1.0): '#address-cells' does not match any of the regexes: '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yamlSigned-off-by Binbin Zhou <[email protected]>--- .../interrupt-controller/loongson,pch-pic.yaml | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +0
-0Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml description: · line 18
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +2
-0@@ -14,6 +14,9 @@ description: transforming interrupts from on-chip devices into HyperTransport vectorized interrupts. +allOf: + - $ref: /schemas/interrupt-controller.yaml#This is not really needed because
interrupt-controller.yamlis applied to all nodes named 'interrupt-controller', but fine to add.Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-0+ properties: compatible: const: loongson,pch-pic-1.0@@ -34,14 +37,18 @@ properties: '#interrupt-cells': const: 2
Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 42
Quoted 3 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +3
-0+ '#address-cells': + const: 0 +This part is the only change actually needed.
Except for this part, I'll remove any other unneeded changes.
Quoted 33 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 49
Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-0required: - compatible - reg - loongson,pic-base-vec - interrupt-controller - '#interrupt-cells' + - '#address-cells'Unless there's some guarantee that this node is *always* referenced by an interrupt-map property, then it's not really required. After all, presumably things worked without it.
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml properties: · line 51
Quoted 3 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-1-additionalProperties: false +unevaluatedProperties: falseAlso not needed.
Quoted 14 lines
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +1
-1examples: - |@@ -50,6 +57,7 @@ examples: compatible = "loongson,pch-pic-1.0"; reg = <0x10000000 0x400>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; loongson,pic-base-vec = <64>; interrupt-parent = <&htvec>; --2.47.3
Signature · 2 lines
Thanks. Binbin
PATCH v2 3/7 LoongArch: dts: Describe PCI sideband IRQ through interrupt-extended
In reply to Binbin ZhouFrom: Yao Zi <[email protected]>
SoC integrated peripherals on LS2K1000 and LS2K2000 could be discovered as PCI devices, but require sideband interrupts to function, which are previously described by interrupts and interrupt-parent properties.
However, pci/pci-device.yaml allows interrupts property to only specify PCI INTx interrupts, not sideband ones. Convert these devices to use interrupt-extended property, which describes sideband interrupts used by PCI devices since dt-schema commit e6ea659d2baa ("schemas: pci-device:
Allow interrupts-extended for sideband interrupts"), eliminating dtbs_check warnings.
--- arch/loongarch/boot/dts/loongson-2k1000.dtsi | 25 ++++++--------- arch/loongarch/boot/dts/loongson-2k2000.dtsi | 32 ++++++++------------ 2 files changed, 21 insertions(+), 36 deletions(-)
arch/loongarch/boot/dts/loongson-2k1000.dtsi +9 -16
@@ -437,54 +437,47 @@ pcie@1a000000 { gmac0: ethernet@3,0 { reg = <0x1800 0x0 0x0 0x0 0x0>; - interrupt-parent = <&liointc0>; - interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, - <13 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&liointc0 12 IRQ_TYPE_LEVEL_HIGH>, + <&liointc0 13 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; status = "disabled"; }; gmac1: ethernet@3,1 { reg = <0x1900 0x0 0x0 0x0 0x0>; - interrupt-parent = <&liointc0>; - interrupts = <14 IRQ_TYPE_LEVEL_HIGH>, - <15 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&liointc0 14 IRQ_TYPE_LEVEL_HIGH>, + <&liointc0 15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; status = "disabled"; }; ehci0: usb@4,1 { reg = <0x2100 0x0 0x0 0x0 0x0>; - interrupt-parent = <&liointc1>; - interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&liointc1 18 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; ohci0: usb@4,2 { reg = <0x2200 0x0 0x0 0x0 0x0>; - interrupt-parent = <&liointc1>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&liointc1 19 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; display@6,0 { reg = <0x3000 0x0 0x0 0x0 0x0>; - interrupt-parent = <&liointc0>; - interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&liointc0 28 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; hda@7,0 { reg = <0x3800 0x0 0x0 0x0 0x0>; - interrupt-parent = <&liointc0>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&liointc0 4 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; sata: sata@8,0 { reg = <0x4000 0x0 0x0 0x0 0x0>; - interrupt-parent = <&liointc0>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&liointc0 19 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; };
arch/loongarch/boot/dts/loongson-2k2000.dtsi +12 -20
@@ -291,65 +291,57 @@ pcie@1a000000 { gmac0: ethernet@3,0 { reg = <0x1800 0x0 0x0 0x0 0x0>; - interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, - <13 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&pic 12 IRQ_TYPE_LEVEL_HIGH>, + <&pic 13 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; - interrupt-parent = <&pic>; status = "disabled"; }; gmac1: ethernet@3,1 { reg = <0x1900 0x0 0x0 0x0 0x0>; - interrupts = <14 IRQ_TYPE_LEVEL_HIGH>, - <15 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&pic 14 IRQ_TYPE_LEVEL_HIGH>, + <&pic 15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; - interrupt-parent = <&pic>; status = "disabled"; }; gmac2: ethernet@3,2 { reg = <0x1a00 0x0 0x0 0x0 0x0>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, - <18 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&pic 17 IRQ_TYPE_LEVEL_HIGH>, + <&pic 18 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_lpi"; - interrupt-parent = <&pic>; status = "disabled"; }; xhci0: usb@4,0 { reg = <0x2000 0x0 0x0 0x0 0x0>; - interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&pic>; + interrupts-extended = <&pic 48 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; xhci1: usb@19,0 { reg = <0xc800 0x0 0x0 0x0 0x0>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&pic>; + interrupts-extended = <&pic 22 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; display@6,1 { reg = <0x3100 0x0 0x0 0x0 0x0>; - interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&pic>; + interrupts-extended = <&pic 28 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; i2s@7,0 { reg = <0x3800 0x0 0x0 0x0 0x0>; - interrupts = <78 IRQ_TYPE_LEVEL_HIGH>, - <79 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&pic 78 IRQ_TYPE_LEVEL_HIGH>, + <&pic 79 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "tx", "rx"; - interrupt-parent = <&pic>; status = "disabled"; }; sata: sata@8,0 { reg = <0x4000 0x0 0x0 0x0 0x0>; - interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&pic>; + interrupts-extended = <&pic 16 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; };
Signature · 1 line
2.47.3
PATCH v2 4/7 LoongArch: dts: loongson-2k0500: Add default Extend I/O Interrupt controller address cells
In reply to Binbin ZhouAdd missing address-cells 0 to the extend I/O interrupt controller node to silence W=1 warning:
loongson-2k0500.dtsi:513.5-51: Warning (interrupt_map): /bus@10000000/pcie@1a000000/pcie@0,0:interrupt-map:
Missing property '#address-cells' in node /bus@10000000/interrupt-controller@1fe11600, using 0 as fallback
Value '0' is correct because:
1. The extend I/O interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0)
--- arch/loongarch/boot/dts/loongson-2k0500.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/loongarch/boot/dts/loongson-2k0500.dtsi +1 -0
@@ -164,6 +164,7 @@ eiointc: interrupt-controller@1fe11600 { compatible = "loongson,ls2k0500-eiointc"; reg = <0x0 0x1fe11600 0x0 0xea00>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-parent = <&cpuintc>; interrupts = <3>;
Signature · 1 line
2.47.3
Huacai Chen
maintainerRe: [PATCH v2 4/7] LoongArch: dts: loongson-2k0500: Add default Extend I/O Interrupt controller address cells
Hi, Binbin,
Quoted 24 lines · Binbin Zhou
Add missing address-cells 0 to the extend I/O interrupt controller node to silence W=1 warning:
loongson-2k0500.dtsi:513.5-51: Warning (
interrupt_map): /bus@10000000/pcie@1a000000/pcie@0,0:interrupt-map:
Missing property '#address-cells' in node /bus@10000000/interrupt-controller@1fe11600, using 0 as fallbackValue '0' is correct because:
1. The extend I/O interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0)Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/loongson-2k0500.dtsi | 1 + 1 file changed, 1 insertion(+)arch/loongarch/boot/dts/loongson-2k0500.dtsi +0
-0
arch/loongarch/boot/dts/loongson-2k0500.dtsi eiointc: interrupt-controller@1fe11600 { · line 170
Quoted 7 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi +1
-0@@ -164,6 +164,7 @@ eiointc: interrupt-controller@1fe11600 { compatible = "loongson,ls2k0500-eiointc"; reg = <0x0 0x1fe11600 0x0 0xea00>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-parent = <&cpuintc>; interrupts = <3>;
Like Patch-5, I think liointc also need #address-cells, so does Patch-6.
Huacai
Quoted 3 lines
--
2.47.3
Re: [PATCH v2 4/7] LoongArch: dts: loongson-2k0500: Add default Extend I/O Interrupt controller address cells
Hi :
Sorry for the late reply.
Quoted 23 lines · Huacai Chen
Hi, Binbin,
Quoted 19 lines · Binbin Zhou
Add missing address-cells 0 to the extend I/O interrupt controller node to silence W=1 warning:
loongson-2k0500.dtsi:513.5-51: Warning (
interrupt_map): /bus@10000000/pcie@1a000000/pcie@0,0:interrupt-map:
Missing property '#address-cells' in node /bus@10000000/interrupt-controller@1fe11600, using 0 as fallbackValue '0' is correct because:
1. The extend I/O interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0)Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/loongson-2k0500.dtsi | 1 + 1 file changed, 1 insertion(+)
Quoted 13 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi eiointc: interrupt-controller@1fe11600 { · line 170
Quoted 12 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi +1
-0@@ -164,6 +164,7 @@ eiointc: interrupt-controller@1fe11600 { compatible = "loongson,ls2k0500-eiointc"; reg = <0x0 0x1fe11600 0x0 0xea00>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-parent = <&cpuintc>; interrupts = <3>;Like Patch-5, I think liointc also need #address-cells, so does Patch-6.
As Rob said[1], the #address-cells attribute isn't required unless it's always referenced by the interrupt-map attribute, so I'd like to leave the liointc node unchanged.
Add attributes as needed based on existing DTB warnings, and Patch-6 will do the same.
[1]: https://lore.kernel.org/all/[email protected]/
Quoted 6 lines
Huacai
Quoted 3 lines
--
2.47.3
--
Thanks.
Binbin
Huacai Chen
maintainerRe: [PATCH v2 4/7] LoongArch: dts: loongson-2k0500: Add default Extend I/O Interrupt controller address cells
Quoted 43 lines · Binbin Zhou
Hi :
Sorry for the late reply.
Quoted 23 lines · Huacai Chen
Hi, Binbin,
Quoted 19 lines · Binbin Zhou
Add missing address-cells 0 to the extend I/O interrupt controller node to silence W=1 warning:
loongson-2k0500.dtsi:513.5-51: Warning (
interrupt_map): /bus@10000000/pcie@1a000000/pcie@0,0:interrupt-map:
Missing property '#address-cells' in node /bus@10000000/interrupt-controller@1fe11600, using 0 as fallbackValue '0' is correct because:
1. The extend I/O interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0)Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/loongson-2k0500.dtsi | 1 + 1 file changed, 1 insertion(+)Quoted 13 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi eiointc: interrupt-controller@1fe11600 { · line 170
Quoted 12 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi +1
-0@@ -164,6 +164,7 @@ eiointc: interrupt-controller@1fe11600 { compatible = "loongson,ls2k0500-eiointc"; reg = <0x0 0x1fe11600 0x0 0xea00>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-parent = <&cpuintc>; interrupts = <3>;Like Patch-5, I think liointc also need #address-cells, so does Patch-6.
Quoted 3 lines
As Rob said[1], the
#address-cellsattribute isn't required unless it's always referenced by theinterrupt-mapattribute, so I'd like to leave the liointc node unchanged.
I think "not required" doesn't mean "should not exist"?
In my opinion I don't want to add #address-cells again when we add 'interrupt-map' for downstream devices in future.
So, I want to add #address-cells for all interrupt controllers, except "cpu-interrupt-controller" because it won't have direct downstream devices.
Huacai
Quoted 15 lines
Add attributes as needed based on existing DTB warnings, and Patch-6 will do the same.
[1]: https://lore.kernel.org/all/[email protected]/
Quoted 6 lines
Huacai
Quoted 3 lines
--
2.47.3--
Thanks.
Binbin
PATCH v2 5/7 LoongArch: dts: loongson-2k1000: Add default Local I/O Interrupt controller address cells
In reply to Binbin ZhouAdd missing address-cells 0 to the local I/O interrupt controller node to silence W=1 warning:
loongson-2k1000.dtsi:498.5-55: Warning (interrupt_map): /bus@10000000/pcie@1a000000/pcie@9,0:interrupt-map:
Missing property '#address-cells' in node /bus@10000000/interrupt-controller@1fe01440, using 0 as fallback
Value '0' is correct because:
1. The local I/O interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0)
--- arch/loongarch/boot/dts/loongson-2k1000.dtsi | 2 ++ 1 file changed, 2 insertions(+)
arch/loongarch/boot/dts/loongson-2k1000.dtsi +2 -0
@@ -114,6 +114,7 @@ liointc0: interrupt-controller@1fe01400 { <0x0 0x1fe01140 0x0 0x8>; reg-names = "main", "isr0", "isr1"; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; interrupt-parent = <&cpuintc>; interrupts = <2>;
@@ -131,6 +132,7 @@ liointc1: interrupt-controller@1fe01440 { <0x0 0x1fe01148 0x0 0x8>; reg-names = "main", "isr0", "isr1"; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; interrupt-parent = <&cpuintc>; interrupts = <3>;
Signature · 1 line
2.47.3
PATCH v2 6/7 LoongArch: dts: loongson-2k2000: Add default PCH PIC controller address cells
In reply to Binbin ZhouAdd missing address-cells 0 to the PCH PIC Controller node to silence W=1 warning:
loongson-2k2000.dtsi:364.5-49: Warning (interrupt_map): /bus@10000000/pcie@1a000000/pcie@9,0:interrupt-map:
Missing property '#address-cells' in node /bus@10000000/interrupt-controller@10000000, using 0 as fallback
Value '0' is correct because:
1. The PCH PIC controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0)
--- arch/loongarch/boot/dts/loongson-2k2000.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/loongarch/boot/dts/loongson-2k2000.dtsi +1 -0
@@ -149,6 +149,7 @@ pic: interrupt-controller@10000000 { compatible = "loongson,pch-pic-1.0"; reg = <0x0 0x10000000 0x0 0x400>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; loongson,pic-base-vec = <0>; interrupt-parent = <&eiointc>;
Signature · 1 line
2.47.3
PATCH v2 7/7 LoongArch: dts: loongson-2k1000: Fix i2c-gpio node names
In reply to Binbin ZhouFrom: Binbin Zhou <[email protected]>
The binding wants the node to be named "i2c-number", but those are named "i2c-gpio-number" instead.
Rename those to i2c-0, i2c-1 to adhere to the binding and suppress dtbs_check warnings.
--- arch/loongarch/boot/dts/loongson-2k1000.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/loongarch/boot/dts/loongson-2k1000.dtsi +2 -2
@@ -46,7 +46,7 @@ cpuintc: interrupt-controller { }; /* i2c of the dvi eeprom edid */ - i2c-gpio-0 { + i2c-0 { compatible = "i2c-gpio"; scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@@ -57,7 +57,7 @@ i2c-gpio-0 { }; /* i2c of the eeprom edid */ - i2c-gpio-1 { + i2c-1 { compatible = "i2c-gpio"; scl-gpios = <&gpio0 33 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio0 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
Signature · 1 line
2.47.3