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Move ICS CLK chip frequenty calculation code into a common board library

PATCH New Kumar Gala 4 participants 28 messages May 21, 2010 – Jul 14, 2010

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Kumar Gala

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#0 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it.

Convert the P2020DS board as the first to use the new common ICS307 code.

---
 board/freescale/common/Makefile     |    1 +
 board/freescale/common/ics307_clk.c |  101 +++++++++++++++++++++++
 board/freescale/common/ics307_clk.h |   30 +++++++
 board/freescale/p2020ds/p2020ds.c   |  149 -----------------------------------
 include/configs/P2020DS.h           |   16 +---
 5 files changed, 137 insertions(+), 160 deletions(-)
 create mode 100644 board/freescale/common/ics307_clk.c
 create mode 100644 board/freescale/common/ics307_clk.h
board/freescale/common/Makefile +1 -0
index df289aa..d18445b 100644
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MPC8541CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8548CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
+COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/freescale/common/ics307_clk.c new file +101 -0

101 lines not on this page · raw message

board/freescale/common/ics307_clk.h new file +30 -0
new file mode 100644
index 0000000..db3dbc4
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ICS_CLK_H_
+#define __ICS_CLK_H_	1
+
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(void);
+extern unsigned long get_board_ddr_clk(void);
+#endif
+
+#endif	/* __ICS_CLK_H_ */
board/freescale/p2020ds/p2020ds.c +0 -149

155 lines not on this page · raw message

include/configs/P2020DS.h +5 -11
index 66be725..9955501 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include "../board/freescale/common/ics307_clk.h"
+
 #ifdef CONFIG_MK_36BIT
 #define CONFIG_PHYS_64BIT
 #endif
@@ -54,17 +56,9 @@
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
-#ifndef __ASSEMBLY__
-extern unsigned long calculate_board_sys_clk(unsigned long dummy);
-extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
-/* extern unsigned long get_board_sys_clk(unsigned long dummy); */
-/* extern unsigned long get_board_ddr_clk(unsigned long dummy); */
-#endif
-#define CONFIG_SYS_CLK_FREQ	calculate_board_sys_clk(0) /* sysclk for MPC85xx */
-#define CONFIG_DDR_CLK_FREQ	calculate_board_ddr_clk(0) /* ddrclk for MPC85xx */
+#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk() /* sysclk for MPC85xx */
+#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk() /* ddrclk for MPC85xx */
 #define CONFIG_ICS307_REFCLK_HZ	33333000  /* ICS307 clock chip ref freq */
-#define CONFIG_GET_CLK_FROM_ICS307	  /* decode sysclk and ddrclk freq
-					     from ICS307 instead of switches */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
Signature · 1 line
1.6.0.6
author
#1 lore raw

PATCH 1/1 ppc/85xx: Convert MPC8572DS to using board common ICS307 code

---
 board/freescale/common/Makefile       |    1 +
 board/freescale/mpc8572ds/mpc8572ds.c |  145 +--------------------------------
 include/configs/MPC8572DS.h           |   14 +--
 3 files changed, 7 insertions(+), 153 deletions(-)
board/freescale/common/Makefile +1 -0
index d18445b..3498638 100644
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MPC8541CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8548CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
+COBJS-$(CONFIG_MPC8572DS)	+= ics307_clk.o
 COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
board/freescale/mpc8572ds/mpc8572ds.c +1 -144

155 lines not on this page · raw message

include/configs/MPC8572DS.h +5 -9
index 78b7369..41d9662 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2008 Freescale Semiconductor, Inc.
+ * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include "../board/freescale/common/ics307_clk.h"
+
 #ifdef CONFIG_MK_36BIT
 #define CONFIG_PHYS_64BIT
 #endif
@@ -53,15 +55,9 @@
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
-#ifndef __ASSEMBLY__
-extern unsigned long get_board_sys_clk(unsigned long dummy);
-extern unsigned long get_board_ddr_clk(unsigned long dummy);
-#endif
-#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0) /* sysclk for MPC85xx */
-#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk(0) /* ddrclk for MPC85xx */
+#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk() /* sysclk for MPC85xx */
+#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk() /* ddrclk for MPC85xx */
 #define CONFIG_ICS307_REFCLK_HZ	33333000  /* ICS307 clock chip ref freq */
-#define CONFIG_GET_CLK_FROM_ICS307	  /* decode sysclk and ddrclk freq
-					     from ICS307 instead of switches */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
Signature · 1 line
1.6.0.6
author
#2 lore raw

PATCH 1/1 ppc/85xx: Convert MPC8536DS to using board common ICS307 code

---
 board/freescale/common/Makefile       |    1 +
 board/freescale/mpc8536ds/mpc8536ds.c |  148 ---------------------------------
 include/configs/MPC8536DS.h           |   14 +--
 3 files changed, 6 insertions(+), 157 deletions(-)
board/freescale/common/Makefile +1 -0
index 3498638..bd6a09d 100644
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MPC8541CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8548CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
+COBJS-$(CONFIG_MPC8536DS)	+= ics307_clk.o
 COBJS-$(CONFIG_MPC8572DS)	+= ics307_clk.o
 COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 
board/freescale/mpc8536ds/mpc8536ds.c +0 -148

154 lines not on this page · raw message

include/configs/MPC8536DS.h +5 -9
index da4313a..c52b605 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2009,2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include "../board/freescale/common/ics307_clk.h"
+
 #ifdef CONFIG_MK_36BIT
 #define CONFIG_PHYS_64BIT	1
 #endif
@@ -70,15 +72,9 @@
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
-#ifndef __ASSEMBLY__
-extern unsigned long get_board_sys_clk(unsigned long dummy);
-extern unsigned long get_board_ddr_clk(unsigned long dummy);
-#endif
-#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0) /* sysclk for MPC85xx */
-#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk(0)
+#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk() /* sysclk for MPC85xx */
+#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk()
 #define CONFIG_ICS307_REFCLK_HZ	33333000  /* ICS307 clock chip ref freq */
-#define CONFIG_GET_CLK_FROM_ICS307	  /* decode sysclk and ddrclk freq
-					     from ICS307 instead of switches */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
Signature · 1 line
1.6.0.6
#3 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Kumar Gala

Review

Quoted 9 lines · Kumar Gala
(quoted diff) +9 -0
+#ifdef CONFIG_FSL_NGPIXIS
+#include "ngpixis.h"
+#define PIXIS_VSYSCLK0 ? ? ? ? offsetof(struct ngpixis, sclk[0])
+#define PIXIS_VSYSCLK1 ? ? ? ? offsetof(struct ngpixis, sclk[1])
+#define PIXIS_VSYSCLK2 ? ? ? ? offsetof(struct ngpixis, sclk[2])
+#define PIXIS_VDDRCLK0 ? ? ? ? offsetof(struct ngpixis, dclk[0])
+#define PIXIS_VDDRCLK1 ? ? ? ? offsetof(struct ngpixis, dclk[1])
+#define PIXIS_VDDRCLK2 ? ? ? ? offsetof(struct ngpixis, dclk[2])
+#endif

Yuck. I specifically created the ngpixis_t structure because Wolfgang objected to the use of macros for offsets.

But I understand why you did it. It's the easiest way to maintain compatibility between pixis and ngpixis.

board/freescale/common/ics307_clk.c line 41

Quoted 4 lines
board/freescale/common/ics307_clk.c new file +4 -0
+/* decode S[0-2] to Output Divider (OD) */
+static unsigned char ics307_s_to_od[] = {
+ ? ? ? 10, 2, 8, 4, 5, 7, 3, 6
+};

Can you make this a u8 instead?

board/freescale/common/ics307_clk.c line 48

Quoted 2 lines
board/freescale/common/ics307_clk.c new file +2 -0
+static unsigned long
+ics307_clk_freq(unsigned char cw0, unsigned char cw1, unsigned char cw2)

u8's here, also. You might then be able to make this one line.

Quoted 6 lines

+{
+ ? ? ? const unsigned long input_freq = CONFIG_ICS307_REFCLK_HZ;
+ ? ? ? unsigned long VDW = ((cw1 << 1) & 0x1FE) + ((cw2 >> 7) & 1);
+ ? ? ? unsigned long RDW = cw2 & 0x7F;
+ ? ? ? unsigned long OD = ics307_s_to_od[cw0 & 0x7];
+ ? ? ? unsigned long freq;

Wolfgang just asked me not to use camel caps.

board/freescale/common/ics307_clk.h line 28

Quoted 4 lines
board/freescale/common/ics307_clk.h new file +4 -0
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(void);
+extern unsigned long get_board_ddr_clk(void);
+#endif

I don't think we need the "#ifndef __ASSEMBLY__" here.

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
author
#4 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 25 lines · Timur Tabi

board/freescale/common/ics307_clk.c line 36

Quoted 9 lines · Kumar Gala
board/freescale/common/ics307_clk.c new file +9 -0
+#ifdef CONFIG_FSL_NGPIXIS
+#include "ngpixis.h"
+#define PIXIS_VSYSCLK0         offsetof(struct ngpixis, sclk[0])
+#define PIXIS_VSYSCLK1         offsetof(struct ngpixis, sclk[1])
+#define PIXIS_VSYSCLK2         offsetof(struct ngpixis, sclk[2])
+#define PIXIS_VDDRCLK0         offsetof(struct ngpixis, dclk[0])
+#define PIXIS_VDDRCLK1         offsetof(struct ngpixis, dclk[1])
+#define PIXIS_VDDRCLK2         offsetof(struct ngpixis, dclk[2])
+#endif

Yuck. I specifically created the ngpixis_t structure because Wolfgang objected to the use of macros for offsets.

But I understand why you did it. It's the easiest way to maintain compatibility between pixis and ngpixis.

board/freescale/common/ics307_clk.c line 41

Quoted 4 lines
board/freescale/common/ics307_clk.c new file +4 -0
+/* decode S[0-2] to Output Divider (OD) */
+static unsigned char ics307_s_to_od[] = {
+       10, 2, 8, 4, 5, 7, 3, 6
+};

Can you make this a u8 instead?

Quoted 4 lines

board/freescale/common/ics307_clk.c line 48

Quoted 2 lines
board/freescale/common/ics307_clk.c new file +2 -0
+static unsigned long
+ics307_clk_freq(unsigned char cw0, unsigned char cw1, unsigned char cw2)

u8's here, also. You might then be able to make this one line.

will make this change.

Quoted 8 lines

board/freescale/common/ics307_clk.c line 54

Quoted 6 lines
board/freescale/common/ics307_clk.c new file +6 -0
+{
+       const unsigned long input_freq = CONFIG_ICS307_REFCLK_HZ;
+       unsigned long VDW = ((cw1 << 1) & 0x1FE) + ((cw2 >> 7) & 1);
+       unsigned long RDW = cw2 & 0x7F;
+       unsigned long OD = ics307_s_to_od[cw0 & 0x7];
+       unsigned long freq;

Wolfgang just asked me not to use camel caps.

where are there camel caps?

Quoted 7 lines

board/freescale/common/ics307_clk.h line 28

Quoted 5 lines
board/freescale/common/ics307_clk.h new file +4 -0
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(void);
+extern unsigned long get_board_ddr_clk(void);
+#endif

I don't think we need the "#ifndef __ASSEMBLY__" here.

We do.

#5 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Dear Kumar Gala,

Quoted 11 lines · In message <[email protected]> you wrote:
Quoted 9 lines

board/freescale/common/ics307_clk.c line 54

Quoted 7 lines
board/freescale/common/ics307_clk.c new file +6 -0
+{
+       const unsigned long input_freq = CONFIG_ICS307_REFCLK_HZ;
+       unsigned long VDW = ((cw1 << 1) & 0x1FE) + ((cw2 >> 7) & 1);
+       unsigned long RDW = cw2 & 0x7F;
+       unsigned long OD = ics307_s_to_od[cw0 & 0x7];
+       unsigned long freq;

Wolfgang just asked me not to use camel caps.

where are there camel caps?

There aren't. But we do not allow for ALLCAPS identifiers either (these are reserved for macro names).

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Behind every great man, there is a woman -- urging him on.
	-- Harry Mudd, "I, Mudd", stardate 4513.3
author
#6 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Timur Tabi
Quoted 15 lines · Timur Tabi

board/freescale/common/ics307_clk.c line 36

Quoted 9 lines · Kumar Gala
board/freescale/common/ics307_clk.c new file +9 -0
+#ifdef CONFIG_FSL_NGPIXIS
+#include "ngpixis.h"
+#define PIXIS_VSYSCLK0         offsetof(struct ngpixis, sclk[0])
+#define PIXIS_VSYSCLK1         offsetof(struct ngpixis, sclk[1])
+#define PIXIS_VSYSCLK2         offsetof(struct ngpixis, sclk[2])
+#define PIXIS_VDDRCLK0         offsetof(struct ngpixis, dclk[0])
+#define PIXIS_VDDRCLK1         offsetof(struct ngpixis, dclk[1])
+#define PIXIS_VDDRCLK2         offsetof(struct ngpixis, dclk[2])
+#endif

Yuck. I specifically created the ngpixis_t structure because Wolfgang objected to the use of macros for offsets.

Quoted 2 lines

But I understand why you did it. It's the easiest way to maintain compatibility between pixis and ngpixis.

Wolfgang, is this an issue?

The other option is have 3 different structs:

On p2020: #define PIXIS_VSYSCLK0 offsetof(struct ngpixis, sclk[0])
on 8572: #define PIXIS_VSYSCLK0 0x1C
on 8536: #define PIXIS_VSYSCLK0 0x1A

- k

#7 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Dear Kumar Gala,

Quoted 16 lines · In message <[email protected]> you wrote:
Quoted 14 lines · <[email protected]> wrote:

board/freescale/common/ics307_clk.c line 36

Quoted 10 lines
board/freescale/common/ics307_clk.c new file +9 -0
+#ifdef CONFIG_FSL_NGPIXIS
+#include "ngpixis.h"
+#define PIXIS_VSYSCLK0         offsetof(struct ngpixis, sclk[0])
+#define PIXIS_VSYSCLK1         offsetof(struct ngpixis, sclk[1])
+#define PIXIS_VSYSCLK2         offsetof(struct ngpixis, sclk[2])
+#define PIXIS_VDDRCLK0         offsetof(struct ngpixis, dclk[0])
+#define PIXIS_VDDRCLK1         offsetof(struct ngpixis, dclk[1])
+#define PIXIS_VDDRCLK2         offsetof(struct ngpixis, dclk[2])
+#endif

Yuck. I specifically created the ngpixis_t structure because Wolfgang objected to the use of macros for offsets.

Quoted 4 lines
Quoted 2 lines

But I understand why you did it. It's the easiest way to maintain compatibility between pixis and ngpixis.

Wolfgang, is this an issue?

This, in itself, it not an issue.

The issue comes when you wrote code like this:

+ return ics307_clk_freq (
+ in_8(pixis_base + PIXIS_VSYSCLK0),
+ in_8(pixis_base + PIXIS_VSYSCLK1),
+ in_8(pixis_base + PIXIS_VSYSCLK2)
+ );
+}
+
+unsigned long get_board_ddr_clk(void)
+{
+ u8 *pixis_base = (u8 *)PIXIS_BASE;
+
+ return ics307_clk_freq (
+ in_8(pixis_base + PIXIS_VDDRCLK0),
+ in_8(pixis_base + PIXIS_VDDRCLK1),
+ in_8(pixis_base + PIXIS_VDDRCLK2)
+ );

This clearly gets a NAK because you should use a struct, and not base address + offset notation.

Quoted 5 lines

The other option is have 3 different structs:

On p2020: #define PIXIS_VSYSCLK0 offsetof(struct ngpixis, > sclk[0])
on 8572: #define PIXIS_VSYSCLK0 0x1C
on 8536: #define PIXIS_VSYSCLK0 0x1A

I see #defines here, no structs.

I'm not sure if you need different structs (haven't looked into these), or if clever notation of the struct is sufficient.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
A committee is a life form with six or more legs and no brain.
                              -- Lazarus Long, "Time Enough For Love"
#8 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Kumar Gala
Quoted 1 line · Kumar Gala

+COBJS-$(CONFIG_P2020DS) ? ? ? ? ? ? ? ?+= ics307_clk.o

How about changing this to:

COBJS-$(CONFIG_ICS307_REFCLK_HZ) += ics307_clk.o

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
author
#9 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 7 lines · Timur Tabi
Quoted 1 line · Kumar Gala

+COBJS-$(CONFIG_P2020DS) += ics307_clk.o

How about changing this to:

COBJS-$(CONFIG_ICS307_REFCLK_HZ) += ics307_clk.o

I'd rather it be board explicit so new boards ports have to decide if they want to use the code or not.

- k

#10 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Kumar Gala
Quoted 5 lines · Kumar Gala

+ ? ? ? ?* Adding 1 to get a "nicely" rounded number, but this needs
+ ? ? ? ?* more tweaking to get a "properly" rounded number.
+ ? ? ? ?*/
+
+ ? ? ? freq = 1 + (input_freq * 2 * (VDW + 8) / ((RDW + 2) * OD));

Is this rounding algorithm the reason why I get output like this:

Clock Configuration:

       CPU0:799.992 MHz, CPU1:799.992 MHz,
       CCB:399.996 MHz,
       DDR:299.997 MHz (599.994 MT/s data rate) (Asynchronous), LBC:25

MHz

If so, maybe we should fix it?

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
#11 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 9 lines · Timur Tabi

Is this rounding algorithm the reason why I get output like this:

Clock Configuration:
? ? ? CPU0:799.992 MHz, CPU1:799.992 MHz,
? ? ? CCB:399.996 MHz,
? ? ? DDR:299.997 MHz (599.994 MT/s data rate) (Asynchronous), LBC:25 ?MHz

If so, maybe we should fix it?

To answer my own question: yes.

So here's a better version of that function that rounds to the nearest MHz and is of a proper coding style:

static const unsigned long ics307_clk_freq(unsigned char cw0, unsigned char cw1,
unsigned char cw2)

{
	static const u8 s2od[] = {
		10, 2, 8, 4, 5, 7, 3, 6
	};
	unsigned long vdw = (cw1 << 1) | (cw2 >> 7);
	unsigned long rdw = cw2 & 0x7f;
	unsigned long od = s2od[cw0 & 0x7];
	unsigned long freq;

	freq = 2 * CONFIG_ICS307_REFCLK_HZ * (vdw + 8) / ((rdw + 2) * od);

        /* Round freq to the nearest MHz */
	freq += 500000;
	freq /= 1000000;
	freq *= 1000000;

	debug("ICS307: CW[0-2]: %02X %02X %02X => %lu Hz\n", cw0, cw1, cw2,
			freq);
	return freq;
}

And the result:

Clock Configuration:

       CPU0:800  MHz, CPU1:800  MHz,
       CCB:400  MHz,
       DDR:300  MHz (600 MT/s data rate) (Asynchronous), LBC:25   MHz
Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
#12 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Dear Timur Tabi,

Quoted 3 lines · In message <[email protected]> you…

So here's a better version of that function that rounds to the nearest MHz and is of a proper coding style:

Why do we need that?

Quoted 6 lines

And the result:

Clock Configuration:

       CPU0:800  MHz, CPU1:800  MHz,
       CCB:400  MHz,
       DDR:300  MHz (600 MT/s data rate) (Asynchronous), LBC:25   MHz

The result looks ugly (why do we have double spaces after the numbers?, why do the numbers not align vertically?).

This makes me wonder why you use a "%-4s" format in arch/powerpc/cpu/mpc8?xx/cpu.c - may I recommend changing this into "%s" (if you don't care about vertical alignment), or something like "%4s" else?

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
It is surely a great calamity for  a  human  being  to  have  no  ob-
sessions.                                                - Robert Bly
#13 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 4 lines · Wolfgang Denk
Quoted 2 lines

So here's a better version of that function that rounds to the nearest MHz and is of a proper coding style:

Why do we need that?

Um, because you complained about it?

Quoted 10 lines
Quoted 8 lines

board/freescale/common/ics307_clk.c line 54

Quoted 8 lines
board/freescale/common/ics307_clk.c new file +8 -0
+static unsigned long ics307_clk_freq(unsigned char cw0, unsigned char cw1,
+				     unsigned char cw2)
+{
+	const unsigned long InputFrequency = CONFIG_ICS307_REFCLK_HZ;
+	unsigned long VDW = ((cw1 << 1) & 0x1FE) + ((cw2 >> 7) & 1);
+	unsigned long RDW = cw2 & 0x7F;
+	unsigned long OD = ics307_S_to_OD[cw0 & 0x7];
+	unsigned long freq;

Please do not use any CamelCase or UPPER CASE identifiers.

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

Also, because this is silly:

Clock Configuration:

       CPU0:799.992 MHz, CPU1:799.992 MHz,
       CCB:399.996 MHz,
       DDR:299.997 MHz (599.994 MT/s data rate) (Asynchronous), LBC:25   MHz

Why display 799.992 MHZ when 800 MHz makes more sense?

Quoted 5 lines
Quoted 4 lines

Clock Configuration:

       CPU0:800  MHz, CPU1:800  MHz,
       CCB:400  MHz,
       DDR:300  MHz (600 MT/s data rate) (Asynchronous), LBC:25   MHz
Quoted 7 lines

The result looks ugly (why do we have double spaces after the numbers?, why do the numbers not align vertically?).

This makes me wonder why you use a "%-4s" format in arch/powerpc/cpu/mpc8?xx/cpu.c - may I recommend changing this into "%s" (if you don't care about vertical alignment), or something like "%4s" else?

I'm okay with that.

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
#14 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Dear Timur Tabi,

Quoted 7 lines · In message <[email protected]> you wrote:
Quoted 5 lines
Quoted 3 lines

So here's a better version of that function that rounds to the nearest MHz and is of a proper coding style:

Why do we need that?

Um, because you complained about it?

I mean, why do we need that function? strmhz() already includes rounding. Are you really rounding, or cutting off precsion?

Quoted 8 lines

Also, because this is silly:

Clock Configuration:

       CPU0:799.992 MHz, CPU1:799.992 MHz,
       CCB:399.996 MHz,
       DDR:299.997 MHz (599.994 MT/s data rate) (Asynchronous), LBC:25   MHz

Why display 799.992 MHZ when 800 MHz makes more sense?

Hm... does it really make more sense? Or is it just less precise, or do you hush up an error?

799.992 MHz seems to be 24 * 33,333,000 Hz. Are you sure this is the exact quartz frequency on your board? If yes, then the number printed should probably remain 799.992 MHz. Or is it 33,333,333 Hz? Or 33,000,000 ?

Quoted 8 lines
Quoted 7 lines
Quoted 4 lines

Clock Configuration:

       CPU0:800  MHz, CPU1:800  MHz,
       CCB:400  MHz,
       DDR:300  MHz (600 MT/s data rate) (Asynchronous), LBC:25   MHz

The result looks ugly (why do we have double spaces after the numbers?, why do the numbers not align vertically?).

Quoted 6 lines
Quoted 4 lines

This makes me wonder why you use a "%-4s" format in arch/powerpc/cpu/mpc8?xx/cpu.c - may I recommend changing this into "%s" (if you don't care about vertical alignment), or something like "%4s" else?

I'm okay with that.

Fine.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
You can fool some of the people all of the time, and You can fool all
of the people some of the time, but You can't fool mom.
#15 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 4 lines · Wolfgang Denk

799.992 MHz seems to be 24 * 33,333,000 Hz. Are you sure this is the exact quartz frequency on your board? If yes, then the number printed should probably remain 799.992 MHz. Or is it 33,333,333 Hz? Or 33,000,000 ?

Ok, I see your point. Technically, I am returning a less precise number.

However, the current code adds a 1 to the result, which is definitely wrong.
On my board, for example, it returns 99999001, which is not correct. So
the existing "rounding" algorithm is broken.

However, I believe that displaying 799.999 MHz instead of 800 MHz is silly.
The problem is that strmhz() rounds to the nearest KHz. I wonder if that's
really useful. Perhaps we should make it act more like print_size(), where it prints KHz, MHz, or GHz as appropriate, and rounds to the nearest 10th, instead of 1000th.

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
#16 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Dear Timur Tabi,

Quoted 4 lines · In message <[email protected]> you wrote:

However, the current code adds a 1 to the result, which is definitely wrong.
On my board, for example, it returns 99999001, which is not correct. So
the existing "rounding" algorithm is broken.

Agreed.

Quoted 3 lines

However, I believe that displaying 799.999 MHz instead of 800 MHz is silly.
The problem is that strmhz() rounds to the nearest KHz. I wonder if that's
really useful. Perhaps we should make it act more like print_size(), where

Well, the function is "strMHZ", and it prints a frequency in MHz with exactly 3 digits precision - so rounding to the nearest kHz is exactly the right thing to do.

Quoted 2 lines

it prints KHz, MHz, or GHz as appropriate, and rounds to the nearest 10th, instead of 1000th.

That would IMHO be less useful, and require changes to MANY boards (essentially all of them) as the output format needs to be adjusted.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"The first rule of magic is simple. Don't waste your time waving your
hands and hoping when a rock or a club will do."
                                               - McCloctnik the Lucid
#17 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 3 lines · Wolfgang Denk

Well, the function is "strMHZ", and it prints a frequency in MHz with exactly 3 digits precision - so rounding to the nearest kHz is exactly the right thing to do.

Actually, it's not really three significant digits. "799.992" is six significant digits. If you you wanted three, it would have to be "800".

See http://en.wikipedia.org/wiki/Significant_figures

I guess it's a question of taste, but I don't see how printing "799.992 MHz" is better than "800 MHz".

Quoted 5 lines
Quoted 2 lines

it prints KHz, MHz, or GHz as appropriate, and rounds to the nearest 10th, instead of 1000th.

That would IMHO be less useful, and require changes to MANY boards (essentially all of them) as the output format needs to be adjusted.

How about adding a function to strmhz.c that acts like print_size(), and then the caller can choose which one he wants? We could call it print_hz or print_freq.

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
author
#18 lore raw

PATCH 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Wolfgang Denk
Quoted 23 lines · Wolfgang Denk

Dear Timur Tabi,

Quoted 7 lines · In message <[email protected]> you wrote:
Quoted 5 lines
Quoted 3 lines

So here's a better version of that function that rounds to the nearest MHz and is of a proper coding style:

Why do we need that?

Um, because you complained about it?

I mean, why do we need that function? strmhz() already includes rounding. Are you really rounding, or cutting off precsion?

Quoted 8 lines

Also, because this is silly:

Clock Configuration:

      CPU0:799.992 MHz, CPU1:799.992 MHz,
      CCB:399.996 MHz,
      DDR:299.997 MHz (599.994 MT/s data rate) (Asynchronous), LBC:25   MHz

Why display 799.992 MHZ when 800 MHz makes more sense?

Quoted 7 lines

Hm... does it really make more sense? Or is it just less precise, or do you hush up an error?

799.992 MHz seems to be 24 * 33,333,000 Hz. Are you sure this is the exact quartz frequency on your board? If yes, then the number printed should probably remain 799.992 MHz. Or is it 33,333,333 Hz? Or 33,000,000 ?

Its a 33,333,000 Hz input crystal so the math is correct. Rounding in the ICS code is wrong.

- k

author
#19 lore raw

PATCH v2 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Kumar Gala

We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it.

Convert the P2020DS board as the first to use the new common ICS307 code.

---
* Use new common pixis.h for non-NGPIXIS boards
* removed caps

 board/freescale/common/Makefile     |    1 +
 board/freescale/common/ics307_clk.c |   91 +++++++++++++++++++++
 board/freescale/common/ics307_clk.h |   30 +++++++
 board/freescale/p2020ds/p2020ds.c   |  149 -----------------------------------
 include/configs/P2020DS.h           |   16 +---
 5 files changed, 127 insertions(+), 160 deletions(-)
 create mode 100644 board/freescale/common/ics307_clk.c
 create mode 100644 board/freescale/common/ics307_clk.h
board/freescale/common/Makefile +1 -0
index df289aa..d18445b 100644
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MPC8541CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8548CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
+COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/freescale/common/ics307_clk.c new file +91 -0

91 lines not on this page · raw message

board/freescale/common/ics307_clk.h new file +30 -0
new file mode 100644
index 0000000..db3dbc4
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ICS_CLK_H_
+#define __ICS_CLK_H_	1
+
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(void);
+extern unsigned long get_board_ddr_clk(void);
+#endif
+
+#endif	/* __ICS_CLK_H_ */
board/freescale/p2020ds/p2020ds.c +0 -149

155 lines not on this page · raw message

include/configs/P2020DS.h +5 -11
index 66be725..9955501 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include "../board/freescale/common/ics307_clk.h"
+
 #ifdef CONFIG_MK_36BIT
 #define CONFIG_PHYS_64BIT
 #endif
@@ -54,17 +56,9 @@
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
-#ifndef __ASSEMBLY__
-extern unsigned long calculate_board_sys_clk(unsigned long dummy);
-extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
-/* extern unsigned long get_board_sys_clk(unsigned long dummy); */
-/* extern unsigned long get_board_ddr_clk(unsigned long dummy); */
-#endif
-#define CONFIG_SYS_CLK_FREQ	calculate_board_sys_clk(0) /* sysclk for MPC85xx */
-#define CONFIG_DDR_CLK_FREQ	calculate_board_ddr_clk(0) /* ddrclk for MPC85xx */
+#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk() /* sysclk for MPC85xx */
+#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk() /* ddrclk for MPC85xx */
 #define CONFIG_ICS307_REFCLK_HZ	33333000  /* ICS307 clock chip ref freq */
-#define CONFIG_GET_CLK_FROM_ICS307	  /* decode sysclk and ddrclk freq
-					     from ICS307 instead of switches */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
Signature · 1 line
1.6.0.6
#20 lore raw

PATCH v2 1/1 Move ICS CLK chip frequenty calculation code into a common board library

board/freescale/common/ics307_clk.c line 44

Quoted 2 lines · Kumar Gala
board/freescale/common/ics307_clk.c new file +2 -0
+static unsigned long
+ics307_clk_freq(unsigned char cw0, unsigned char cw1, unsigned char cw2)

You forgot to change these to u8

Also, you can declare this function as "const". You could just use the version of this function that I posted, you just need to remove my rounding code.

Quoted 5 lines

+ ? ? ? ?* Adding 1 to get a "nicely" rounded number, but this needs
+ ? ? ? ?* more tweaking to get a "properly" rounded number.
+ ? ? ? ?*/
+
+ ? ? ? freq = 1 + (input_freq * 2 * (vdw + 8) / ((rdw + 2) * od));

The "1 +" is wrong and should be removed. It doesn't do what the comment says it does, and as you said earlier, rounding is wrong for this function.

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
author
#21 lore raw

PATCH v2 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 6 lines · Timur Tabi

board/freescale/common/ics307_clk.c line 44

Quoted 2 lines · Kumar Gala
board/freescale/common/ics307_clk.c new file +2 -0
+static unsigned long
+ics307_clk_freq(unsigned char cw0, unsigned char cw1, unsigned char cw2)

You forgot to change these to u8

Oops, thought that was fixed.

Quoted 3 lines

Also, you can declare this function as "const". You could just use the version of this function that I posted, you just need to remove my rounding code.

What in the world does 'const' get me in C.

Quoted 9 lines

board/freescale/common/ics307_clk.c line 70

Quoted 5 lines
board/freescale/common/ics307_clk.c new file +5 -0
+        * Adding 1 to get a "nicely" rounded number, but this needs
+        * more tweaking to get a "properly" rounded number.
+        */
+
+       freq = 1 + (input_freq * 2 * (vdw + 8) / ((rdw + 2) * od));

The "1 +" is wrong and should be removed. It doesn't do what the comment says it does, and as you said earlier, rounding is wrong for this function.

Dropped the 1+

- k

#22 lore raw

PATCH v2 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 1 line · Kumar Gala

What in the world does 'const' get me in C.

Actually, scrap that. A const function tells the compiler that, for a given set of parameters, the returned value is always the same, so the compiler will eliminate redundant calls to the function. But the problem is that it needs to be a const __attribute__, and the debug() call would need to be deleted for it to be valid anyway.

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
author
#23 lore raw

PATCH v3 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Kumar Gala

We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it.

Convert the P2020DS board as the first to use the new common ICS307 code.

---
* unsigned char -> u8
* remove 1 +

 board/freescale/common/Makefile     |    1 +
 board/freescale/common/ics307_clk.c |   88 ++++++++++++++++++++
 board/freescale/common/ics307_clk.h |   30 +++++++
 board/freescale/p2020ds/p2020ds.c   |  149 -----------------------------------
 include/configs/P2020DS.h           |   16 +---
 5 files changed, 124 insertions(+), 160 deletions(-)
 create mode 100644 board/freescale/common/ics307_clk.c
 create mode 100644 board/freescale/common/ics307_clk.h
board/freescale/common/Makefile +1 -0
index df289aa..d18445b 100644
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MPC8541CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8548CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
+COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/freescale/common/ics307_clk.c new file +88 -0

88 lines not on this page · raw message

board/freescale/common/ics307_clk.h new file +30 -0
new file mode 100644
index 0000000..db3dbc4
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ICS_CLK_H_
+#define __ICS_CLK_H_	1
+
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(void);
+extern unsigned long get_board_ddr_clk(void);
+#endif
+
+#endif	/* __ICS_CLK_H_ */
board/freescale/p2020ds/p2020ds.c +0 -149

155 lines not on this page · raw message

include/configs/P2020DS.h +5 -11
index 66be725..9955501 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include "../board/freescale/common/ics307_clk.h"
+
 #ifdef CONFIG_MK_36BIT
 #define CONFIG_PHYS_64BIT
 #endif
@@ -54,17 +56,9 @@
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
-#ifndef __ASSEMBLY__
-extern unsigned long calculate_board_sys_clk(unsigned long dummy);
-extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
-/* extern unsigned long get_board_sys_clk(unsigned long dummy); */
-/* extern unsigned long get_board_ddr_clk(unsigned long dummy); */
-#endif
-#define CONFIG_SYS_CLK_FREQ	calculate_board_sys_clk(0) /* sysclk for MPC85xx */
-#define CONFIG_DDR_CLK_FREQ	calculate_board_ddr_clk(0) /* ddrclk for MPC85xx */
+#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk() /* sysclk for MPC85xx */
+#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk() /* ddrclk for MPC85xx */
 #define CONFIG_ICS307_REFCLK_HZ	33333000  /* ICS307 clock chip ref freq */
-#define CONFIG_GET_CLK_FROM_ICS307	  /* decode sysclk and ddrclk freq
-					     from ICS307 instead of switches */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
Signature · 1 line
1.6.0.6
#24 lore raw

PATCH v3 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Quoted 9 lines · Kumar Gala

We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. ?Move the code into a common location so we share it.

Convert the P2020DS board as the first to use the new common ICS307 code.

---

Signature · 2 lines
Timur Tabi
Linux kernel developer at Freescale
author Applied
#25 lore raw

PATCH v3 1/1 Move ICS CLK chip frequenty calculation code into a common board library

In reply to Kumar Gala
Quoted 11 lines · Kumar Gala

We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it.

Convert the P2020DS board as the first to use the new common ICS307 code.

---
* unsigned char -> u8
* remove 1 +

applied to 85xx

- k

#26 lore raw

PATCH v3 1/1 Move ICS CLK chip frequenty calculation code into a common board library

Dear Kumar Gala,

Quoted 10 lines · In message <[email protected]> you wrote:
Quoted 7 lines · Kumar Gala

We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it.

Convert the P2020DS board as the first to use the new common ICS307 code.

Quoted 6 lines
Quoted 4 lines

---
* unsigned char -> u8
* remove 1 +

applied to 85xx

Please fix the typo in the Subject when applying (or request a resubmit). Thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"Love is an ideal thing, marriage a real thing; a  confusion  of  the
real with the ideal never goes unpunished."                  - Goethe
author
#27 lore raw

PATCH v4 1/1 Move ICS CLK chip frequency calculation code into a common board library

In reply to Kumar Gala

We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it.

Convert the P2020DS board as the first to use the new common ICS307 code.

---
* Fixed commit message spelling

 board/freescale/common/Makefile     |    1 +
 board/freescale/common/ics307_clk.c |   88 ++++++++++++++++++++
 board/freescale/common/ics307_clk.h |   30 +++++++
 board/freescale/p2020ds/p2020ds.c   |  149 -----------------------------------
 include/configs/P2020DS.h           |   16 +---
 5 files changed, 124 insertions(+), 160 deletions(-)
 create mode 100644 board/freescale/common/ics307_clk.c
 create mode 100644 board/freescale/common/ics307_clk.h
board/freescale/common/Makefile +1 -0
index df289aa..d18445b 100644
@@ -42,6 +42,7 @@ COBJS-$(CONFIG_MPC8541CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8548CDS)	+= cds_pci_ft.o
 COBJS-$(CONFIG_MPC8555CDS)	+= cds_pci_ft.o
 
+COBJS-$(CONFIG_P2020DS)		+= ics307_clk.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
board/freescale/common/ics307_clk.c new file +88 -0

88 lines not on this page · raw message

board/freescale/common/ics307_clk.h new file +30 -0
new file mode 100644
index 0000000..db3dbc4
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ICS_CLK_H_
+#define __ICS_CLK_H_	1
+
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(void);
+extern unsigned long get_board_ddr_clk(void);
+#endif
+
+#endif	/* __ICS_CLK_H_ */
board/freescale/p2020ds/p2020ds.c +0 -149

155 lines not on this page · raw message

include/configs/P2020DS.h +5 -11
index 66be725..9955501 100644
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -27,6 +27,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include "../board/freescale/common/ics307_clk.h"
+
 #ifdef CONFIG_MK_36BIT
 #define CONFIG_PHYS_64BIT
 #endif
@@ -54,17 +56,9 @@
 #define CONFIG_TSEC_ENET		/* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 
-#ifndef __ASSEMBLY__
-extern unsigned long calculate_board_sys_clk(unsigned long dummy);
-extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
-/* extern unsigned long get_board_sys_clk(unsigned long dummy); */
-/* extern unsigned long get_board_ddr_clk(unsigned long dummy); */
-#endif
-#define CONFIG_SYS_CLK_FREQ	calculate_board_sys_clk(0) /* sysclk for MPC85xx */
-#define CONFIG_DDR_CLK_FREQ	calculate_board_ddr_clk(0) /* ddrclk for MPC85xx */
+#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk() /* sysclk for MPC85xx */
+#define CONFIG_DDR_CLK_FREQ	get_board_ddr_clk() /* ddrclk for MPC85xx */
 #define CONFIG_ICS307_REFCLK_HZ	33333000  /* ICS307 clock chip ref freq */
-#define CONFIG_GET_CLK_FROM_ICS307	  /* decode sysclk and ddrclk freq
-					     from ICS307 instead of switches */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
Signature · 1 line
1.6.0.6