irqchip: Add Sophgo SG2042 MSI controller

From: Chen Wang <[email protected]>

This controller is on the Sophgo SG2042 SoC to transform interrupts from PCIe MSI to PLIC interrupts.

Thanks,
Chen

---

Changes in v5:
The patch series is based on v6.14-rc4.

Improved driver code to directly get PLIC node from args.fwnode as per comments from Inochi Amaoto, thanks.

Changes in v4:
The patch series is based on v6.14-rc1. You can simply review or test the patches at the link [4].

Fixed following issues as per comments from Inochi Amaoto, Rob Herring, thanks.

- bindings:
- Update sequence of "reg-names".
- Remove reference to/schemas/interrupts.yaml
- Add "#msi-cells".
- Improve driver code:
- Use fwnode_* instead of of_*.
- Some other coding style improvements.

Changes in v3:
The patch series is based on v6.13-rc7. You can simply review or test the patches at the link [3].

Fixed following issues as per comments from Krzysztof Kozlowski, Samuel Holland, Christophe JAILLET, Inochi Amaoto, thanks.

- bindings: use reg for doorbell, fixed wrong usage of additionalProperties and misc.
- Improve driver code:
- Fixed potentional memory leak issues.
- Fixed some build warnings reported by test robot.
- Optimize and simplify the code when allocating hwirq.
- Use DECLARE_BITMAP instead of kzalloc.
- Some other coding style improvements.

Changes in v2:
The patch series is based on v6.13-rc2. You can simply review or test the patches at the link [2].

Fixed following issues as per comments from Rob Herring, Thomas Gleixner, thanks.

- Improve driver binding description, use msi-ranges instread.
- Improve driver code:
- Improve coding style.
- Fixed bug that possible memory leak of bitmap when sg2042_msi_init_domains returns error.
- Use guard(mutex).
- Use the MSI parent model.

Changes in v1:
The patch series is based on v6.12-rc7. You can simply review or test the patches at the link [1].

---

Chen Wang (3):
dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI
irqchip: Add the Sophgo SG2042 MSI interrupt controller
riscv: sophgo: dts: add msi controller for SG2042

 .../sophgo,sg2042-msi.yaml                    |  61 +++++
 arch/riscv/boot/dts/sophgo/sg2042.dtsi        |  10 +
 drivers/irqchip/Kconfig                       |  12 +
 drivers/irqchip/Makefile                      |   1 +
 drivers/irqchip/irq-sg2042-msi.c              | 258 ++++++++++++++++++
 5 files changed, 342 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml
 create mode 100644 drivers/irqchip/irq-sg2042-msi.c

base-commit: d082ecbc71e9e0bf49883ee4afd435a77a5101b6

2.34.1

From: Chen Wang <[email protected]>

Add binding for Sophgo SG2042 MSI controller.

---
 .../sophgo,sg2042-msi.yaml                    | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml

new file mode 100644
index 000000000000..e1ffd55fa7bf
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2042 MSI Controller
+
+maintainers:
+  - Chen Wang <[email protected]>
+
+description:
+  This interrupt controller is in Sophgo SG2042 for transforming interrupts from
+  PCIe MSI to PLIC interrupts.
+
+allOf:
+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
+
+properties:
+  compatible:
+    const: sophgo,sg2042-msi
+
+  reg:
+    items:
+      - description: clear register
+      - description: msi doorbell address
+
+  reg-names:
+    items:
+      - const: clr
+      - const: doorbell
+
+  msi-controller: true
+
+  msi-ranges:
+    maxItems: 1
+
+  "#msi-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - msi-controller
+  - msi-ranges
+  - "#msi-cells"
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    msi-controller@30000000 {
+      compatible = "sophgo,sg2042-msi";
+      reg = <0x30000000 0x4>, <0x30000008 0x4>;
+      reg-names = "clr", "doorbell";
+      msi-controller;
+      #msi-cells = <0>;
+      msi-ranges = <&plic 64 IRQ_TYPE_LEVEL_HIGH 32>;
+    };

2.34.1

From: Chen Wang <[email protected]>

Add driver for Sophgo SG2042 MSI interrupt controller.

---
 drivers/irqchip/Kconfig          |  12 ++
 drivers/irqchip/Makefile         |   1 +
 drivers/irqchip/irq-sg2042-msi.c | 258 +++++++++++++++++++++++++++++++
 3 files changed, 271 insertions(+)
 create mode 100644 drivers/irqchip/irq-sg2042-msi.c

index c11b9965c4ad..078ed8b55b34 100644
@@ -752,6 +752,18 @@ config MCHP_EIC
 	help
 	  Support for Microchip External Interrupt Controller.
 
+config SOPHGO_SG2042_MSI
+	bool "Sophgo SG2042 MSI Controller"
+	depends on ARCH_SOPHGO || COMPILE_TEST
+	depends on PCI
+	select IRQ_DOMAIN_HIERARCHY
+	select IRQ_MSI_LIB
+	select PCI_MSI
+	help
+	  Support for the Sophgo SG2042 MSI Controller.
+	  This on-chip interrupt controller enables MSI sources to be
+	  routed to the primary PLIC controller on SoC.
+
 config SUNPLUS_SP7021_INTC
 	bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST
 	default SOC_SP7021

index 25e9ad29b8c4..dd60e597491d 100644
@@ -128,4 +128,5 @@ obj-$(CONFIG_WPCM450_AIC)		+= irq-wpcm450-aic.o
 obj-$(CONFIG_IRQ_IDT3243X)		+= irq-idt3243x.o
 obj-$(CONFIG_APPLE_AIC)			+= irq-apple-aic.o
 obj-$(CONFIG_MCHP_EIC)			+= irq-mchp-eic.o
+obj-$(CONFIG_SOPHGO_SG2042_MSI)		+= irq-sg2042-msi.o
 obj-$(CONFIG_SUNPLUS_SP7021_INTC)	+= irq-sp7021-intc.o

2.34.1

From: Chen Wang <[email protected]>

Add msi-controller node to dts for SG2042.

---
 arch/riscv/boot/dts/sophgo/sg2042.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

index e62ac51ac55a..fef2a0e0f7a3 100644
@@ -173,6 +173,16 @@ pllclk: clock-controller@70300100c0 {
 			#clock-cells = <1>;
 		};
 
+		msi: msi-controller@7030010304 {
+			compatible = "sophgo,sg2042-msi";
+			reg = <0x70 0x30010304 0x0 0x4>,
+			      <0x70 0x30010300 0x0 0x4>;
+			reg-names = "clr", "doorbell";
+			msi-controller;
+			#msi-cells = <0>;
+			msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>;
+		};
+
 		rpgate: clock-controller@7030010368 {
 			compatible = "sophgo,sg2042-rpgate";
 			reg = <0x70 0x30010368 0x0 0x98>;

2.34.1