irqchip: Add Sophgo SG2042 MSI controller
Status from this message: This series was applied to riscv/linux.git (fixes)
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v5 Latest3 patches 0 repliesApplied 3/3
- v43 patches 3 repliesSuperseded
- v33 patches 11 repliesSuperseded
Earlier versions · 2
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v2 | 3 patches | 10 replies | Superseded | |
| v1 | 3 patches | 6 replies | Superseded |
Changes in v5 from the cover letter
The patch series is based on v6.14-rc4.
Patches in v5 All 3 applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/3 | dt-bindings: interrupt-controller: Add Sophgo SG2042 MSIDocumentation/ | +61 | 0 replies | Applied |
| 2/3 | irqchip: Add the Sophgo SG2042 MSI interrupt controllerdrivers/ drivers/ drivers/ | +271 | 0 replies | Applied |
| 3/3 | riscv: sophgo: dts: add msi controller for SG2042arch/ | +10 | 0 replies | Applied |
Reviews trailers per patch
2 of 3 patches have a Reviewed-by or Acked-by.
| Patch | Rob Herring (Arm) | Inochi Amaoto |
|---|---|---|
| 1/3 | R-b | |
| 2/3 | R-b | |
| 3/3 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH v5 0/3] irqchip: Add Sophgo SG2042 MSI controller
From: Chen Wang <[email protected]>
This controller is on the Sophgo SG2042 SoC to transform interrupts from PCIe MSI to PLIC interrupts.
Thanks,
Chen
---
Changes in v5:
The patch series is based on v6.14-rc4.
Improved driver code to directly get PLIC node from args.fwnode as per comments from Inochi Amaoto, thanks.
Changes in v4:
The patch series is based on v6.14-rc1. You can simply review or test the patches at the link [4].
Fixed following issues as per comments from Inochi Amaoto, Rob Herring, thanks.
- bindings:
- Update sequence of "reg-names".
- Remove reference to/schemas/interrupts.yaml
- Add "#msi-cells".
- Improve driver code:
- Use fwnode_* instead of of_*.
- Some other coding style improvements.
Changes in v3:
The patch series is based on v6.13-rc7. You can simply review or test the patches at the link [3].
Fixed following issues as per comments from Krzysztof Kozlowski, Samuel Holland, Christophe JAILLET, Inochi Amaoto, thanks.
- bindings: use reg for doorbell, fixed wrong usage of additionalProperties and misc.
- Improve driver code:
- Fixed potentional memory leak issues.
- Fixed some build warnings reported by test robot.
- Optimize and simplify the code when allocating hwirq.
- Use DECLARE_BITMAP instead of kzalloc.
- Some other coding style improvements.
Changes in v2:
The patch series is based on v6.13-rc2. You can simply review or test the patches at the link [2].
Fixed following issues as per comments from Rob Herring, Thomas Gleixner, thanks.
- Improve driver binding description, use msi-ranges instread.
- Improve driver code:
- Improve coding style.
- Fixed bug that possible memory leak of bitmap when sg2042_msi_init_domains returns error.
- Use guard(mutex).
- Use the MSI parent model.
Changes in v1:
The patch series is based on v6.12-rc7. You can simply review or test the patches at the link [1].
---
Chen Wang (3):
dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI
irqchip: Add the Sophgo SG2042 MSI interrupt controller
riscv: sophgo: dts: add msi controller for SG2042
.../sophgo,sg2042-msi.yaml | 61 +++++ arch/riscv/boot/dts/sophgo/sg2042.dtsi | 10 + drivers/irqchip/Kconfig | 12 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sg2042-msi.c | 258 ++++++++++++++++++ 5 files changed, 342 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml create mode 100644 drivers/irqchip/irq-sg2042-msi.c
base-commit: d082ecbc71e9e0bf49883ee4afd435a77a5101b6
Signature · 1 line
2.34.1