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qspi controller: Normal, quad and memory mapped read support

PATCH Superseded Sourav Poddar 4 participants 27 messages Jul 23, 2013 – Oct 7, 2013

Subsystems (3)

v2 of 6 Superseded Latest is v6 →

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#0 lore raw

v2 cover qspi controller: Normal, quad and memory mapped read support

This patch series add uboot ti qspi controller driver.

QSPI is a kind of spi module that allows single, dual and quad read access to external spi devices. The module has a memory mapped interface which provide direct interface for accessing data form external spi devices.

SPI mode
-------
SPI mode uses mtd spi framework for transfer and reception of data. Can be used in:
1. Normal mode: use single pin for transfers
2. Dual Mode: use two pins for transfers.
3. Quad mode: use four pin for transfer

Memory mapped read mode
-----------------------
In this, SPI controller is configured using configuration port and then controler is switched to memory mapped port for data read.

Series proposed suport for quad read as well as memory mapped read in spi mtd frameowrk as well as ti qpsi driver.

Test info is attached as the last patch in the series.

Matt Porter (3):
omap5: add qspi support
spi: add TI QSPI driver
dra7xx_evm: add SPL API, QSPI, and serial flash support

Ravikumar Kattekola (1):
drivers: mtd: qspi: Add quad read support

Sourav Poddar (4):
armv7: hw_data: change clock divider setting.
drivers: mtd: spi: Modify read/write command for sfl256s flash.
driver: spi: Add memory mapped read support
README: qspi usecase and testing documentation.

 arch/arm/cpu/armv7/omap5/hw_data.c     |    9 +-
 arch/arm/cpu/armv7/omap5/prcm-regs.c   |    1 +
 arch/arm/include/asm/arch-omap5/omap.h |    3 +
 arch/arm/include/asm/arch-omap5/spl.h  |    1 +
 arch/arm/include/asm/omap_common.h     |    1 +
 board/ti/dra7xx/mux_data.h             |   10 +
 doc/README.ti_qspi_dra_test            |   38 ++++
 doc/README.ti_qspi_flash               |   47 +++++
 drivers/mtd/spi/spansion.c             |    1 +
 drivers/mtd/spi/spi_flash.c            |  148 ++++++++++++++-
 drivers/mtd/spi/spi_flash_internal.h   |    2 +
 drivers/spi/Makefile                   |    1 +
 drivers/spi/ti_qspi.c                  |  327 ++++++++++++++++++++++++++++++++
 include/configs/dra7xx_evm.h           |   19 ++
 include/spi.h                          |    5 +
 15 files changed, 610 insertions(+), 3 deletions(-)
 create mode 100644 doc/README.ti_qspi_dra_test
 create mode 100644 doc/README.ti_qspi_flash
 create mode 100644 drivers/spi/ti_qspi.c
#1 lore raw

PATCH v2 1/8 omap5: add qspi support

From: Matt Porter <[email protected]>

Add QSPI definitions and clock configuration support.

---
 arch/arm/cpu/armv7/omap5/hw_data.c     |    7 +++++++
 arch/arm/cpu/armv7/omap5/prcm-regs.c   |    1 +
 arch/arm/include/asm/arch-omap5/omap.h |    3 +++
 arch/arm/include/asm/arch-omap5/spl.h  |    1 +
 arch/arm/include/asm/omap_common.h     |    1 +
 5 files changed, 13 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/omap5/hw_data.c +7 -0
index 07b1108..4d0eb45 100644
@@ -425,6 +425,9 @@ void enable_basic_clocks(void)
 		(*prcm)->cm_wkup_wdtimer2_clkctrl,
 		(*prcm)->cm_l4per_uart3_clkctrl,
 		(*prcm)->cm_l4per_i2c1_clkctrl,
+	#ifdef CONFIG_TI_QSPI
+		(*prcm)->cm_l4per_qspi_clkctrl,
+	#endif
 		0
 	};
 
@@ -453,6 +456,10 @@ void enable_basic_clocks(void)
 			 clk_modules_explicit_en_essential,
 			 1);
 
+#ifdef CONFIG_TI_QSPI
+	setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24));
+#endif
+
 	/* Enable SCRM OPT clocks for PER and CORE dpll */
 	setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
 			OPTFCLKEN_SCRM_PER_MASK);
arch/arm/cpu/armv7/omap5/prcm-regs.c +1 -0
index e839ff5..7d41744 100644
@@ -942,6 +942,7 @@ struct prcm_regs const dra7xx_prcm = {
 	.cm_l4per_gpio8_clkctrl			= 0x4a009818,
 	.cm_l4per_mmcsd3_clkctrl		= 0x4a009820,
 	.cm_l4per_mmcsd4_clkctrl		= 0x4a009828,
+	.cm_l4per_qspi_clkctrl			= 0x4a009838,
 	.cm_l4per_uart1_clkctrl			= 0x4a009840,
 	.cm_l4per_uart2_clkctrl			= 0x4a009848,
 	.cm_l4per_uart3_clkctrl			= 0x4a009850,
arch/arm/include/asm/arch-omap5/omap.h +3 -0
index 5e6d82e..30c913e 100644
@@ -77,6 +77,9 @@
 /* GPMC */
 #define OMAP54XX_GPMC_BASE	0x50000000
 
+/* QSPI */
+#define QSPI_BASE		0x4B300000
+
 /*
  * Hardware Register Details
  */
arch/arm/include/asm/arch-omap5/spl.h +1 -0
index d4d353c..8905cb8 100644
@@ -31,6 +31,7 @@
 #define BOOT_DEVICE_MMC1        5
 #define BOOT_DEVICE_MMC2        6
 #define BOOT_DEVICE_MMC2_2	7
+#define BOOT_DEVICE_SPI		10
 
 #define MMC_BOOT_DEVICES_START	BOOT_DEVICE_MMC1
 #define MMC_BOOT_DEVICES_END	BOOT_DEVICE_MMC2_2
arch/arm/include/asm/omap_common.h +1 -0
index 0dbe81b..e37de8c 100644
@@ -281,6 +281,7 @@ struct prcm_regs {
 	u32 cm_l4per_mmcsd4_clkctrl;
 	u32 cm_l4per_msprohg_clkctrl;
 	u32 cm_l4per_slimbus2_clkctrl;
+	u32 cm_l4per_qspi_clkctrl;
 	u32 cm_l4per_uart1_clkctrl;
 	u32 cm_l4per_uart2_clkctrl;
 	u32 cm_l4per_uart3_clkctrl;
Signature · 1 line
1.7.1
#2 lore raw

PATCH v2 2/8 armv7: hw_data: change clock divider setting.

In reply to Sourav Poddar

Clock requirement for qspi clk is 192 Mhz. According to the below formulae,

f dpll = f ref * 2 * m /(n + 1)
clockoutx2_Hmn = f dpll / (hmn+ 1)

fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz For clockoutx2_Hmn to be 768, hmn + 1 should be 4.

---
 arch/arm/cpu/armv7/omap5/hw_data.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/cpu/armv7/omap5/hw_data.c +1 -1
index 4d0eb45..ef52d43 100644
@@ -186,7 +186,7 @@ static const struct dpll_params per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {
 
 static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {
 	{32, 0, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1},		/* 12 MHz   */
-	{96, 4, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1},		/* 20 MHz   */
+	{96, 4, 4, 1, 3, 4, 4, 2, -1, -1, -1, -1},		/* 20 MHz   */
 	{160, 6, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1},		/* 16.8 MHz */
 	{20, 0, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1},		/* 19.2 MHz */
 	{192, 12, 4, 1, 3, 4, 10, 2, -1, -1, -1, -1},		/* 26 MHz   */
Signature · 1 line
1.7.1
#3 lore raw

PATCH v2 3/8 spi: add TI QSPI driver

In reply to Sourav Poddar

From: Matt Porter <[email protected]>

Adds a SPI master driver for the TI QSPI peripheral.

---
 drivers/spi/Makefile  |    1 +
 drivers/spi/ti_qspi.c |  262 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 263 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/ti_qspi.c
drivers/spi/Makefile +1 -0
index d08609e..f51033d 100644
@@ -54,6 +54,7 @@ COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
 COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
 COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
 COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
+COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
 COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
 
 COBJS	:= $(COBJS-y)
drivers/spi/ti_qspi.c new file +262 -0

262 lines not on this page · raw message

Signature · 1 line
1.7.1
#4 lore raw

PATCH v2 3/8 spi: add TI QSPI driver

Dear Sourav Poddar,

Quoted 11 lines · In message <[email protected]> you wrote:

From: Matt Porter <[email protected]>

Adds a SPI master driver for the TI QSPI peripheral.

---
 drivers/spi/Makefile  |    1 +
 drivers/spi/ti_qspi.c |  262 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 263 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/ti_qspi.c

when submitting a new version of a patch or patch series, it is mandatory to supply a chancgelog that desribes what you changed compareds to previous versions of the patch. This is necessary so that reviewers can see which of their hints were taken into account, etc.

This is missing in all you patches of this series.

Also, please run all your patches through checkpatch _before_ submitting. For this patch, I get some "line over 80 characters" wanings that need to be fixed. This should not happen. Please be more careful next time.

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
We see things not as they are, but as we are.       - H. M. Tomlinson
#5 lore raw

PATCH v2 3/8 spi: add TI QSPI driver

Quoted 14 lines · Wolfgang Denk

Dear Sourav Poddar,

Quoted 11 lines · In message<[email protected]> you wrote:

From: Matt Porter<[email protected]>

Adds a SPI master driver for the TI QSPI peripheral.

---
  drivers/spi/Makefile  |    1 +
  drivers/spi/ti_qspi.c |  262 +++++++++++++++++++++++++++++++++++++++++++++++++
  2 files changed, 263 insertions(+), 0 deletions(-)

create mode 100644 drivers/spi/ti_qspi.c

Quoted 7 lines

when submitting a new version of a patch or patch series, it is mandatory to supply a chancgelog that desribes what you changed compareds to previous versions of the patch. This is necessary so that reviewers can see which of their hints were taken into account, etc.

This is missing in all you patches of this series.

Ok. will add in the next version.

Quoted 5 lines

Also, please run all your patches through checkpatch _before_ submitting. For this patch, I get some "line over 80 characters" wanings that need to be fixed. This should not happen. Please be more careful next time.

Hmm...will check and remove.

Quoted 4 lines

Best regards,

Wolfgang Denk

#6 lore raw

PATCH v2 4/8 dra7xx_evm: add SPL API, QSPI, and serial flash support

In reply to Sourav Poddar

From: Matt Porter <[email protected]>

Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode.

---
 board/ti/dra7xx/mux_data.h   |   10 ++++++++++
 include/configs/dra7xx_evm.h |   17 +++++++++++++++++
 2 files changed, 27 insertions(+), 0 deletions(-)
board/ti/dra7xx/mux_data.h +10 -0
index 338a241..2441c55 100644
@@ -53,5 +53,15 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
 	{UART1_RTSN, (IEN | PTU | PDIS | M3)},	/* UART1_RTSN */
 	{I2C1_SDA, (IEN | PTU | PDIS | M0)},	/* I2C1_SDA */
 	{I2C1_SCL, (IEN | PTU | PDIS | M0)},	/* I2C1_SCL */
+	{GPMC_A13, (IEN | PDIS | M1)},	/* QSPI1_RTCLK */
+	{GPMC_A14, (IEN | PDIS | M1)},  /* QSPI1_D[3] */
+	{GPMC_A15, (IEN | PDIS | M1)},	/* QSPI1_D[2] */
+	{GPMC_A16, (IEN | PDIS | M1)},	/* QSPI1_D[1] */
+	{GPMC_A17, (IEN | PDIS | M1)},	/* QSPI1_D[0] */
+	{GPMC_A18, (IEN | PDIS | M1)},	/* QSPI1_SCLK */
+	{GPMC_A3, (IEN | PDIS | M1)},	/* QSPI1_CS2 */
+	{GPMC_A4, (IEN | PDIS | M1)},	/* QSPI1_CS3 */
+	{GPMC_CS2, (IEN | PTU | PDIS | M1)},	/* QSPI1_CS0 */
+	{GPMC_CS3, (IEN | PTU | PDIS | M1)},	/* QSPI1_CS1*/
 };
 #endif /* _MUX_DATA_DRA7XX_H_ */
include/configs/dra7xx_evm.h +17 -0
index c11f005..f30a795 100644
@@ -44,4 +44,21 @@
 
 #define CONSOLEDEV		"ttyO0"
 
+/* SPI */
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SF_DEFAULT_SPEED                12000000
+#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS             0
+#define CONFIG_SPL_SPI_CS              0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
+
 #endif /* __CONFIG_DRA7XX_EVM_H */
Signature · 1 line
1.7.1
#7 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

In reply to Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because ti qpsi controller CS will get de asserted after 4096 bytes.

---
 drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
 1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +31 -1
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 		else
 			read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+		unsigned long page_addr, byte_addr, page_size;
+		size_t chunk_len, actual;
+		int ret = 0;
+
+		page_size = flash->page_size;
+		page_addr = offset / page_size;
+		byte_addr = offset % page_size;
+
+		for (actual = 0; actual < read_len; actual += chunk_len) {
+			chunk_len = min(read_len - actual, page_size - byte_addr);
+
+			cmd[1] = page_addr >> 8;
+			cmd[2] = page_addr;
+			cmd[3] = byte_addr;
+
+			ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+					data + actual, chunk_len);
+			if (ret < 0) {
+				debug("SF: read failed");
+				break;
+			}
+
+			byte_addr += chunk_len;
+			if (byte_addr == page_size) {
+				page_addr++;
+				byte_addr = 0;
+			}
+		}
+#else
 		spi_flash_addr(offset, cmd);
 
 		ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 			debug("SF: read failed\n");
 			break;
 		}
-
+#endif
 		offset += read_len;
 		len -= read_len;
 		data += read_len;
Signature · 1 line
1.7.1
#8 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

+ jagan,

Quoted 51 lines · Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because ti qpsi controller CS will get de asserted after 4096 bytes.

---
  drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
  1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
  		else
  			read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+		unsigned long page_addr, byte_addr, page_size;
+		size_t chunk_len, actual;
+		int ret = 0;
+
+		page_size = flash->page_size;
+		page_addr = offset / page_size;
+		byte_addr = offset % page_size;
+
+		for (actual = 0; actual<  read_len; actual += chunk_len) {
+			chunk_len = min(read_len - actual, page_size - byte_addr);
+
+			cmd[1] = page_addr>>  8;
+			cmd[2] = page_addr;
+			cmd[3] = byte_addr;
+
+			ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+					data + actual, chunk_len);
+			if (ret<  0) {
+				debug("SF: read failed");
+				break;
+			}
+
+			byte_addr += chunk_len;
+			if (byte_addr == page_size) {
+				page_addr++;
+				byte_addr = 0;
+			}
+		}
+#else
  		spi_flash_addr(offset, cmd);
 
  		ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, · line 347

Quoted 8 lines
drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
  			debug("SF: read failed\n");
  			break;
  		}
-
+#endif
  		offset += read_len;
  		len -= read_len;
  		data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read api in mtd framework.
This requires me to send the read command every time in range upto 4096 bytes only.

To overcome this, I have updated the mtd read based on TI_QSPI config as done above.

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

#9 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Hi,

Quoted 12 lines · Sourav Poddar

drivers/mtd/spi/spi_flash.c int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, · line 347

Quoted 9 lines
drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 			debug("SF: read failed\n");
 			break;
 		}
-
+#endif
 		offset += read_len;
 		len -= read_len;
 		data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

Quoted 2 lines

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.

constraint is 4096 *words*. If you're using anything other than 8-bits per word, your statement doesn't make sense.

Signature · 8 lines
balbi
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#10 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Quoted 15 lines · Felipe Balbi

Hi,

Quoted 12 lines · Sourav Poddar

drivers/mtd/spi/spi_flash.c int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, · line 347

Quoted 9 lines
drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
  			debug("SF: read failed\n");
  			break;
  		}
-
+#endif
  		offset += read_len;
  		len -= read_len;
  		data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

Quoted 5 lines
Quoted 2 lines

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.

constraint is 4096 *words*. If you're using anything other than 8-bits per word, your statement doesn't make sense.

Yes, sorry. Its 4096 words.

#11 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

In reply to Sourav Poddar

Hi Jagan,

Quoted 75 lines · Sourav Poddar

+ jagan,

Quoted 61 lines · Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
  drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
  1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash 
 *flash, u32 offset,
          else
              read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<  read_len; actual += chunk_len) {
+            chunk_len = min(read_len - actual, page_size - byte_addr);
+
+            cmd[1] = page_addr>>  8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<  0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
          spi_flash_addr(offset, cmd);
 

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash 
 *flash, u32 offset,
              debug("SF: read failed\n");
              break;
          }
-
+#endif
          offset += read_len;
          len -= read_len;
Quoted 1 line
          data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read api in mtd framework.
This requires me to send the read command every time in range upto 4096 bytes only.

Quoted 8 lines

To overcome this, I have updated the mtd read based on TI_QSPI config as done above.

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

#12 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Hi Jagan,

Quoted 80 lines · Sourav Poddar

Hi Jagan,

Quoted 78 lines · Sourav Poddar

+ jagan,

Quoted 61 lines · Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
  drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
  1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash 
 *flash, u32 offset,
          else
              read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<  read_len; actual += chunk_len) {
+            chunk_len = min(read_len - actual, page_size - byte_addr);
+
+            cmd[1] = page_addr>>  8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<  0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
          spi_flash_addr(offset, cmd);
 

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash 
 *flash, u32 offset,
              debug("SF: read failed\n");
              break;
          }
-
+#endif
          offset += read_len;
          len -= read_len;
Quoted 1 line
          data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read api in mtd framework.
This requires me to send the read command every time in range upto 4096 bytes only.

To overcome this, I have updated the mtd read based on TI_QSPI config as done above.

Quoted 7 lines
Quoted 5 lines

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Any suggestions on the patch?

#13 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Hi,

Quoted 95 lines · Sourav Poddar

Hi Jagan,

Quoted 84 lines · Sourav Poddar

Hi Jagan,

Quoted 81 lines · Sourav Poddar

+ jagan,

Quoted 62 lines · Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
  drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
  1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
          else
              read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<  read_len; actual += chunk_len) {
+            chunk_len = min(read_len - actual, page_size - byte_addr);
+
+            cmd[1] = page_addr>>  8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<  0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
          spi_flash_addr(offset, cmd);
 

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash,
 u32 offset,
              debug("SF: read failed\n");
              break;
          }
-
+#endif
          offset += read_len;
          len -= read_len;
Quoted 1 line
          data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read api in mtd framework.
This requires me to send the read command every time in range upto 4096 bytes only.

To overcome this, I have updated the mtd read based on TI_QSPI config as done above.

Quoted 7 lines
Quoted 5 lines

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Quoted 6 lines

Any suggestions on the patch?

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Does linux support this ti_qspi, please point the defconfig if you have.

--
Thanks,
Jagan.

#14 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Hi Jagan,

Quoted 93 lines · Jagan Teki

Hi,

Quoted 90 lines · Sourav Poddar

Hi Jagan,

Quoted 87 lines · Sourav Poddar

Hi Jagan,

Quoted 75 lines · Sourav Poddar

+ jagan,

Quoted 61 lines · Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
   drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
   1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
           else
               read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<   read_len; actual += chunk_len) {
+            chunk_len = min(read_len - actual, page_size - byte_addr);
+
+            cmd[1] = page_addr>>   8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<   0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
           spi_flash_addr(offset, cmd);
 

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash,
 u32 offset,
               debug("SF: read failed\n");
               break;
           }
-
+#endif
           offset += read_len;
           len -= read_len;
Quoted 1 line
           data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read api in mtd framework.
This requires me to send the read command every time in range upto 4096 bytes only.

Quoted 8 lines

To overcome this, I have updated the mtd read based on TI_QSPI config as done above.

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Quoted 9 lines
Quoted 6 lines

Any suggestions on the patch?

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Thanks for the response.

This is the link to uboot patches which I submitted to uboot mailing list.

http://patchwork.ozlabs.org/patch/260989/
http://patchwork.ozlabs.org/patch/260990/
http://patchwork.ozlabs.org/patch/260991/
http://patchwork.ozlabs.org/patch/260992/
http://patchwork.ozlabs.org/patch/260994/
http://patchwork.ozlabs.org/patch/260993/
http://patchwork.ozlabs.org/patch/260996/
http://patchwork.ozlabs.org/patch/260995/

Above are the links to uboot patches containing all def configs and uboot ti qspi driver.

As communicated earlier, there is a limitation in our qspi controller driver, wherein after every
4096 bytes CS gets de asserted. So, I had to modify the above read framework to do a page read.
Need better way to handle this limitation, so that the above patch series can get upstreamed.

Quoted 2 lines

Does linux support this ti_qspi, please point the defconfig if you have.

Patches for linux is under review and still not mainlined.
https://patchwork.kernel.org/patch/2838342/

Thanks,
Sourav

Quoted 3 lines

--
Thanks,
Jagan.

#15 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Quoted 140 lines · Sourav Poddar

Hi Jagan,

Quoted 106 lines · Jagan Teki

Hi,

Quoted 101 lines · Sourav Poddar

Hi Jagan,

Quoted 88 lines · Sourav Poddar

Hi Jagan,

Quoted 85 lines · Sourav Poddar

+ jagan,

Quoted 63 lines · Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
   drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
   1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
           else
               read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<   read_len; actual += chunk_len) {
+            chunk_len = min(read_len - actual, page_size -
 byte_addr);
+
+            cmd[1] = page_addr>>   8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<   0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
           spi_flash_addr(offset, cmd);

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash,
 u32 offset,
               debug("SF: read failed\n");
               break;
           }
-
+#endif
           offset += read_len;
Quoted 2 lines
           len -= read_len;
           data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read
api in mtd framework.
This requires me to send the read command every time in range upto 4096 bytes only.

To overcome this, I have updated the mtd read based on TI_QSPI config as
done above.

Quoted 7 lines
Quoted 5 lines

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Any suggestions on the patch?

Quoted 8 lines
Quoted 4 lines

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Thanks for the response.

This is the link to uboot patches which I submitted to uboot mailing list.

http://patchwork.ozlabs.org/patch/260989/
http://patchwork.ozlabs.org/patch/260990/
http://patchwork.ozlabs.org/patch/260991/
http://patchwork.ozlabs.org/patch/260992/
http://patchwork.ozlabs.org/patch/260994/
http://patchwork.ozlabs.org/patch/260993/
http://patchwork.ozlabs.org/patch/260996/
http://patchwork.ozlabs.org/patch/260995/

Above are the links to uboot patches containing all def configs and uboot ti qspi driver.

As communicated earlier, there is a limitation in our qspi controller driver, wherein after every
4096 bytes CS gets de asserted. So, I had to modify the above read framework to do a page read.
Need better way to handle this limitation, so that the above patch series can get upstreamed.

Quoted 4 lines
Quoted 2 lines

Does linux support this ti_qspi, please point the defconfig if you have.

Patches for linux is under review and still not mainlined.
https://patchwork.kernel.org/patch/2838342/

Thanks, please give me some time I will look at these and let u know early next week.

--
Thanks,
Jagan.

#16 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Quoted 134 lines · Jagan Teki
Quoted 133 lines · Sourav Poddar

Hi Jagan,

Quoted 98 lines · Jagan Teki

Hi,

Quoted 94 lines · Sourav Poddar

Hi Jagan,

Quoted 91 lines · Sourav Poddar

Hi Jagan,

Quoted 78 lines · Sourav Poddar

+ jagan,

Quoted 62 lines · Sourav Poddar

Reading using the already supported read command is causing regression after 4k bytes, as a result doing a page by page read. Its happening, because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
    drivers/mtd/spi/spi_flash.c |   32 +++++++++++++++++++++++++++++++-
    1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
            else
                read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<    read_len; actual += chunk_len) {
+            chunk_len = min(read_len - actual, page_size -
 byte_addr);
+
+            cmd[1] = page_addr>>    8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<    0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
            spi_flash_addr(offset, cmd);

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash,
 u32 offset,
                debug("SF: read failed\n");
                break;
            }
-
+#endif
            offset += read_len;
Quoted 2 lines
            len -= read_len;
            data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read
api in mtd framework.
This requires me to send the read command every time in range upto 4096 bytes only.

Quoted 9 lines

To overcome this, I have updated the mtd read based on TI_QSPI config as
done above.

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Quoted 9 lines
Quoted 6 lines

Any suggestions on the patch?

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Thanks for the response.

This is the link to uboot patches which I submitted to uboot mailing list.

http://patchwork.ozlabs.org/patch/260989/
http://patchwork.ozlabs.org/patch/260990/
http://patchwork.ozlabs.org/patch/260991/
http://patchwork.ozlabs.org/patch/260992/
http://patchwork.ozlabs.org/patch/260994/
http://patchwork.ozlabs.org/patch/260993/
http://patchwork.ozlabs.org/patch/260996/
http://patchwork.ozlabs.org/patch/260995/

Above are the links to uboot patches containing all def configs and uboot ti qspi driver.

As communicated earlier, there is a limitation in our qspi controller driver, wherein after every
4096 bytes CS gets de asserted. So, I had to modify the above read framework to do a page read.
Need better way to handle this limitation, so that the above patch series can get upstreamed.

Quoted 7 lines
Quoted 4 lines
Quoted 2 lines

Does linux support this ti_qspi, please point the defconfig if you have.

Patches for linux is under review and still not mainlined.
https://patchwork.kernel.org/patch/2838342/

Thanks, please give me some time I will look at these and let u know early next week.

Thanks!!

Quoted 3 lines

--
Thanks,
Jagan.

#17 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Quoted 157 lines · Sourav Poddar
Quoted 155 lines · Jagan Teki
Quoted 152 lines · Sourav Poddar

Hi Jagan,

Quoted 112 lines · Jagan Teki

Hi,

Quoted 107 lines · Sourav Poddar

Hi Jagan,

Quoted 94 lines · Sourav Poddar

Hi Jagan,

Quoted 91 lines · Sourav Poddar

+ jagan,

Quoted 68 lines · Sourav Poddar

Reading using the already supported read command is causing regression
after 4k bytes, as a result doing a page by page read. Its happening,
because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
    drivers/mtd/spi/spi_flash.c |   32
+++++++++++++++++++++++++++++++-
    1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
            else
                read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<    read_len; actual += chunk_len)
 {
+            chunk_len = min(read_len - actual, page_size -
 byte_addr);
+
+            cmd[1] = page_addr>>    8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<    0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else

spi_flash_addr(offset, cmd);

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash,
 u32 offset,
                debug("SF: read failed\n");
                break;
            }
-
+#endif
            offset += read_len;
Quoted 2 lines
            len -= read_len;
            data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read
api in mtd framework.
This requires me to send the read command every time in range upto 4096
bytes only.

To overcome this, I have updated the mtd read based on TI_QSPI config as
done above.

Quoted 7 lines
Quoted 5 lines

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Any suggestions on the patch?

Quoted 8 lines
Quoted 4 lines

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Thanks for the response.

This is the link to uboot patches which I submitted to uboot mailing list.

http://patchwork.ozlabs.org/patch/260989/
http://patchwork.ozlabs.org/patch/260990/
http://patchwork.ozlabs.org/patch/260991/
http://patchwork.ozlabs.org/patch/260992/
http://patchwork.ozlabs.org/patch/260994/
http://patchwork.ozlabs.org/patch/260993/
http://patchwork.ozlabs.org/patch/260996/
http://patchwork.ozlabs.org/patch/260995/

Above are the links to uboot patches containing all def configs and uboot ti
qspi driver.

As communicated earlier, there is a limitation in our qspi controller driver, wherein after every
4096 bytes CS gets de asserted. So, I had to modify the above read framework
to do a page read.
Need better way to handle this limitation, so that the above patch series can get upstreamed.

Quoted 2 lines

Does linux support this ti_qspi, please point the defconfig if you have.

Quoted 7 lines
Quoted 6 lines
Quoted 2 lines

Patches for linux is under review and still not mainlined.
https://patchwork.kernel.org/patch/2838342/

Thanks, please give me some time I will look at these and let u know early next week.

Thanks!!

You still see this issue.

Signature · 8 lines
Thanks,
Jagan.
--------
Jagannadha Sutradharudu Teki,
E: jagannadh.teki at gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
#18 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Quoted 148 lines · Jagan Teki
Quoted 147 lines · Sourav Poddar
Quoted 146 lines · Jagan Teki
Quoted 144 lines · Sourav Poddar

Hi Jagan,

Quoted 104 lines · Jagan Teki

Hi,

Quoted 100 lines · Sourav Poddar

Hi Jagan,

Quoted 97 lines · Sourav Poddar

Hi Jagan,

Quoted 84 lines · Sourav Poddar

+ jagan,

Quoted 67 lines · Sourav Poddar

Reading using the already supported read command is causing regression
after 4k bytes, as a result doing a page by page read. Its happening,
because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
     drivers/mtd/spi/spi_flash.c |   32
+++++++++++++++++++++++++++++++-
     1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +30 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
             else
                 read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<     read_len; actual += chunk_len)
 {
+            chunk_len = min(read_len - actual, page_size -
 byte_addr);
+
+            cmd[1] = page_addr>>     8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<     0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else

spi_flash_addr(offset, cmd);

ret = spi_flash_read_common(flash, cmd, sizeof(cmd),

drivers/mtd/spi/spi_flash.c +1 -1
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash,
 u32 offset,
                 debug("SF: read failed\n");
                 break;
             }
-
+#endif
             offset += read_len;
Quoted 2 lines
             len -= read_len;
             data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted automatically.
As a result of this bottleneck, I am not able to use the current use read
api in mtd framework.
This requires me to send the read command every time in range upto 4096
bytes only.

Quoted 9 lines

To overcome this, I have updated the mtd read based on TI_QSPI config as
done above.

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Quoted 9 lines
Quoted 6 lines

Any suggestions on the patch?

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Thanks for the response.

This is the link to uboot patches which I submitted to uboot mailing list.

http://patchwork.ozlabs.org/patch/260989/
http://patchwork.ozlabs.org/patch/260990/
http://patchwork.ozlabs.org/patch/260991/
http://patchwork.ozlabs.org/patch/260992/
http://patchwork.ozlabs.org/patch/260994/
http://patchwork.ozlabs.org/patch/260993/
http://patchwork.ozlabs.org/patch/260996/
http://patchwork.ozlabs.org/patch/260995/

Above are the links to uboot patches containing all def configs and uboot ti
qspi driver.

As communicated earlier, there is a limitation in our qspi controller driver, wherein after every
4096 bytes CS gets de asserted. So, I had to modify the above read framework
to do a page read.
Need better way to handle this limitation, so that the above patch series can get upstreamed.

Quoted 2 lines

Does linux support this ti_qspi, please point the defconfig if you have.

Quoted 8 lines
Quoted 6 lines
Quoted 5 lines
Quoted 2 lines

Patches for linux is under review and still not mainlined.
https://patchwork.kernel.org/patch/2838342/

Thanks, please give me some time I will look at these and let u know early next week.

Thanks!!

You still see this issue.

Please ignore this mail thread. This was due to some ip limitation.

#19 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Quoted 171 lines · Sourav Poddar
Quoted 170 lines · Jagan Teki
Quoted 167 lines · Sourav Poddar
Quoted 165 lines · Jagan Teki
Quoted 161 lines · Sourav Poddar

Hi Jagan,

Quoted 116 lines · Jagan Teki

Hi,

Quoted 111 lines · Sourav Poddar

Hi Jagan,

Quoted 98 lines · Sourav Poddar

Hi Jagan,

Quoted 95 lines · Sourav Poddar

+ jagan,

Quoted 69 lines · Sourav Poddar

Reading using the already supported read command is causing regression
after 4k bytes, as a result doing a page by page read. Its happening,
because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
     drivers/mtd/spi/spi_flash.c |   32
+++++++++++++++++++++++++++++++-
     1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +11 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
             else
                 read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<     read_len; actual +=
 chunk_len)
 {
+            chunk_len = min(read_len - actual, page_size -

byte_addr);

drivers/mtd/spi/spi_flash.c +20 -1
+
+            cmd[1] = page_addr>>     8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<     0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
             spi_flash_addr(offset, cmd);
 
             ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash,
 u32 offset,
                 debug("SF: read failed\n");
                 break;
             }
-
+#endif
             offset += read_len;
Quoted 2 lines
             len -= read_len;
             data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted
automatically.
As a result of this bottleneck, I am not able to use the current use
read
api in mtd framework.
This requires me to send the read command every time in range upto 4096
bytes only.

To overcome this, I have updated the mtd read based on TI_QSPI config
as
done above.

Quoted 7 lines
Quoted 5 lines

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Any suggestions on the patch?

Quoted 8 lines
Quoted 4 lines

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Thanks for the response.

This is the link to uboot patches which I submitted to uboot mailing list.

http://patchwork.ozlabs.org/patch/260989/
http://patchwork.ozlabs.org/patch/260990/
http://patchwork.ozlabs.org/patch/260991/
http://patchwork.ozlabs.org/patch/260992/
http://patchwork.ozlabs.org/patch/260994/
http://patchwork.ozlabs.org/patch/260993/
http://patchwork.ozlabs.org/patch/260996/
http://patchwork.ozlabs.org/patch/260995/

Above are the links to uboot patches containing all def configs and uboot
ti
qspi driver.

As communicated earlier, there is a limitation in our qspi controller driver, wherein after every
4096 bytes CS gets de asserted. So, I had to modify the above read framework
to do a page read.
Need better way to handle this limitation, so that the above patch series
can get upstreamed.

Quoted 3 lines

Does linux support this ti_qspi, please point the defconfig if you have.

Patches for linux is under review and still not mainlined.
https://patchwork.kernel.org/patch/2838342/

Quoted 8 lines
Quoted 7 lines
Quoted 4 lines
Quoted 3 lines

Thanks, please give me some time I will look at these and let u know early next week.

Thanks!!

You still see this issue.

Please ignore this mail thread. This was due to some ip limitation.

OK.. Thread ends!

Signature · 8 lines
Thanks,
Jagan.
--------
Jagannadha Sutradharudu Teki,
E: jagannadh.teki at gmail.com, P: +91-9676773388
Engineer - System Software Hacker
U-boot - SPI Custodian and Zynq APSOC
Ln: http://www.linkedin.com/in/jaganteki
#20 lore raw

PATCH v2 5/8 drivers: mtd: spi: Modify read/write command for sfl256s flash.

Quoted 160 lines · Jagan Teki
Quoted 159 lines · Sourav Poddar
Quoted 158 lines · Jagan Teki
Quoted 156 lines · Sourav Poddar
Quoted 155 lines · Jagan Teki
Quoted 153 lines · Sourav Poddar

Hi Jagan,

Quoted 108 lines · Jagan Teki

Hi,

Quoted 104 lines · Sourav Poddar

Hi Jagan,

Quoted 101 lines · Sourav Poddar

Hi Jagan,

Quoted 92 lines · Sourav Poddar

+ jagan,

Quoted 68 lines · Sourav Poddar

Reading using the already supported read command is causing regression
after 4k bytes, as a result doing a page by page read. Its happening,
because
ti qpsi controller CS will get de asserted after 4096 bytes.

---
      drivers/mtd/spi/spi_flash.c |   32
+++++++++++++++++++++++++++++++-
      1 files changed, 31 insertions(+), 1 deletions(-)
drivers/mtd/spi/spi_flash.c +11 -0
index 6a6fe37..5f8db7b 100644
@@ -303,6 +303,36 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash, u32 offset,
              else
                  read_len = remain_len;
 
+#ifdef CONFIG_TI_QSPI
+        unsigned long page_addr, byte_addr, page_size;
+        size_t chunk_len, actual;
+        int ret = 0;
+
+        page_size = flash->page_size;
+        page_addr = offset / page_size;
+        byte_addr = offset % page_size;
+
+        for (actual = 0; actual<      read_len; actual +=
 chunk_len)
 {
+            chunk_len = min(read_len - actual, page_size -

byte_addr);

drivers/mtd/spi/spi_flash.c +20 -1
+
+            cmd[1] = page_addr>>      8;
+            cmd[2] = page_addr;
+            cmd[3] = byte_addr;
+
+            ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+                    data + actual, chunk_len);
+            if (ret<      0) {
+                debug("SF: read failed");
+                break;
+            }
+
+            byte_addr += chunk_len;
+            if (byte_addr == page_size) {
+                page_addr++;
+                byte_addr = 0;
+            }
+        }
+#else
              spi_flash_addr(offset, cmd);
 
              ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
@@ -311,7 +341,7 @@ int spi_flash_cmd_read_fast(struct spi_flash
 *flash,
 u32 offset,
                  debug("SF: read failed\n");
                  break;
              }
-
+#endif
              offset += read_len;
Quoted 2 lines
              len -= read_len;
              data += read_len;

Elaborating a bit more on this,
There is a constrain on our hardware, which goes like this..

As soon as the words transfered is 4096 bytes, the CS gets deasserted
automatically.
As a result of this bottleneck, I am not able to use the current use
read
api in mtd framework.
This requires me to send the read command every time in range upto 4096
bytes only.

To overcome this, I have updated the mtd read based on TI_QSPI config
as
done above.

Quoted 5 lines

[Jagan]:
Do you have any suggestion of dealing this in a better way? I don't see a way to get around this apart from updating mtd read depending on TI_QSPI config.

Any inputs on this?

Quoted 9 lines
Quoted 6 lines

Any suggestions on the patch?

_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Yes, this part is pretty much working as with other s25fl. Can you point me the respective controller driver for this.

Thanks for the response.

This is the link to uboot patches which I submitted to uboot mailing list.

http://patchwork.ozlabs.org/patch/260989/
http://patchwork.ozlabs.org/patch/260990/
http://patchwork.ozlabs.org/patch/260991/
http://patchwork.ozlabs.org/patch/260992/
http://patchwork.ozlabs.org/patch/260994/
http://patchwork.ozlabs.org/patch/260993/
http://patchwork.ozlabs.org/patch/260996/
http://patchwork.ozlabs.org/patch/260995/

Above are the links to uboot patches containing all def configs and uboot
ti
qspi driver.

As communicated earlier, there is a limitation in our qspi controller driver, wherein after every
4096 bytes CS gets de asserted. So, I had to modify the above read framework
to do a page read.
Need better way to handle this limitation, so that the above patch series
can get upstreamed.

Quoted 3 lines

Does linux support this ti_qspi, please point the defconfig if you have.

Patches for linux is under review and still not mainlined.
https://patchwork.kernel.org/patch/2838342/

Quoted 9 lines
Quoted 7 lines
Quoted 6 lines
Quoted 4 lines
Quoted 3 lines

Thanks, please give me some time I will look at these and let u know early next week.

Thanks!!

You still see this issue.

Please ignore this mail thread. This was due to some ip limitation.

OK.. Thread ends!

Anyways, we have move much ahead and there is already a v6 which I posted :)

#21 lore raw

PATCH v2 6/8 drivers: mtd: qspi: Add quad read support

In reply to Sourav Poddar

From: Ravikumar Kattekola <[email protected]>

Add Quad read mode (6 pin interface) support to spi flash and ti qspi driver.

Quad mode (0x6bh on spansion) uses two extra pins (D2 and D3) for data transfer apart from the usual D0 and D1 pins thus transfering 4 bits per cycle.

---
 drivers/mtd/spi/spi_flash.c          |  110 +++++++++++++++++++++++++++++++++-
 drivers/mtd/spi/spi_flash_internal.h |    2 +
 drivers/spi/ti_qspi.c                |   18 ++++--
 include/configs/dra7xx_evm.h         |    1 +
 include/spi.h                        |    2 +
 5 files changed, 127 insertions(+), 6 deletions(-)
drivers/mtd/spi/spi_flash.c +109 -1
index 5f8db7b..c81f402 100644
@@ -42,7 +42,12 @@ static int spi_flash_read_write(struct spi_slave *spi,
 		debug("SF: Failed to send command (%zu bytes): %d\n",
 				cmd_len, ret);
 	} else if (data_len != 0) {
-		ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
+		if (spi->quad_enable)
+			flags = SPI_6WIRE;
+		else
+			flags = 0;
+
+		ret = spi_xfer(spi, data_len * 8, data_out, data_in, flags | SPI_XFER_END);
 		if (ret)
 			debug("SF: Failed to transfer %zu bytes of data: %d\n",
 					data_len, ret);
@@ -271,6 +276,51 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 	return ret;
 }
 
+int spi_flash_cmd_read_quad(struct spi_flash *flash, u32 offset,
+		size_t len, void *data)
+{
+	struct spi_slave *spi = flash->spi;
+
+	unsigned long page_addr, byte_addr, page_size;
+	size_t chunk_len, actual;
+	int ret = 0;
+	u8 cmd[5];
+
+	spi->quad_enable = 1;
+	/* Handle memory-mapped SPI */
+	if (flash->memory_map)
+		memcpy(data, flash->memory_map + offset, len);
+
+	page_size = flash->page_size;
+	page_addr = offset / page_size;
+	byte_addr = offset % page_size;
+
+	cmd[0] = CMD_READ_ARRAY_QUAD;
+	for (actual = 0; actual < len; actual += chunk_len) {
+		chunk_len = min(len - actual, page_size - byte_addr);
+
+		cmd[1] = page_addr >> 8;
+		cmd[2] = page_addr;
+		cmd[3] = byte_addr;
+		cmd[4] = 0x0;
+
+		ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+				data + actual, chunk_len);
+		if (ret < 0) {
+			debug("SF: read failed");
+			break;
+		}
+
+		byte_addr += chunk_len;
+		if (byte_addr == page_size) {
+			page_addr++;
+			byte_addr = 0;
+		}
+	}
+
+	return ret;
+}
+
 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 		size_t len, void *data)
 {
@@ -424,6 +474,56 @@ int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
 }
 #endif
 
+int spi_flash_en_quad_mode(struct spi_flash *flash)
+{
+	u8 stat, con, cd;
+	u16 cr;
+	int ret;
+	cd = CMD_WRITE_STATUS;
+
+	ret = spi_flash_cmd_write_enable(flash);
+	if (ret < 0) {
+		debug("SF: enabling write failed\n");
+		goto out;
+	}
+	ret = spi_flash_cmd(flash->spi, CMD_READ_STATUS, &stat, 1);
+	ret = spi_flash_cmd(flash->spi, CMD_READ_CONFIG, &con, 1);
+	if (ret < 0) {
+		debug("%s: SF: read CR failed\n", __func__);
+		goto out;
+	}
+	/* Byte 1 - status reg, Byte 2 - config reg */
+	cr = ((con | (0x1 << 1)) << 8) | (stat << 0);
+
+	ret = spi_flash_cmd_write(flash->spi, &cd, 1, &cr, 2);
+	if (ret) {
+		debug("SF: fail to write conf register\n");
+		goto out;
+	}
+
+	ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+	if (ret < 0) {
+		debug("SF: write conf register timed out\n");
+		goto out;
+	}
+
+	ret = spi_flash_cmd(flash->spi, CMD_READ_STATUS, &stat, 1);
+	ret = spi_flash_cmd(flash->spi, CMD_READ_CONFIG, &con, 1);
+	if (ret < 0) {
+		debug("%s: SF: read CR failed\n", __func__);
+		goto out;
+	}
+	debug("%s: *** CR = %x\n", __func__, con);
+
+	ret = spi_flash_cmd_write_disable(flash);
+	if (ret < 0) {
+		debug("SF: disabling write failed\n");
+		goto out;
+	}
+out:
+	return ret;
+}
+
 #ifdef CONFIG_OF_CONTROL
 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 {
@@ -578,6 +678,10 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		goto err_manufacturer_probe;
 #endif
 
+#ifdef CONFIG_SF_QUAD_RD
+	spi_flash_en_quad_mode(flash);
+#endif
+
 #ifdef CONFIG_OF_CONTROL
 	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
 		debug("SF: FDT decode error\n");
@@ -628,7 +732,11 @@ void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
 	flash->name = name;
 	flash->poll_cmd = CMD_READ_STATUS;
 
+#ifdef CONFIG_SF_QUAD_RD
+	flash->read = spi_flash_cmd_read_quad;
+#else
 	flash->read = spi_flash_cmd_read_fast;
+#endif
 	flash->write = spi_flash_cmd_write_multi;
 	flash->erase = spi_flash_cmd_erase;
 
drivers/mtd/spi/spi_flash_internal.h +2 -0
index af1afa9..1205a7a 100644
@@ -17,11 +17,13 @@
 
 #define CMD_READ_ARRAY_SLOW		0x03
 #define CMD_READ_ARRAY_FAST		0x0b
+#define CMD_READ_ARRAY_QUAD            0x6b
 
 #define CMD_WRITE_STATUS		0x01
 #define CMD_PAGE_PROGRAM		0x02
 #define CMD_WRITE_DISABLE		0x04
 #define CMD_READ_STATUS			0x05
+#define CMD_READ_CONFIG			0x35
 #define CMD_FLAG_STATUS			0x70
 #define CMD_WRITE_ENABLE		0x06
 #define CMD_ERASE_4K			0x20
drivers/spi/ti_qspi.c +13 -5
index 1973b85..12bba11 100644
@@ -72,6 +72,7 @@ static struct qspi_regs *qspi = (struct qspi_regs *)QSPI_BASE;
 #define QSPI_RD_SNGL			(1 << 16)
 #define QSPI_WR_SNGL			(2 << 16)
 #define QSPI_INVAL			(4 << 16)
+#define QSPI_RD_QUAD			(7 << 16)
 
 /* Device Control */
 #define QSPI_DD(m, n)			(m << (3 + n*8))
@@ -235,10 +236,17 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 			debug("tx done, status %08x\n", status);
 		}
 		if (rxp) {
-			debug("rx cmd %08x dc %08x\n",
-			      qslave->cmd | QSPI_RD_SNGL, qslave->dc);
-			writel(qslave->dc, &qspi->spi_dc);
-			writel(qslave->cmd | QSPI_RD_SNGL, &qspi->spi_cmd);
+			if (flags & SPI_6WIRE) {
+				debug("rx cmd %08x dc %08x\n",
+				      qslave->cmd | QSPI_RD_QUAD, qslave->dc);
+				writel(qslave->cmd | QSPI_RD_QUAD,
+				       &qspi->spi_cmd);
+			} else {
+				debug("rx cmd %08x dc %08x\n",
+				      qslave->cmd | QSPI_RD_SNGL, qslave->dc);
+				writel(qslave->cmd | QSPI_RD_SNGL,
+				       &qspi->spi_cmd);
+			}
 			status = readl(&qspi->spi_status);
 			timeout = QSPI_TIMEOUT;
 			while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {
@@ -250,7 +258,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 			}
 			*rxp++ = readl(&qspi->spi_data);
 			debug("rx done, status %08x, read %02x\n",
-			      status, *(rxp-1));
+				 status, *(rxp-1));
 		}
 	}
 
include/configs/dra7xx_evm.h +1 -0
index f30a795..9d11820 100644
@@ -50,6 +50,7 @@
 #define CONFIG_SPI_FLASH_SPANSION
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_SPI
+#define CONFIG_SF_QUAD_RD
 #define CONFIG_SF_DEFAULT_SPEED                12000000
 #define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
 
include/spi.h +2 -0
index e8e6544..d5a0ead 100644
@@ -39,6 +39,7 @@
 #define	SPI_LOOP	0x20			/* loopback mode */
 #define	SPI_SLAVE	0x40			/* slave mode */
 #define	SPI_PREAMBLE	0x80			/* Skip preamble bytes */
+#define	SPI_6WIRE       0x10                    /* 4 data lines */
 
 /* SPI transfer flags */
 #define SPI_XFER_BEGIN	0x01			/* Assert CS before transfer */
@@ -61,6 +62,7 @@ struct spi_slave {
 	unsigned int	bus;
 	unsigned int	cs;
 	unsigned int max_write_size;
+	bool quad_enable;
 };
 
 /*-----------------------------------------------------------------------
Signature · 1 line
1.7.1
#22 lore raw

PATCH v2 6/8 drivers: mtd: qspi: Add quad read support

Dear Sourav Poddar,

Quoted 11 lines · In message <[email protected]> you wrote:

From: Ravikumar Kattekola <[email protected]>

Add Quad read mode (6 pin interface) support to spi flash and ti qspi driver.

Quad mode (0x6bh on spansion) uses two extra pins (D2 and D3) for data transfer apart from the usual D0 and D1 pins thus transfering 4 bits per cycle.

Quoted 7 lines
---
 drivers/mtd/spi/spi_flash.c          |  110 +++++++++++++++++++++++++++++++++-
 drivers/mtd/spi/spi_flash_internal.h |    2 +
 drivers/spi/ti_qspi.c                |   18 ++++--
 include/configs/dra7xx_evm.h         |    1 +
 include/spi.h                        |    2 +
 5 files changed, 127 insertions(+), 6 deletions(-)

Again: change log missing, checkpatch issues (line over 80 characters).

Please fix.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Veni, Vidi, VISA:
        I came, I saw, I did a little shopping.
#23 lore raw

PATCH v2 7/8 driver: spi: Add memory mapped read support

In reply to Sourav Poddar

Qspi controller has a memory mapped port which can be used for data transfers. First controller need to be configured through configuration port, then for data read switch the controller to memory mapped and read from the predefined location.

---
 drivers/mtd/spi/spansion.c   |    1 +
 drivers/mtd/spi/spi_flash.c  |    8 +++-
 drivers/spi/ti_qspi.c        |   85 +++++++++++++++++++++++++++++++++++-------
 include/configs/dra7xx_evm.h |    3 +-
 include/spi.h                |    3 +
 5 files changed, 84 insertions(+), 16 deletions(-)
drivers/mtd/spi/spansion.c +1 -0
index 3ec2151..1f60456 100644
@@ -151,6 +151,7 @@ struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode)
 	flash->page_size = 256;
 	flash->sector_size = 256 * params->pages_per_sector;
 	flash->size = flash->sector_size * params->nr_sectors;
+        flash->memory_map = spi->memory_map;
 
 	return flash;
 }
drivers/mtd/spi/spi_flash.c +7 -1
index c81f402..c1173d8 100644
@@ -288,8 +288,12 @@ int spi_flash_cmd_read_quad(struct spi_flash *flash, u32 offset,
 
 	spi->quad_enable = 1;
 	/* Handle memory-mapped SPI */
-	if (flash->memory_map)
+	if (flash->memory_map) {
+		spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
 		memcpy(data, flash->memory_map + offset, len);
+		spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP_END);
+		return 0;
+	}
 
 	page_size = flash->page_size;
 	page_addr = offset / page_size;
@@ -330,7 +334,9 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 
 	/* Handle memory-mapped SPI */
 	if (flash->memory_map) {
+		spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP);
 		memcpy(data, flash->memory_map + offset, len);
+		spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MEM_MAP_END);
 		return 0;
 	}
 
drivers/spi/ti_qspi.c +71 -14

124 lines not on this page · raw message

include/configs/dra7xx_evm.h +2 -1
index 9d11820..4d80a01 100644
@@ -51,7 +51,8 @@
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_SPI
 #define CONFIG_SF_QUAD_RD
-#define CONFIG_SF_DEFAULT_SPEED                12000000
+#define CONFIG_MMAP
+#define CONFIG_SF_DEFAULT_SPEED                48000000
 #define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
 
 /* SPI SPL */
include/spi.h +3 -0
index d5a0ead..890e739 100644
@@ -48,6 +48,8 @@
 /* Header byte that marks the start of the message */
 #define SPI_PREAMBLE_END_BYTE	0xec
 
+#define SPI_XFER_MEM_MAP 0x05
+#define SPI_XFER_MEM_MAP_END 0x06
 /*-----------------------------------------------------------------------
  * Representation of a SPI slave, i.e. what we're communicating with.
  *
@@ -63,6 +65,7 @@ struct spi_slave {
 	unsigned int	cs;
 	unsigned int max_write_size;
 	bool quad_enable;
+	void *memory_map;
 };
 
 /*-----------------------------------------------------------------------
Signature · 1 line
1.7.1
#24 lore raw

PATCH v2 7/8 driver: spi: Add memory mapped read support

Dear Sourav Poddar,

Quoted 5 lines · In message <[email protected]> you wrote:

Qspi controller has a memory mapped port which can be used for data transfers. First controller need to be configured through configuration port, then for data read switch the controller to memory mapped and read from the predefined location.

Quoted 8 lines
---
 drivers/mtd/spi/spansion.c   |    1 +
 drivers/mtd/spi/spi_flash.c  |    8 +++-
 drivers/spi/ti_qspi.c        |   85 +++++++++++++++++++++++++++++++++++-------
 include/configs/dra7xx_evm.h |    3 +-
 include/spi.h                |    3 +
 5 files changed, 84 insertions(+), 16 deletions(-)

changelog missing, and an awful lot of checkpatch issues which need to be fixed:

ERROR: code indent should use tabs where possible
#112: FILE: drivers/mtd/spi/spansion.c:154:
+ flash->memory_map = spi->memory_map;$

WARNING: please, no spaces at the start of a line
#112: FILE: drivers/mtd/spi/spansion.c:154:
+ flash->memory_map = spi->memory_map;$

ERROR: code indent should use tabs where possible
#154: FILE: drivers/spi/ti_qspi.c:26:
+ u32 cmd;$

WARNING: please, no spaces at the start of a line
#154: FILE: drivers/spi/ti_qspi.c:26:
+ u32 cmd;$

ERROR: code indent should use tabs where possible
#155: FILE: drivers/spi/ti_qspi.c:27:
+ u32 dc;$

WARNING: please, no spaces at the start of a line
#155: FILE: drivers/spi/ti_qspi.c:27:
+ u32 dc;$

ERROR: code indent should use tabs where possible
#233: FILE: drivers/spi/ti_qspi.c:237:
+ qslave->dc = 0;$

WARNING: please, no spaces at the start of a line
#233: FILE: drivers/spi/ti_qspi.c:237:
+ qslave->dc = 0;$

ERROR: code indent should use tabs where possible
#234: FILE: drivers/spi/ti_qspi.c:238:
+ if (qslave->mode & SPI_CPHA)$

WARNING: please, no spaces at the start of a line
#234: FILE: drivers/spi/ti_qspi.c:238:
+ if (qslave->mode & SPI_CPHA)$

ERROR: code indent should use tabs where possible
#235: FILE: drivers/spi/ti_qspi.c:239:
+ qslave->dc |= QSPI_CKPHA(slave->cs);$

WARNING: please, no spaces at the start of a line
#235: FILE: drivers/spi/ti_qspi.c:239:
+ qslave->dc |= QSPI_CKPHA(slave->cs);$

ERROR: code indent should use tabs where possible
#236: FILE: drivers/spi/ti_qspi.c:240:
+ if (qslave->mode & SPI_CPOL)$

WARNING: please, no spaces at the start of a line
#236: FILE: drivers/spi/ti_qspi.c:240:
+ if (qslave->mode & SPI_CPOL)$

ERROR: code indent should use tabs where possible
#237: FILE: drivers/spi/ti_qspi.c:241:
+ qslave->dc |= QSPI_CKPOL(slave->cs);$

WARNING: please, no spaces at the start of a line
#237: FILE: drivers/spi/ti_qspi.c:241:
+ qslave->dc |= QSPI_CKPOL(slave->cs);$

ERROR: code indent should use tabs where possible
#238: FILE: drivers/spi/ti_qspi.c:242:
+ if (qslave->mode & SPI_CS_HIGH)$

WARNING: please, no spaces at the start of a line
#238: FILE: drivers/spi/ti_qspi.c:242:
+ if (qslave->mode & SPI_CS_HIGH)$

ERROR: code indent should use tabs where possible
#239: FILE: drivers/spi/ti_qspi.c:243:
+ qslave->dc |= QSPI_CSPOL(slave->cs);$

WARNING: please, no spaces at the start of a line
#239: FILE: drivers/spi/ti_qspi.c:243:
+ qslave->dc |= QSPI_CSPOL(slave->cs);$

ERROR: code indent should use tabs where possible
#241: FILE: drivers/spi/ti_qspi.c:245:
+ writel(qslave->dc, &qspi->spi_dc);$

WARNING: please, no spaces at the start of a line
#241: FILE: drivers/spi/ti_qspi.c:245:
+ writel(qslave->dc, &qspi->spi_dc);$

ERROR: code indent should use tabs where possible
#243: FILE: drivers/spi/ti_qspi.c:247:
+ if (flags == SPI_XFER_MEM_MAP) {$

WARNING: please, no spaces at the start of a line
#243: FILE: drivers/spi/ti_qspi.c:247:
+ if (flags == SPI_XFER_MEM_MAP) {$

ERROR: code indent should use tabs where possible
#244: FILE: drivers/spi/ti_qspi.c:248:
+ writel(MM_SWITCH, &qspi->spi_switch);$

WARNING: please, no spaces at the start of a line
#244: FILE: drivers/spi/ti_qspi.c:248:
+ writel(MM_SWITCH, &qspi->spi_switch);$

ERROR: code indent should use tabs where possible
#245: FILE: drivers/spi/ti_qspi.c:249:
+ val = readl(CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#245: FILE: drivers/spi/ti_qspi.c:249:
+ val = readl(CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#246: FILE: drivers/spi/ti_qspi.c:250:
+ val |= MEM_CS;$

WARNING: please, no spaces at the start of a line
#246: FILE: drivers/spi/ti_qspi.c:250:
+ val |= MEM_CS;$

ERROR: code indent should use tabs where possible
#247: FILE: drivers/spi/ti_qspi.c:251:
+ writel(val, CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#247: FILE: drivers/spi/ti_qspi.c:251:
+ writel(val, CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#248: FILE: drivers/spi/ti_qspi.c:252:
+ return 0;$

WARNING: please, no spaces at the start of a line
#248: FILE: drivers/spi/ti_qspi.c:252:
+ return 0;$

ERROR: code indent should use tabs where possible
#249: FILE: drivers/spi/ti_qspi.c:253:
+ } else if (flags == SPI_XFER_MEM_MAP_END) {$

WARNING: please, no spaces at the start of a line
#249: FILE: drivers/spi/ti_qspi.c:253:
+ } else if (flags == SPI_XFER_MEM_MAP_END) {$

ERROR: code indent should use tabs where possible
#250: FILE: drivers/spi/ti_qspi.c:254:
+ writel(~MM_SWITCH, &qspi->spi_switch);$

WARNING: please, no spaces at the start of a line
#250: FILE: drivers/spi/ti_qspi.c:254:
+ writel(~MM_SWITCH, &qspi->spi_switch);$

ERROR: code indent should use tabs where possible
#251: FILE: drivers/spi/ti_qspi.c:255:
+ val = readl(CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#251: FILE: drivers/spi/ti_qspi.c:255:
+ val = readl(CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#252: FILE: drivers/spi/ti_qspi.c:256:
+ val &= MEM_CS_UNSELECT;$

WARNING: please, no spaces at the start of a line
#252: FILE: drivers/spi/ti_qspi.c:256:
+ val &= MEM_CS_UNSELECT;$

ERROR: code indent should use tabs where possible
#253: FILE: drivers/spi/ti_qspi.c:257:
+ writel(val, CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#253: FILE: drivers/spi/ti_qspi.c:257:
+ writel(val, CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#254: FILE: drivers/spi/ti_qspi.c:258:
+ return 0;$

WARNING: please, no spaces at the start of a line
#254: FILE: drivers/spi/ti_qspi.c:258:
+ return 0;$

ERROR: code indent should use tabs where possible
#255: FILE: drivers/spi/ti_qspi.c:259:
+ }$

WARNING: please, no spaces at the start of a line
#255: FILE: drivers/spi/ti_qspi.c:259:
+ }$

ERROR: code indent should use tabs where possible
#257: FILE: drivers/spi/ti_qspi.c:261:
+ if (bitlen == 0)$

WARNING: please, no spaces at the start of a line
#257: FILE: drivers/spi/ti_qspi.c:261:
+ if (bitlen == 0)$

ERROR: code indent should use tabs where possible
#258: FILE: drivers/spi/ti_qspi.c:262:
+ return -1;$

WARNING: please, no spaces at the start of a line
#258: FILE: drivers/spi/ti_qspi.c:262:
+ return -1;$

total: 26 errors, 26 warnings, 0 checks, 177 lines checked

NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or
scripts/cleanfile

NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE USLEEP_RANGE

/home/wd/Mail/U-Boot/16312 has style problems, please review.

If any of these errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS.

Best regards,

Wolfgang Denk

Signature · 6 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Administration: An ingenious abstraction  in  politics,  designed  to
receive the kicks and cuffs due to the premier or president.
- Ambrose Bierce
#25 lore raw

PATCH v2 7/8 driver: spi: Add memory mapped read support

Quoted 16 lines · Wolfgang Denk

Dear Sourav Poddar,

Quoted 5 lines · In message<[email protected]> you wrote:

Qspi controller has a memory mapped port which can be used for data transfers. First controller need to be configured through configuration port, then for data read switch the controller to memory mapped and read from the predefined location.

Quoted 8 lines
---
  drivers/mtd/spi/spansion.c   |    1 +
  drivers/mtd/spi/spi_flash.c  |    8 +++-
  drivers/spi/ti_qspi.c        |   85 +++++++++++++++++++++++++++++++++++-------
  include/configs/dra7xx_evm.h |    3 +-
  include/spi.h                |    3 +
  5 files changed, 84 insertions(+), 16 deletions(-)
Quoted 3 lines

changelog missing, and an awful lot of checkpatch issues which need to be fixed:

My bad. I think I missed this, will correct it in the next version.

Quoted 224 lines

ERROR: code indent should use tabs where possible
#112: FILE: drivers/mtd/spi/spansion.c:154:
+ flash->memory_map = spi->memory_map;$

WARNING: please, no spaces at the start of a line
#112: FILE: drivers/mtd/spi/spansion.c:154:
+ flash->memory_map = spi->memory_map;$

ERROR: code indent should use tabs where possible
#154: FILE: drivers/spi/ti_qspi.c:26:
+ u32 cmd;$

WARNING: please, no spaces at the start of a line
#154: FILE: drivers/spi/ti_qspi.c:26:
+ u32 cmd;$

ERROR: code indent should use tabs where possible
#155: FILE: drivers/spi/ti_qspi.c:27:
+ u32 dc;$

WARNING: please, no spaces at the start of a line
#155: FILE: drivers/spi/ti_qspi.c:27:
+ u32 dc;$

ERROR: code indent should use tabs where possible
#233: FILE: drivers/spi/ti_qspi.c:237:
+ qslave->dc = 0;$

WARNING: please, no spaces at the start of a line
#233: FILE: drivers/spi/ti_qspi.c:237:
+ qslave->dc = 0;$

ERROR: code indent should use tabs where possible
#234: FILE: drivers/spi/ti_qspi.c:238:
+ if (qslave->mode& SPI_CPHA)$

WARNING: please, no spaces at the start of a line
#234: FILE: drivers/spi/ti_qspi.c:238:
+ if (qslave->mode& SPI_CPHA)$

ERROR: code indent should use tabs where possible
#235: FILE: drivers/spi/ti_qspi.c:239:
+ qslave->dc |= QSPI_CKPHA(slave->cs);$

WARNING: please, no spaces at the start of a line
#235: FILE: drivers/spi/ti_qspi.c:239:
+ qslave->dc |= QSPI_CKPHA(slave->cs);$

ERROR: code indent should use tabs where possible
#236: FILE: drivers/spi/ti_qspi.c:240:
+ if (qslave->mode& SPI_CPOL)$

WARNING: please, no spaces at the start of a line
#236: FILE: drivers/spi/ti_qspi.c:240:
+ if (qslave->mode& SPI_CPOL)$

ERROR: code indent should use tabs where possible
#237: FILE: drivers/spi/ti_qspi.c:241:
+ qslave->dc |= QSPI_CKPOL(slave->cs);$

WARNING: please, no spaces at the start of a line
#237: FILE: drivers/spi/ti_qspi.c:241:
+ qslave->dc |= QSPI_CKPOL(slave->cs);$

ERROR: code indent should use tabs where possible
#238: FILE: drivers/spi/ti_qspi.c:242:
+ if (qslave->mode& SPI_CS_HIGH)$

WARNING: please, no spaces at the start of a line
#238: FILE: drivers/spi/ti_qspi.c:242:
+ if (qslave->mode& SPI_CS_HIGH)$

ERROR: code indent should use tabs where possible
#239: FILE: drivers/spi/ti_qspi.c:243:
+ qslave->dc |= QSPI_CSPOL(slave->cs);$

WARNING: please, no spaces at the start of a line
#239: FILE: drivers/spi/ti_qspi.c:243:
+ qslave->dc |= QSPI_CSPOL(slave->cs);$

ERROR: code indent should use tabs where possible
#241: FILE: drivers/spi/ti_qspi.c:245:
+ writel(qslave->dc,&qspi->spi_dc);$

WARNING: please, no spaces at the start of a line
#241: FILE: drivers/spi/ti_qspi.c:245:
+ writel(qslave->dc,&qspi->spi_dc);$

ERROR: code indent should use tabs where possible
#243: FILE: drivers/spi/ti_qspi.c:247:
+ if (flags == SPI_XFER_MEM_MAP) {$

WARNING: please, no spaces at the start of a line
#243: FILE: drivers/spi/ti_qspi.c:247:
+ if (flags == SPI_XFER_MEM_MAP) {$

ERROR: code indent should use tabs where possible
#244: FILE: drivers/spi/ti_qspi.c:248:
+ writel(MM_SWITCH,&qspi->spi_switch);$

WARNING: please, no spaces at the start of a line
#244: FILE: drivers/spi/ti_qspi.c:248:
+ writel(MM_SWITCH,&qspi->spi_switch);$

ERROR: code indent should use tabs where possible
#245: FILE: drivers/spi/ti_qspi.c:249:
+ val = readl(CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#245: FILE: drivers/spi/ti_qspi.c:249:
+ val = readl(CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#246: FILE: drivers/spi/ti_qspi.c:250:
+ val |= MEM_CS;$

WARNING: please, no spaces at the start of a line
#246: FILE: drivers/spi/ti_qspi.c:250:
+ val |= MEM_CS;$

ERROR: code indent should use tabs where possible
#247: FILE: drivers/spi/ti_qspi.c:251:
+ writel(val, CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#247: FILE: drivers/spi/ti_qspi.c:251:
+ writel(val, CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#248: FILE: drivers/spi/ti_qspi.c:252:
+ return 0;$

WARNING: please, no spaces at the start of a line
#248: FILE: drivers/spi/ti_qspi.c:252:
+ return 0;$

ERROR: code indent should use tabs where possible
#249: FILE: drivers/spi/ti_qspi.c:253:
+ } else if (flags == SPI_XFER_MEM_MAP_END) {$

WARNING: please, no spaces at the start of a line
#249: FILE: drivers/spi/ti_qspi.c:253:
+ } else if (flags == SPI_XFER_MEM_MAP_END) {$

ERROR: code indent should use tabs where possible
#250: FILE: drivers/spi/ti_qspi.c:254:
+ writel(~MM_SWITCH,&qspi->spi_switch);$

WARNING: please, no spaces at the start of a line
#250: FILE: drivers/spi/ti_qspi.c:254:
+ writel(~MM_SWITCH,&qspi->spi_switch);$

ERROR: code indent should use tabs where possible
#251: FILE: drivers/spi/ti_qspi.c:255:
+ val = readl(CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#251: FILE: drivers/spi/ti_qspi.c:255:
+ val = readl(CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#252: FILE: drivers/spi/ti_qspi.c:256:
+ val&= MEM_CS_UNSELECT;$

WARNING: please, no spaces at the start of a line
#252: FILE: drivers/spi/ti_qspi.c:256:
+ val&= MEM_CS_UNSELECT;$

ERROR: code indent should use tabs where possible
#253: FILE: drivers/spi/ti_qspi.c:257:
+ writel(val, CORE_CTRL_IO);$

WARNING: please, no spaces at the start of a line
#253: FILE: drivers/spi/ti_qspi.c:257:
+ writel(val, CORE_CTRL_IO);$

ERROR: code indent should use tabs where possible
#254: FILE: drivers/spi/ti_qspi.c:258:
+ return 0;$

WARNING: please, no spaces at the start of a line
#254: FILE: drivers/spi/ti_qspi.c:258:
+ return 0;$

ERROR: code indent should use tabs where possible
#255: FILE: drivers/spi/ti_qspi.c:259:
+ }$

WARNING: please, no spaces at the start of a line
#255: FILE: drivers/spi/ti_qspi.c:259:
+ }$

ERROR: code indent should use tabs where possible
#257: FILE: drivers/spi/ti_qspi.c:261:
+ if (bitlen == 0)$

WARNING: please, no spaces at the start of a line
#257: FILE: drivers/spi/ti_qspi.c:261:
+ if (bitlen == 0)$

ERROR: code indent should use tabs where possible
#258: FILE: drivers/spi/ti_qspi.c:262:
+ return -1;$

WARNING: please, no spaces at the start of a line
#258: FILE: drivers/spi/ti_qspi.c:262:
+ return -1;$

total: 26 errors, 26 warnings, 0 checks, 177 lines checked

NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or
scripts/cleanfile

NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE USLEEP_RANGE

/home/wd/Mail/U-Boot/16312 has style problems, please review.

If any of these errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS.

Best regards,

Wolfgang Denk

#26 lore raw

PATCH v2 8/8 README: qspi usecase and testing documentation.

In reply to Sourav Poddar

Contains documentation and testing details for qspi flash interface.

---
 doc/README.ti_qspi_dra_test |   38 ++++++++++++++++++++++++++++++++++
 doc/README.ti_qspi_flash    |   47 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 85 insertions(+), 0 deletions(-)
 create mode 100644 doc/README.ti_qspi_dra_test
 create mode 100644 doc/README.ti_qspi_flash
doc/README.ti_qspi_dra_test new file +38 -0
new file mode 100644
index 0000000..8910ff1
@@ -0,0 +1,38 @@
+-------------------------------------------------
+   Simple steps used to test the QSPI at U-Boot
+-------------------------------------------------
+
+For #1, build the patched U-Boot and load MLO/u-boot.img
+
+----------------------------------
+Boot from another medium like MMC
+----------------------------------
+
+DRA752 EVM # mmc dev 0
+DRA752 EVM # fatload mmc 0 0x82000000 MLO
+DRA752 EVM # fatload mmc 0 0x82000000 u-boot.img
+
+--------------------------------------------------
+Commands to erase/write u-boot/mlo to flash device
+--------------------------------------------------
+
+DRA752 EVM # sf probe 0
+[should detect the S25FL256S serial flash device]
+
+DRA752 EVM # sf erase 0 10000
+DRA752 EVM # sf erase 10000 10000
+DRA752 EVM # sf erase 20000 10000
+DRA752 EVM # sf erase 30000 10000
+DRA752 EVM # sf erase 40000 10000
+DRA752 EVM # sf erase 50000 10000
+DRA752 EVM # sf erase 60000 10000
+
+DRA752 EVM # sf write 82000000 0 10000
+DRA752 EVM # sf write 83000000 20000 80000
+
+For #2, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power
+on. ROM should find the GP header at offset 0 and load/execute SPL. SPL
+then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to
+find a U-Boot image header at offset 0x20000 (set in the config file)
+and proceeds to load that image using the U-Boot image payload offset/size
+from the header. It will then start U-Boot.
doc/README.ti_qspi_flash new file +47 -0

47 lines not on this page · raw message

Signature · 1 line
1.7.1