ARM: dts: aspeed: quanta: Enable pwm fans
Subsystems (2)
PATCH v2 1/1 ARM: dts: aspeed: quanta: Enable pwm fans
---
v2: Moved pwm_tacho_fixed_clk to clocks.
--- arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 51 ++++++++++++++++++++++++++++ arch/arm/boot/dts/aspeed-g4.dtsi | 5 +++ 2 files changed, 56 insertions(+)
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +51 -0
@@ -46,6 +46,57 @@ gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; }; }; + + pwm_tacho: pwm-tacho-controller@1e786000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0x1E786000 0x1000>; + compatible = "aspeed,ast2500-pwm-tacho"; + clocks = <&pwm_tacho_fixed_clk>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default + &pinctrl_pwm2_default &pinctrl_pwm3_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03>; + }; + + fan@4 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x04>; + }; + + fan@5 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x05>; + }; + + fan@6 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x06>; + }; + + fan@7 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x07>; + }; + }; }; &fmc {
arch/arm/boot/dts/aspeed-g4.dtsi +5 -0
@@ -36,6 +36,11 @@ }; clocks { + pwm_tacho_fixed_clk: fixedclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; }; ahb {
Signature · 1 line
2.13.1.611.g7e3b11ae1-goog
Joel Stanley
maintainerQuoted 13 lines · Patrick Venture
Signed-off-by Patrick Venture <[email protected]>---
v2: Movedpwm_tacho_fixed_clkto clocks.--- arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 51 ++++++++++++++++++++++++++++ arch/arm/boot/dts/aspeed-g4.dtsi | 5 +++ 2 files changed, 56 insertions(+)arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +0
-0
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts line 53
Quoted 8 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +5
-0@@ -46,6 +46,57 @@ gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; }; }; + + pwm_tacho: pwm-tacho-controller@1e786000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0x1E786000 0x1000>;
Nit: convention is to use lowecase for hex numbers in the dt.
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts line 58
Quoted 5 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +5
-0+ compatible = "aspeed,ast2500-pwm-tacho"; + clocks = <&pwm_tacho_fixed_clk>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default + &pinctrl_pwm2_default &pinctrl_pwm3_default>;
It looks like you're using fans 0..7, but you're only requesting the pins for the first four fans. Should you be requesting all 8?
Cheers,
Joel
Quoted 63 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +41
-0+ + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03>; + }; + + fan@4 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x04>; + }; + + fan@5 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x05>; + }; + + fan@6 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x06>; + }; + + fan@7 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x07>; + }; + }; }; &fmc {arch/arm/boot/dts/aspeed-g4.dtsi +5
-1@@ -36,6 +36,11 @@ }; clocks { + pwm_tacho_fixed_clk: fixedclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; }; ahb { --2.13.1.611.g7e3b11ae1-goog
Quoted 9 lines · Joel Stanley
Quoted 8 lines · Patrick Venture
Signed-off-by Patrick Venture <[email protected]>---
v2: Movedpwm_tacho_fixed_clkto clocks.--- arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 51 ++++++++++++++++++++++++++++ arch/arm/boot/dts/aspeed-g4.dtsi | 5 +++ 2 files changed, 56 insertions(+)
Quoted 15 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts line 53
Quoted 13 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +5
-0@@ -46,6 +46,57 @@ gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; }; }; + + pwm_tacho: pwm-tacho-controller@1e786000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0x1E786000 0x1000>;Nit: convention is to use lowecase for hex numbers in the dt.
Easy fix will come in next version. :D
Quoted 9 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts line 58
Quoted 6 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +5
-0+ compatible = "aspeed,ast2500-pwm-tacho"; + clocks = <&pwm_tacho_fixed_clk>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default + &pinctrl_pwm2_default &pinctrl_pwm3_default>;It looks like you're using fans 0..7, but you're only requesting the pins for the first four fans. Should you be requesting all 8?
The pwm actually drives a pair on this board. So, we have 8 fans, but only four active pwm controls. I don't know if this is a driver issue but the fans are paired and work as a pair.
Quoted 68 lines
Cheers,
Joel
Quoted 63 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +41
-0+ + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03>; + }; + + fan@4 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x04>; + }; + + fan@5 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x05>; + }; + + fan@6 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x06>; + }; + + fan@7 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x07>; + }; + }; }; &fmc {arch/arm/boot/dts/aspeed-g4.dtsi +5
-1@@ -36,6 +36,11 @@ }; clocks { + pwm_tacho_fixed_clk: fixedclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; }; ahb { --2.13.1.611.g7e3b11ae1-goog
Joel Stanley
maintainerQuoted 6 lines · Patrick Venture
Quoted 6 lines
Quoted 5 lines
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +5
-0+ compatible = "aspeed,ast2500-pwm-tacho"; + clocks = <&pwm_tacho_fixed_clk>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default + &pinctrl_pwm2_default &pinctrl_pwm3_default>;
Quoted 6 lines
Quoted 2 lines
It looks like you're using fans 0..7, but you're only requesting the pins for the first four fans. Should you be requesting all 8?
The pwm actually drives a pair on this board. So, we have 8 fans, but only four active pwm controls. I don't know if this is a driver issue but the fans are paired and work as a pair.
Okay. The bindings are a bit confusing at first glance. Sounds like you've got it under control.
I'll apply your v3.
Cheers,
Joel