Convert PWM period and duty cycle to u64
Subsystems (16)
v8 cover Convert PWM period and duty cycle to u64
Because period and duty cycle are defined in the PWM framework structs as ints with units of nanoseconds, the maximum time duration that can be set is limited to ~2.147 seconds. Consequently, applications desiring to set greater time periods via the PWM framework are not be able to do so - like, for instance, causing an LED to blink at an interval of 5 seconds.
Redefining the period and duty cycle struct members in the core PWM framework structs as u64 values will enable larger time durations to be set and solve this problem. Such a change to the framework mandates that drivers using these struct members (and corresponding helper functions) also be modified correctly in order to prevent compilation errors.
This patch series introduces the changes to all the drivers first, followed by the framework change at the very end so that when the latter is applied, all the drivers are in good shape and there are no compilation errors.
Changes from v7:
- Changed commit messages of all patches to be brief and to the point.
- Added explanation of change in cover letter.
- Dropped change to pwm-sti.c as upon review it was unnecessary as struct pwm_capture is not being modified in the PWM core.
Changes from v6:
- Split out the driver changes out into separate patches, one patch per file for ease of reviewing.
Changes from v5:
- Dropped the conversion of struct pwm_capture to u64 for reasons mentioned
in https://www.spinics.net/lists/linux-pwm/msg11541.html
Changes from v4:
- Split the patch into two: one for changes to the drivers, and the actual switch to u64 for ease of reverting should the need arise.
- Re-examined the patch and made the following corrections:
* intel_panel.c:
DIV64_U64_ROUND_UP -> DIV_ROUND_UP_ULL (as only the numerator would be 64-bit in this case).
* pwm-sti.c:
do_div -> div_u64 (do_div is optimized only for x86 architectures, and div_u64's comment block suggests to use this as much as possible).
Changes from v3:
- Rebased to current tip of for-next.
Changes from v2:
- Fixed %u -> %llu in a dev_dbg in pwm-stm32-lp.c, thanks to kbuild test robot
- Added a couple of fixes to pwm-imx-tpm.c and pwm-sifive.c
Changes from v1:
- Fixed compilation errors seen when compiling for different archs.
v1:
- Reworked the change pushed upstream earlier [1] so as to not add an
extension to an obsolete API. With this change, pwm_ops->apply() can be
used to set pwm_state parameters as usual.
[1] https://lore.kernel.org/lkml/20190916140048.GB7488@ulmo/Guru Das Srinagesh (12):
clk: pwm: Use 64-bit division function drm/i915: Use 64-bit division macro
hwmon: pwm-fan: Use 64-bit division macro
ir-rx51: Use 64-bit division macro
pwm: clps711x: Use 64-bit division macro
pwm: pwm-imx-tpm: Use 64-bit division macro
pwm: imx27: Use 64-bit division macro and function
pwm: sifive: Use 64-bit division macro
pwm: stm32-lp: Use %llu format specifier for period
pwm: sun4i: Use 64-bit division function
backlight: pwm_bl: Use 64-bit division function
pwm: core: Convert period and duty cycle to u64
drivers/clk/clk-pwm.c | 2 +- drivers/gpu/drm/i915/display/intel_panel.c | 2 +- drivers/hwmon/pwm-fan.c | 2 +- drivers/media/rc/ir-rx51.c | 3 ++- drivers/pwm/core.c | 4 ++-- drivers/pwm/pwm-clps711x.c | 2 +- drivers/pwm/pwm-imx-tpm.c | 2 +- drivers/pwm/pwm-imx27.c | 5 ++--- drivers/pwm/pwm-sifive.c | 2 +- drivers/pwm/pwm-stm32-lp.c | 2 +- drivers/pwm/pwm-sun4i.c | 2 +- drivers/pwm/sysfs.c | 8 ++++---- drivers/video/backlight/pwm_bl.c | 3 ++- include/linux/pwm.h | 12 ++++++------ 14 files changed, 26 insertions(+), 25 deletions(-)
Signature · 2 lines
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PATCH v8 1/12 clk: pwm: Use 64-bit division function
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using div64_u64 to handle a 64-bit divisor.
--- drivers/clk/clk-pwm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/clk-pwm.c +1 -1
@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev) }if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =div64_u64 (NSEC_PER_SEC , pargs.period);if (pargs.period !=NSEC_PER_SEC / clk_pwm->fixed_rate && pargs.period !=DIV_ROUND_UP (NSEC_PER_SEC , clk_pwm->fixed_rate)) {
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
RE: [PATCH v8 01/12] clk: pwm: Use 64-bit division function
From: Guru Das Srinagesh
Quoted 20 lines
Sent: 11 March 2020 01:41
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
div64_u64to handle a 64-bit divisor.Signed-off-by Guru Das Srinagesh <[email protected]>--- drivers/clk/clk-pwm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/clk/clk-pwm.c +0
-0
drivers/clk/clk-pwm.c static int clk_pwm_probe(struct platform_device *pdev) · line 92
Quoted 5 lines
drivers/clk/clk-pwm.c +1
-1@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev) }if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =div64_u64 (NSEC_PER_SEC , pargs.period);
That cannot be needed, a 32 bit division is fine.
More interesting would be whether pargs.period is sane (eg not zero). I'd assign pargs.period to an 'unsigned int' variable
prior to the division (I hate casts - been bitten by them in the past.).
Quoted 6 lines
drivers/clk/clk-pwm.c +0
-1if (pargs.period !=NSEC_PER_SEC / clk_pwm->fixed_rate && pargs.period !=DIV_ROUND_UP (NSEC_PER_SEC , clk_pwm->fixed_rate)) { --The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
David
-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)
Re: [PATCH v8 01/12] clk: pwm: Use 64-bit division function
Quoted 23 lines · David Laight
From: Guru Das Srinagesh
Quoted 22 lines
Sent: 11 March 2020 01:41
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
div64_u64to handle a 64-bit divisor.Signed-off-by Guru Das Srinagesh <[email protected]>--- drivers/clk/clk-pwm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/clk/clk-pwm.c +0
-0@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev) }
Quoted 5 lines
drivers/clk/clk-pwm.c static int clk_pwm_probe(struct platform_device *pdev) · line 92
Quoted 3 lines
drivers/clk/clk-pwm.c +1
-1if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =div64_u64 (NSEC_PER_SEC , pargs.period);That cannot be needed, a 32 bit division is fine.
Could you please explain why? I think the use of this function is warranted in order to handle the division properly with a 64-bit divisor.
Quoted 1 line
More interesting would be whether pargs.period is sane (eg not zero).
There is a non-zero check for pargs.period just prior to this line, so the code is handling this case already.
Quoted 2 lines
I'd assign pargs.period to an 'unsigned int' variable
prior to the division (I hate casts - been bitten by them in the past.).
Wouldn't this truncate the 64-bit value? The intention behind this patch is to allow the processing of 64-bit values in full.
Thank you.
Guru Das.
RE: [PATCH v8 01/12] clk: pwm: Use 64-bit division function
From: Guru Das Srinagesh
Quoted 9 lines
Sent: 12 March 2020 02:10
Quoted 7 lines · David Laight
From: Guru Das Srinagesh
Quoted 6 lines
Sent: 11 March 2020 01:41
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
div64_u64to handle a 64-bit divisor.
...
Quoted 14 lines
Quoted 10 lines
drivers/clk/clk-pwm.c static int clk_pwm_probe(struct platform_device *pdev) · line 92
Quoted 8 lines
drivers/clk/clk-pwm.c +1
-1@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev) }if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =div64_u64 (NSEC_PER_SEC , pargs.period);That cannot be needed, a 32 bit division is fine.
Could you please explain why? I think the use of this function is warranted in order to handle the division properly with a 64-bit divisor.
...
Quoted 5 lines
Quoted 2 lines
I'd assign pargs.period to an 'unsigned int' variable
prior to the division (I hate casts - been bitten by them in the past.).Wouldn't this truncate the 64-bit value? The intention behind this patch is to allow the processing of 64-bit values in full.
You are dividing a 32bit constant by a value.
If pargs.period is greater than 2^32 the result is zero.
I think you divide by 'fixed_rate' a bit later on - better not be zero.
David
-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)
Re: [PATCH v8 01/12] clk: pwm: Use 64-bit division function
Quoted 26 lines · David Laight
From: Guru Das Srinagesh
Quoted 9 lines
Sent: 12 March 2020 02:10
Quoted 7 lines · David Laight
From: Guru Das Srinagesh
Quoted 6 lines
Sent: 11 March 2020 01:41
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
div64_u64to handle a 64-bit divisor....
Quoted 14 lines
Quoted 10 lines
drivers/clk/clk-pwm.c static int clk_pwm_probe(struct platform_device *pdev) · line 92
Quoted 8 lines
drivers/clk/clk-pwm.c +1
-1@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev) }if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =div64_u64 (NSEC_PER_SEC , pargs.period);That cannot be needed, a 32 bit division is fine.
Could you please explain why? I think the use of this function is warranted in order to handle the division properly with a 64-bit divisor.
...
Quoted 8 lines
Quoted 5 lines
Quoted 2 lines
I'd assign pargs.period to an 'unsigned int' variable
prior to the division (I hate casts - been bitten by them in the past.).Wouldn't this truncate the 64-bit value? The intention behind this patch is to allow the processing of 64-bit values in full.
You are dividing a 32bit constant by a value. If pargs.period is greater than 2^32 the result is zero.
Thanks for the explanation.
Quoted 1 line
I think you divide by '
fixed_rate' a bit later on - better not be zero.
Good point, but this issue exists with or without this patch, and fixing it is beyond this patch's scope.
Just to check if this patch can be dropped, I tested out compilation with this patch reverted and there were no errors, so I'm leaning towards dropping this patch unless you have any further comments on how to proceed.
Thank you.
Guru Das.
Re: [PATCH v8 01/12] clk: pwm: Use 64-bit division function
Quoted 40 lines · Guru Das Srinagesh
Quoted 26 lines · David Laight
From: Guru Das Srinagesh
Quoted 9 lines
Sent: 12 March 2020 02:10
Quoted 7 lines · David Laight
From: Guru Das Srinagesh
Quoted 6 lines
Sent: 11 March 2020 01:41
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
div64_u64to handle a 64-bit divisor....
Quoted 14 lines
Quoted 10 lines
drivers/clk/clk-pwm.c static int clk_pwm_probe(struct platform_device *pdev) · line 92
Quoted 8 lines
drivers/clk/clk-pwm.c +1
-1@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev) }if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =div64_u64 (NSEC_PER_SEC , pargs.period);That cannot be needed, a 32 bit division is fine.
Could you please explain why? I think the use of this function is warranted in order to handle the division properly with a 64-bit divisor.
...
Quoted 8 lines
Quoted 5 lines
Quoted 2 lines
I'd assign pargs.period to an 'unsigned int' variable
prior to the division (I hate casts - been bitten by them in the past.).Wouldn't this truncate the 64-bit value? The intention behind this patch is to allow the processing of 64-bit values in full.
You are dividing a 32bit constant by a value. If pargs.period is greater than 2^32 the result is zero.
Thanks for the explanation.
Quoted 1 line
I think you divide by '
fixed_rate' a bit later on - better not be zero.
Quoted 7 lines
Good point, but this issue exists with or without this patch, and fixing it is beyond this patch's scope.
Just to check if this patch can be dropped, I tested out compilation with this patch reverted and there were no errors, so I'm leaning towards dropping this patch unless you have any further comments on how to proceed.
Turns out I couldn't drop this patch after all - kbuild test robot complained [1]. Accordingly, I've brought this patch back in my v10 patchset with the modifications you suggested. Could you kindly review it?
[1] https://www.spinics.net/lists/linux-pwm/msg11906.html
Thank you.
Guru Das.
Re: [PATCH v8 01/12] clk: pwm: Use 64-bit division function
In reply to David LaightQuoted 26 lines · David Laight
From: Guru Das Srinagesh
Quoted 9 lines
Sent: 12 March 2020 02:10
Quoted 7 lines · David Laight
From: Guru Das Srinagesh
Quoted 6 lines
Sent: 11 March 2020 01:41
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
div64_u64to handle a 64-bit divisor....
Quoted 14 lines
Quoted 10 lines
drivers/clk/clk-pwm.c static int clk_pwm_probe(struct platform_device *pdev) · line 92
Quoted 8 lines
drivers/clk/clk-pwm.c +1
-1@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev) }if (of_property_read_u32 (node,"clock-frequency" , &clk_pwm->fixed_rate)) - clk_pwm->fixed_rate =NSEC_PER_SEC / pargs.period; + clk_pwm->fixed_rate =div64_u64 (NSEC_PER_SEC , pargs.period);That cannot be needed, a 32 bit division is fine.
Could you please explain why? I think the use of this function is warranted in order to handle the division properly with a 64-bit divisor.
...
Quoted 8 lines
Quoted 5 lines
Quoted 2 lines
I'd assign pargs.period to an 'unsigned int' variable
prior to the division (I hate casts - been bitten by them in the past.).Wouldn't this truncate the 64-bit value? The intention behind this patch is to allow the processing of 64-bit values in full.
You are dividing a 32bit constant by a value. If pargs.period is greater than 2^32 the result is zero.
Correction: if pargs.period is greater than NSEC_PER_SEC, not 2^32.
Quoted 1 line
I think you divide by '
fixed_rate' a bit later on - better not be zero.
I am adding an explicit check in v12 to ensure fixed_rate is not zero. If during the calculation it is found to be zero, probing will fail.
I think with this modification, this v8 version of this change makes sense to use.
Thank you.
Guru Das.
PATCH v8 2/12 drm/i915: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.duty_cycle's datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL to handle a 64-bit dividend.
--- drivers/gpu/drm/i915/display/intel_panel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/i915/display/intel_panel.c +1 -1
@@ -1868,7 +1868,7 @@ static int pwm_setup_backlight(struct intel_connector *connector, panel->backlight.min =0 ;/* 0% */ panel->backlight.max =100 ;/* 100% */ - panel->backlight.level =DIV_ROUND_UP ( + panel->backlight.level =DIV_ROUND_UP_ULL (pwm_get_duty_cycle (panel->backlight.pwm) *100 ,CRC_PMIC_PWM_PERIOD_NS ); panel->backlight.enabled = panel->backlight.level !=0 ;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 3/12 hwmon: pwm-fan: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL to handle a 64-bit dividend.
--- drivers/hwmon/pwm-fan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/hwmon/pwm-fan.c +1 -1
@@ -437,7 +437,7 @@ static int pwm_fan_resume(struct device *dev)return 0 ;pwm_get_args (ctx->pwm, &pargs); - duty =DIV_ROUND_UP (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); + duty =DIV_ROUND_UP_ULL (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); ret =pwm_config (ctx->pwm, duty, pargs.period);if (ret)return ret;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v8 03/12] hwmon: pwm-fan: Use 64-bit division macro
Quoted 12 lines · Guru Das Srinagesh
Since the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using
DIV_ROUND_UP_ULLto handle a 64-bit dividend.Cc Kamil Debski <[email protected]>Cc Bartlomiej Zolnierkiewicz <[email protected]>Cc Jean Delvare <[email protected]>Cc Guenter Roeck <[email protected]>Cc Liam Girdwood <[email protected]>Cc Mark Brown <[email protected]>
Quoted 1 line
Signed-off-by Guru Das Srinagesh <[email protected]>
Not sure if I entirely buy the use case, but then the performance impact is minimal, at least for this driver, so
Guenter
Quoted 21 lines
--- drivers/hwmon/pwm-fan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/hwmon/pwm-fan.c +1
-1@@ -437,7 +437,7 @@ static int pwm_fan_resume(struct device *dev)return 0 ;pwm_get_args (ctx->pwm, &pargs); - duty =DIV_ROUND_UP (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); + duty =DIV_ROUND_UP_ULL (ctx->pwm_value * (pargs.period -1 ),MAX_PWM ); ret =pwm_config (ctx->pwm, duty, pargs.period);if (ret)return ret;Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 4/12 ir-rx51: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using DIV_ROUND_CLOSEST_ULL to handle a 64-bit dividend.
--- drivers/media/rc/ir-rx51.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/media/rc/ir-rx51.c +2 -1
@@ -241,7 +241,8 @@ static int ir_rx51_probe(struct platform_device *dev) }/* Use default, in case userspace does not set the carrier */ - ir_rx51.freq =DIV_ROUND_CLOSEST (pwm_get_period (pwm),NSEC_PER_SEC ); + ir_rx51.freq =DIV_ROUND_CLOSEST_ULL (pwm_get_period (pwm), +NSEC_PER_SEC );pwm_put (pwm);hrtimer_init (&ir_rx51.timer,CLOCK_MONOTONIC ,HRTIMER_MODE_REL );
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v8 04/12] ir-rx51: Use 64-bit division macro
Quoted 10 lines · Guru Das Srinagesh
Since the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using
DIV_ROUND_CLOSEST_ULLto handle a 64-bit dividend.Cc Mauro Carvalho Chehab <[email protected]>Cc Richard Fontana <[email protected]>Cc Thomas Gleixner <[email protected]>Cc Kate Stewart <[email protected]>Cc Allison Randal <[email protected]>
Quoted 23 lines
Signed-off-by Guru Das Srinagesh <[email protected]>--- drivers/media/rc/ir-rx51.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)drivers/media/rc/ir-rx51.c +2
-1@@ -241,7 +241,8 @@ static int ir_rx51_probe(struct platform_device *dev) }/* Use default, in case userspace does not set the carrier */ - ir_rx51.freq =DIV_ROUND_CLOSEST (pwm_get_period (pwm),NSEC_PER_SEC ); + ir_rx51.freq =DIV_ROUND_CLOSEST_ULL (pwm_get_period (pwm), +NSEC_PER_SEC );pwm_put (pwm);hrtimer_init (&ir_rx51.timer,CLOCK_MONOTONIC ,HRTIMER_MODE_REL );Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 5/12 pwm: clps711x: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using DIV64_U64_ROUND_CLOSEST to handle a 64-bit divisor.
--- drivers/pwm/pwm-clps711x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-clps711x.c +1 -1
@@ -43,7 +43,7 @@ static void clps711x_pwm_update_val(struct clps711x_chip *priv, u32 n, u32 v)static unsigned int clps711x_get_duty (struct pwm_device *pwm,unsigned int v) {/* Duty cycle 0..15 max */ -return DIV_ROUND_CLOSEST (v *0xf , pwm->args.period); +return DIV64_U64_ROUND_CLOSEST (v *0xf , pwm->args.period); }static int clps711x_pwm_request (struct pwm_chip *chip,struct pwm_device *pwm)
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 6/12 pwm: pwm-imx-tpm: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using DIV64_U64_ROUND_CLOSEST to handle a 64-bit divisor.
--- drivers/pwm/pwm-imx-tpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-imx-tpm.c +1 -1
@@ -126,7 +126,7 @@ static int pwm_imx_tpm_round_state(struct pwm_chip *chip, real_state->duty_cycle = state->duty_cycle; tmp = (u64 )p->mod * real_state->duty_cycle; - p->val =DIV_ROUND_CLOSEST_ULL (tmp, real_state->period); + p->val =DIV64_U64_ROUND_CLOSEST (tmp, real_state->period); real_state->polarity = state->polarity; real_state->enabled = state->enabled;
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 7/12 pwm: imx27: Use 64-bit division macro and function
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL to handle a 64-bit dividend, and div64_u64 to handle a 64-bit divisor.
--- drivers/pwm/pwm-imx27.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
drivers/pwm/pwm-imx27.c +2 -3
@@ -208,7 +208,7 @@ static void pwm_imx27_wait_fifo_slot(struct pwm_chip *chip, sr =readl (imx->mmio_base +MX3_PWMSR ); fifoav =FIELD_GET (MX3_PWMSR_FIFOAV , sr);if (fifoav ==MX3_PWMSR_FIFOAV_4WORDS ) { - period_ms =DIV_ROUND_UP (pwm_get_period (pwm), + period_ms =DIV_ROUND_UP_ULL (pwm_get_period (pwm),NSEC_PER_MSEC );msleep (period_ms);
@@ -240,8 +240,7 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm, period_cycles /= prescale; c = (unsigned long long )period_cycles * state->duty_cycle; -do_div (c, state->period); - duty_cycles = c; + duty_cycles =div64_u64 (c, state->period);/* * according to imx pwm RM, the real period value should be PERIOD
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 8/12 pwm: sifive: Use 64-bit division macro
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using DIV64_U64_ROUND_CLOSEST to handle a 64-bit divisor.
--- drivers/pwm/pwm-sifive.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-sifive.c +1 -1
@@ -181,7 +181,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm,* consecutively */ num = (u64 )duty_cycle * (1U <<PWM_SIFIVE_CMPWIDTH ); - frac =DIV_ROUND_CLOSEST_ULL (num, state->period); + frac =DIV64_U64_ROUND_CLOSEST (num, state->period);/* The hardware cannot generate a 100% duty cycle */ frac =min (frac, (1U <<PWM_SIFIVE_CMPWIDTH ) -1 );
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 9/12 pwm: stm32-lp: Use %llu format specifier for period
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_args.period's datatype to u64, prepare for this transition by using the right specifier for printing a 64-bit value.
--- drivers/pwm/pwm-stm32-lp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-stm32-lp.c +1 -1
@@ -61,7 +61,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,do_div (div,NSEC_PER_SEC );if (!div) {/* Clock is too slow to achieve requested period. */ -dev_dbg (priv->chip.dev,"Can't reach %u ns\n" , state->period); +dev_dbg (priv->chip.dev,"Can't reach %llu ns\n" , state->period);return -EINVAL ; }
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PATCH v8 10/12 pwm: sun4i: Use 64-bit division function
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using div_u64 to handle a 64-bit dividend instead of a straight division operation.
--- drivers/pwm/pwm-sun4i.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-sun4i.c +1 -1
@@ -286,7 +286,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, val = (duty &PWM_DTY_MASK ) |PWM_PRD (period);sun4i_pwm_writel (sun4i_pwm, val,PWM_CH_PRD (pwm->hwpwm)); sun4i_pwm->next_period[pwm->hwpwm] = jiffies + -usecs_to_jiffies (cstate.period /1000 +1 ); +usecs_to_jiffies (div_u64 (cstate.period,1000 ) +1 ); sun4i_pwm->needs_delay[pwm->hwpwm] = true;if (state->polarity !=PWM_POLARITY_NORMAL )
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Re: [PATCH v8 10/12] pwm: sun4i: Use 64-bit division function
Quoted 10 lines · Guru Das Srinagesh
Since the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using
div_u64to handle a 64-bit dividend instead of a straight division operation.Cc Maxime Ripard <[email protected]>Cc Chen-Yu Tsai <[email protected]>Cc Philipp Zabel <[email protected]>Signed-off-by Guru Das Srinagesh <[email protected]>
PATCH v8 11/12 backlight: pwm_bl: Use 64-bit division function
In reply to Guru Das SrinageshSince the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using div_u64 to handle a 64-bit dividend instead of a straight division operation.
--- drivers/video/backlight/pwm_bl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/video/backlight/pwm_bl.c +2 -1
@@ -625,7 +625,8 @@ static int pwm_backlight_probe(struct platform_device *pdev) pb->scale = data->max_brightness; } - pb->lth_brightness = data->lth_brightness * (state.period / pb->scale); + pb->lth_brightness = data->lth_brightness * (div_u64 (state.period, + pb->scale)); props.type =BACKLIGHT_RAW ; props.max_brightness = data->max_brightness;
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Re: [PATCH v8 11/12] backlight: pwm_bl: Use 64-bit division function
Quoted 12 lines · Guru Das Srinagesh
Since the PWM framework is switching struct pwm_state.period's datatype to u64, prepare for this transition by using
div_u64to handle a 64-bit dividend instead of a straight division operation.Cc Lee Jones <[email protected]>Cc Daniel Thompson <[email protected]>Cc Jingoo Han <[email protected]>Cc Bartlomiej Zolnierkiewicz <[email protected]>
Quoted 1 line
Signed-off-by Guru Das Srinagesh <[email protected]>
Quoted 22 lines
--- drivers/video/backlight/pwm_bl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)drivers/video/backlight/pwm_bl.c +2
-1@@ -625,7 +625,8 @@ static int pwm_backlight_probe(struct platform_device *pdev) pb->scale = data->max_brightness; } - pb->lth_brightness = data->lth_brightness * (state.period / pb->scale); + pb->lth_brightness = data->lth_brightness * (div_u64 (state.period, + pb->scale)); props.type =BACKLIGHT_RAW ; props.max_brightness = data->max_brightness;Signature · 2 lines
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PATCH v8 12/12 pwm: core: Convert period and duty cycle to u64
In reply to Guru Das SrinageshBecause period and duty cycle are defined as ints with units of nanoseconds, the maximum time duration that can be set is limited to ~2.147 seconds. Change their definitions to u64 in the structs of the PWM framework so that higher durations may be set.
--- drivers/pwm/core.c | 4 ++-- drivers/pwm/sysfs.c | 8 ++++---- include/linux/pwm.h | 12 ++++++------ 3 files changed, 12 insertions(+), 12 deletions(-)
drivers/pwm/core.c +2 -2
@@ -1163,8 +1163,8 @@ static void pwm_dbg_show(struct pwm_chip *chip, struct seq_file *s)if (state.enabled)seq_puts (s," enabled" ); -seq_printf (s," period: %u ns" , state.period); -seq_printf (s," duty: %u ns" , state.duty_cycle); +seq_printf (s," period: %llu ns" , state.period); +seq_printf (s," duty: %llu ns" , state.duty_cycle);seq_printf (s," polarity: %s" , state.polarity ?"inverse" :"normal" );
drivers/pwm/sysfs.c +4 -4
@@ -42,7 +42,7 @@ static ssize_t period_show(struct device *child,pwm_get_state (pwm, &state); -return sprintf (buf,"%u\n" , state.period); +return sprintf (buf,"%llu\n" , state.period); } static ssize_t period_store(struct device *child,
@@ -52,10 +52,10 @@ static ssize_t period_store(struct device *child,struct pwm_export *export =child_to_pwm_export (child);struct pwm_device *pwm = export->pwm;struct pwm_state state; -unsigned int val; +u64 val;int ret; - ret =kstrtouint (buf,0 , &val); + ret =kstrtou64 (buf,0 , &val);if (ret)return ret;
@@ -77,7 +77,7 @@ static ssize_t duty_cycle_show(struct device *child,pwm_get_state (pwm, &state); -return sprintf (buf,"%u\n" , state.duty_cycle); +return sprintf (buf,"%llu\n" , state.duty_cycle); } static ssize_t duty_cycle_store(struct device *child,
include/linux/pwm.h +6 -6
@@ -39,7 +39,7 @@ enum pwm_polarity {* current PWM hardware state. */ struct pwm_args { -unsigned int period; +u64 period;enum pwm_polarity polarity; };
@@ -56,8 +56,8 @@ enum {* @enabled: PWM enabled status */ struct pwm_state { -unsigned int period; -unsigned int duty_cycle; +u64 period; +u64 duty_cycle;enum pwm_polarity polarity;bool enabled; };
@@ -105,13 +105,13 @@ static inline bool pwm_is_enabled(const struct pwm_device *pwm)return state.enabled; } -static inline void pwm_set_period (struct pwm_device *pwm,unsigned int period) +static inline void pwm_set_period (struct pwm_device *pwm,u64 period) {if (pwm) pwm->state.period = period; } -static inline unsigned int pwm_get_period (const struct pwm_device *pwm) +static inline u64 pwm_get_period (const struct pwm_device *pwm) {struct pwm_state state;
@@ -126,7 +126,7 @@ static inline void pwm_set_duty_cycle(struct pwm_device *pwm, unsigned int duty) pwm->state.duty_cycle = duty; } -static inline unsigned int pwm_get_duty_cycle (const struct pwm_device *pwm) +static inline u64 pwm_get_duty_cycle (const struct pwm_device *pwm) {struct pwm_state state;
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