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pwm: intel: Add PWM driver for a new SoC

PATCH Superseded Rahul Tanwar 3 participants 9 messages Jul 23, 2020 – Jul 27, 2020

Subsystems (2)

v5 of 15 Superseded Latest is v15 →

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#0 lore raw

v5 cover pwm: intel: Add PWM driver for a new SoC

Patch 1 adds dt binding document in YAML format. Patch 2 add PWM fan controller driver for LGM SoC.

Patch series is baselined on linux 5.8-rc5.

v5:
- Address below review concerns from Uwe Kleine-K�nig.
* Improve comments about Limitations.
* Use return value of regmap_update_bits if container function returns error code.
* Modify .apply op to have strict checking for fixed period supported by PWM HW.
* Use u64 as type when use min_t for duty_cycle.
* Add reset_control_assert() in failure case in probe where it was missing earlier.
- Remove fan specific optional properties from pwm dt binding document (Rob Herring)

v4:
- Address below review concerns from Uwe Kleine-K�nig.
* Improve notes and limitations comments.
* Add common prefixes for all #defines.
* Modify/Improve logic in .apply & .get_state ops as advised.
* Skip error messages in probe when error is -EPROBE_DEFER.
* Add dependencies in Kconfig (OF & HAS_IOMEM) and add select REGMAP_MMIO.
* Address other code quality related review concerns.
- Fix make dt_binding_check reported error in YAML file.

v3:
- Address below review concerns from Uwe Kleine-K�nig.
* Remove fan rpm calibration task from the driver.
* Modify apply op as per the review feedback.
* Add roundup & round down where necessary.
* Address other misc code quality related review concerns.
* Use devm_reset_control_get_exclusive(). (Philipp Zabel)
* Improve dt binding document.

v2:
- Address below review concerns from Uwe Kleine-K�nig.
* Add notes and limitations about PWM HW.
* Rename all functions and structure to lgm_pwm_*
* Readjust space aligninment in structure fields to single space.
* Switch to using apply instead of config/enable/disable.
* Address other code quality related concerns.
* Rebase to 5.8-rc1.
- Address review concerns in dt binding YAML from Rob Herring.

v1:
- Initial version.

Rahul Tanwar (2):
Add DT bindings YAML schema for PWM fan controller of LGM SoC Add PWM fan controller driver for LGM SoC

 .../devicetree/bindings/pwm/intel,lgm-pwm.yaml     |  40 +++
 drivers/pwm/Kconfig                                |  11 +
 drivers/pwm/Makefile                               |   1 +
 drivers/pwm/pwm-intel-lgm.c                        | 269 +++++++++++++++++++++
 4 files changed, 321 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml
 create mode 100644 drivers/pwm/pwm-intel-lgm.c
Signature · 1 line
2.11.0
#1 lore raw

PATCH v5 1/2 Add DT bindings YAML schema for PWM fan controller of LGM SoC

Intel's LGM(Lightning Mountain) SoC contains a PWM fan controller which is only used to control the fan attached to the system. This PWM controller does not have any other consumer other than fan. Add DT bindings documentation for this PWM fan controller.

---
 .../devicetree/bindings/pwm/intel,lgm-pwm.yaml     | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml
Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml new file +40 -0
new file mode 100644
index 000000000000..0211a0dc79ed
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/intel,lgm-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LGM SoC PWM fan controller
+
+maintainers:
+  - Rahul Tanwar <[email protected]>
+
+properties:
+  compatible:
+    const: intel,lgm-pwm
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+
+additionalProperties: false
+
+examples:
+  - |
+    pwm: pwm@e0d00000 {
+        compatible = "intel,lgm-pwm";
+        reg = <0xe0d00000 0x30>;
+        clocks = <&cgu0 126>;
+        resets = <&rcu0 0x30 21>;
+    };
Signature · 1 line
2.11.0
maintainer
#2 lore raw

Re: [PATCH v5 1/2] Add DT bindings YAML schema for PWM fan controller of LGM SoC

Quoted 11 lines · Rahul Tanwar

Intel's LGM(Lightning Mountain) SoC contains a PWM fan controller which is only used to control the fan attached to the system. This PWM controller does not have any other consumer other than fan. Add DT bindings documentation for this PWM fan controller.

---
 .../devicetree/bindings/pwm/intel,lgm-pwm.yaml     | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/intel,lgm-pwm.yaml

My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/reset/intel,rcu-gw.example.dt.yaml: pwm@e0d00000: '#pwm-cells' does not match any of the regexes: 'pinctrl-[0-9]+' /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pwm/intel,lgm-pwm.example.dt.yaml: pwm@e0d00000: '#pwm-cells' is a required property

See https://patchwork.ozlabs.org/patch/1334579

If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.

#3 lore raw

PATCH v5 2/2 Add PWM fan controller driver for LGM SoC

In reply to Rahul Tanwar

Intel Lightning Mountain(LGM) SoC contains a PWM fan controller. This PWM controller does not have any other consumer, it is a dedicated PWM controller for fan attached to the system. Add driver for this PWM fan controller.

---
 drivers/pwm/Kconfig         |  11 ++
 drivers/pwm/Makefile        |   1 +
 drivers/pwm/pwm-intel-lgm.c | 269 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 281 insertions(+)
 create mode 100644 drivers/pwm/pwm-intel-lgm.c
drivers/pwm/Kconfig +11 -0
index cb8d739067d2..3486edab09c4 100644
@@ -232,6 +232,17 @@ config PWM_IMX_TPM
 	  To compile this driver as a module, choose M here: the module
 	  will be called pwm-imx-tpm.
 
+config PWM_INTEL_LGM
+	tristate "Intel LGM PWM support"
+	depends on OF && HAS_IOMEM
+	depends on X86 || COMPILE_TEST
+	select REGMAP_MMIO
+	help
+	  Generic PWM fan controller driver for LGM SoC.
+
+	  To compile this driver as a module, choose M here: the module
+	  will be called pwm-intel-lgm.
+
 config PWM_IQS620A
 	tristate "Azoteq IQS620A PWM support"
 	depends on MFD_IQS62X || COMPILE_TEST
drivers/pwm/Makefile +1 -0
index a59c710e98c7..db154a6b4f51 100644
@@ -20,6 +20,7 @@ obj-$(CONFIG_PWM_IMG)		+= pwm-img.o
 obj-$(CONFIG_PWM_IMX1)		+= pwm-imx1.o
 obj-$(CONFIG_PWM_IMX27)		+= pwm-imx27.o
 obj-$(CONFIG_PWM_IMX_TPM)	+= pwm-imx-tpm.o
+obj-$(CONFIG_PWM_INTEL_LGM)	+= pwm-intel-lgm.o
 obj-$(CONFIG_PWM_IQS620A)	+= pwm-iqs620a.o
 obj-$(CONFIG_PWM_JZ4740)	+= pwm-jz4740.o
 obj-$(CONFIG_PWM_LP3943)	+= pwm-lp3943.o
drivers/pwm/pwm-intel-lgm.c new file +269 -0

269 lines not on this page · raw message

Signature · 1 line
2.11.0
#4 lore raw

Re: [PATCH v5 2/2] Add PWM fan controller driver for LGM SoC

Hello,

Quoted 9 lines · Rahul Tanwar
drivers/pwm/pwm-intel-lgm.c new file +9 -0
+static int lgm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+			 const struct pwm_state *state)
+{
+	struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip);
+	u32 duty_cycle, val;
+	int ret;
+
+	if (!state->enabled) {
+		ret = lgm_pwm_enable(chip, 0);

drivers/pwm/pwm-intel-lgm.c line 86

Quoted 10 lines
drivers/pwm/pwm-intel-lgm.c new file +10 -0
+		return ret;
+	}
+
+	/*
+	 * HW only supports NORMAL polarity
+	 * HW supports fixed period which can not be changed/configured by user
+	 */
+	if (state->polarity != PWM_POLARITY_NORMAL ||
+	    state->period != pc->period)
+		return -EINVAL;

At least for state->polarity you have to check before state->enabled, as the expectation on

.enabled = false
.polarity = PWM_POLARITY_INVERSED

is that the output becomes constant high. Also as confirmed at the end of v4, state->period < pc->period was the right check to do.

drivers/pwm/pwm-intel-lgm.c line 90

Quoted 3 lines
drivers/pwm/pwm-intel-lgm.c new file +3 -0
+	duty_cycle = min_t(u64, state->duty_cycle, state->period);
+	/* reg_value = duty_ns * LGM_PWM_MAX_DUTY_CYCLE(0xff) / period_ns */
+	val = duty_cycle * LGM_PWM_MAX_DUTY_CYCLE / state->period;

The comment adds only little compared to the code line below. Please drop it.

Dividing by state->period is wrong. I think you need pc->period here.

Quoted 49 lines
drivers/pwm/pwm-intel-lgm.c new file +49 -0
+	ret = regmap_update_bits(pc->regmap, LGM_PWM_FAN_CON0, LGM_PWM_FAN_DC_MSK,
+				 FIELD_PREP(LGM_PWM_FAN_DC_MSK, val));
+	if (ret)
+		return ret;
+
+	if (state->enabled)
+		ret = lgm_pwm_enable(chip, 1);
+
+	return ret;
+}
+
+static void lgm_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
+			      struct pwm_state *state)
+{
+	struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip);
+	u32 duty, val;
+
+	state->enabled = regmap_test_bits(pc->regmap, LGM_PWM_FAN_CON0,
+					  LGM_PWM_FAN_EN_EN);
+	state->polarity = PWM_POLARITY_NORMAL;
+	state->period = pc->period; /* fixed period */
+
+	regmap_read(pc->regmap, LGM_PWM_FAN_CON0, &val);
+	duty = FIELD_GET(LGM_PWM_FAN_DC_MSK, val);
+	state->duty_cycle = DIV_ROUND_UP(duty * pc->period,
+					 LGM_PWM_MAX_DUTY_CYCLE);
+}
+
+static const struct pwm_ops lgm_pwm_ops = {
+	.get_state = lgm_pwm_get_state,
+	.apply = lgm_pwm_apply,
+	.owner = THIS_MODULE,
+};
+
+static void lgm_pwm_init(struct lgm_pwm_chip *pc)
+{
+	struct device *dev = pc->chip.dev;
+	struct regmap *regmap = pc->regmap;
+	u32 max_rpm, fan_wire, con0_val, con0_mask;
+
+	if (device_property_read_u32(dev, "intel,fan-wire", &fan_wire))
+		fan_wire = 2; /* default is 2 wire mode */
+
+	con0_mask = LGM_PWM_FAN_MODE_MSK;
+
+	switch (fan_wire) {
+	case 4:
+		con0_val = FIELD_PREP(LGM_PWM_FAN_MODE_MSK, LGM_PWM_FAN_MODE_4WIRE);
+		pc->period = LGM_PWM_PERIOD_4WIRE_NSECS;

drivers/pwm/pwm-intel-lgm.c line 150

Quoted 10 lines
drivers/pwm/pwm-intel-lgm.c new file +10 -0
+		break;
+	default:
+		/* default is 2wire mode */
+		con0_val = FIELD_PREP(LGM_PWM_FAN_MODE_MSK, LGM_PWM_FAN_MODE_2WIRE);
+		pc->period = LGM_PWM_PERIOD_2WIRE_NSECS;
+		break;
+	}
+
+	if (device_property_read_u32(dev, "intel,max-rpm", &max_rpm))
+		max_rpm = LGM_PWM_DEFAULT_RPM;

This property isn't in the binding!?

drivers/pwm/pwm-intel-lgm.c line 158

Quoted 7 lines
drivers/pwm/pwm-intel-lgm.c new file +7 -0
+	max_rpm = min_t(u32, max_rpm, LGM_PWM_MAX_RPM);
+	if (max_rpm == 0)
+		max_rpm = LGM_PWM_DEFAULT_RPM;
+
+	regmap_update_bits(regmap, LGM_PWM_FAN_CON1, LGM_PWM_FAN_MAX_RPM_MSK, max_rpm);
+	regmap_update_bits(regmap, LGM_PWM_FAN_CON0, con0_mask, con0_val);
+}

Best regards
Uwe

Signature · 2 lines
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |
#5 lore raw

Re: [PATCH v5 2/2] Add PWM fan controller driver for LGM SoC

Hi Uwe,

Quoted 25 lines · Uwe Kleine-König

Hello,

Quoted 9 lines · Rahul Tanwar
drivers/pwm/pwm-intel-lgm.c new file +9 -0
+static int lgm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+			 const struct pwm_state *state)
+{
+	struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip);
+	u32 duty_cycle, val;
+	int ret;
+
+	if (!state->enabled) {
+		ret = lgm_pwm_enable(chip, 0);

drivers/pwm/pwm-intel-lgm.c line 86

Quoted 10 lines
drivers/pwm/pwm-intel-lgm.c new file +10 -0
+		return ret;
+	}
+
+	/*
+	 * HW only supports NORMAL polarity
+	 * HW supports fixed period which can not be changed/configured by user
+	 */
+	if (state->polarity != PWM_POLARITY_NORMAL ||
+	    state->period != pc->period)
+		return -EINVAL;

At least for state->polarity you have to check before state->enabled, as the expectation on

Quoted 5 lines

.enabled = false
.polarity = PWM_POLARITY_INVERSED

is that the output becomes constant high. Also as confirmed at the end of v4, state->period < pc->period was the right check to do.

For below case:

.enabled = false
.polarity = PWM_POLARITY_INVERSED

Since our HW does not support inversed polarity, the output for above case is expected to be constant low. And if we disable PWM before checking for polarity, the output becomes constant low. The code just does that. Sorry, i could not understand what is wrong with the code. It looks correct to me.

Given the fact that we support fixed period, if we allow state->period < pc->period case then the duty cycle will be evaluated as higher than the requested one because the state->period is lesser than the actual fixed period supported by the HW. Can you please elaborate on why you think we should allow state->period < pc->period case?

Thanks,

Regards,
Rahul

#6 lore raw

Re: [PATCH v5 2/2] Add PWM fan controller driver for LGM SoC

Quoted 37 lines · Rahul

Hi Uwe,

Quoted 25 lines · Uwe Kleine-König

Hello,

Quoted 9 lines · Rahul Tanwar
drivers/pwm/pwm-intel-lgm.c new file +9 -0
+static int lgm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+			 const struct pwm_state *state)
+{
+	struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip);
+	u32 duty_cycle, val;
+	int ret;
+
+	if (!state->enabled) {
+		ret = lgm_pwm_enable(chip, 0);

drivers/pwm/pwm-intel-lgm.c line 86

Quoted 10 lines
drivers/pwm/pwm-intel-lgm.c new file +10 -0
+		return ret;
+	}
+
+	/*
+	 * HW only supports NORMAL polarity
+	 * HW supports fixed period which can not be changed/configured by user
+	 */
+	if (state->polarity != PWM_POLARITY_NORMAL ||
+	    state->period != pc->period)
+		return -EINVAL;

At least for state->polarity you have to check before state->enabled, as the expectation on

Quoted 5 lines

.enabled = false
.polarity = PWM_POLARITY_INVERSED

is that the output becomes constant high. Also as confirmed at the end of v4, state->period < pc->period was the right check to do.

For below case:

Quoted 7 lines

.enabled = false
.polarity = PWM_POLARITY_INVERSED

Since our HW does not support inversed polarity, the output for above case is expected to be constant low. And if we disable PWM before checking for polarity, the output becomes constant low. The code just does that. Sorry, i could not understand what is wrong with the code. It looks correct to me.

As your hardware can only support normal polarity, the code must have:

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (!state->enabled) {
		ret = lgm_pwm_enable(chip, 0);
		return ret;
	}

That's what I meant writing: "At least for state->polarity you have to check before state->enabled".

Quoted 5 lines

Given the fact that we support fixed period, if we allow state->period < pc->period case then the duty cycle will be evaluated as higher than the requested one because the state->period is lesser than the actual fixed period supported by the HW. Can you please elaborate on why you think we should allow state->period < pc->period case?

You should not allow it. In v4 you had:

	if (state->polarity != PWM_POLARITY_NORMAL ||
	    state->period < pc->period)
		return -EINVAL;

That's the right thing to do (even though I was unsettled at one point and wrote it was wrong). The check in v5 with state->period != pc->period is wrong.

Best regards
Uwe

Signature · 2 lines
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |
#7 lore raw

Re: [PATCH v5 2/2] Add PWM fan controller driver for LGM SoC

Hi Uwe,

Quoted 53 lines · Uwe Kleine-König
Quoted 35 lines · Rahul

Hi Uwe,

Quoted 25 lines · Uwe Kleine-König

Hello,

Quoted 9 lines · Rahul Tanwar
drivers/pwm/pwm-intel-lgm.c new file +9 -0
+static int lgm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+			 const struct pwm_state *state)
+{
+	struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip);
+	u32 duty_cycle, val;
+	int ret;
+
+	if (!state->enabled) {
+		ret = lgm_pwm_enable(chip, 0);

drivers/pwm/pwm-intel-lgm.c line 86

Quoted 10 lines
drivers/pwm/pwm-intel-lgm.c new file +10 -0
+		return ret;
+	}
+
+	/*
+	 * HW only supports NORMAL polarity
+	 * HW supports fixed period which can not be changed/configured by user
+	 */
+	if (state->polarity != PWM_POLARITY_NORMAL ||
+	    state->period != pc->period)
+		return -EINVAL;

At least for state->polarity you have to check before state->enabled, as the expectation on

Quoted 5 lines

.enabled = false
.polarity = PWM_POLARITY_INVERSED

is that the output becomes constant high. Also as confirmed at the end of v4, state->period < pc->period was the right check to do.

For below case:

Quoted 7 lines

.enabled = false
.polarity = PWM_POLARITY_INVERSED

Since our HW does not support inversed polarity, the output for above case is expected to be constant low. And if we disable PWM before checking for polarity, the output becomes constant low. The code just does that. Sorry, i could not understand what is wrong with the code. It looks correct to me.

As your hardware can only support normal polarity, the code must have:

	if (state->polarity != PWM_POLARITY_NORMAL)
		return -EINVAL;

	if (!state->enabled) {
		ret = lgm_pwm_enable(chip, 0);
		return ret;
	}
Quoted 2 lines

That's what I meant writing: "At least for state->polarity you have to check before state->enabled".

Ok, i understand your point now.

Quoted 7 lines
Quoted 5 lines

Given the fact that we support fixed period, if we allow state->period < pc->period case then the duty cycle will be evaluated as higher than the requested one because the state->period is lesser than the actual fixed period supported by the HW. Can you please elaborate on why you think we should allow state->period < pc->period case?

You should not allow it. In v4 you had:

Quoted 8 lines
	if (state->polarity != PWM_POLARITY_NORMAL ||
	    state->period < pc->period)
		return -EINVAL;

That's the right thing to do (even though I was unsettled at one point and wrote it was wrong). The check in v5 with state->period != pc->period is wrong.

Does that mean we should allow state->period >= pc->period cases? If the state->period is greater than HW supported pc->period and if we allow it then the duty cycle will again be evaluated to be incorrect/higher than requested duty cycle. Am i missing something else? Thanks.

Regards,
Rahul

#8 lore raw

Re: [PATCH v5 2/2] Add PWM fan controller driver for LGM SoC

Hello,

Quoted 7 lines · Rahul
Quoted 6 lines · Uwe Kleine-König

In v4 you had:

	if (state->polarity != PWM_POLARITY_NORMAL ||
	    state->period < pc->period)
		return -EINVAL;
Quoted 5 lines
Quoted 3 lines

That's the right thing to do (even though I was unsettled at one point and wrote it was wrong). The check in v5 with state->period != pc->period is wrong.

Does that mean we should allow state->period >= pc->period cases?

Yes, the driver is supposed to implement the longest period not longer than the requested one. This implies everything >= pc->period is fine.

Quoted 4 lines

If the state->period is greater than HW supported pc->period and if we allow it then the duty cycle will again be evaluated to be incorrect/higher than requested duty cycle. Am i missing something else? Thanks.

Yes, similar as with period you're supposed to implement the longest duty cycle your hardware supports and that is not longer than the requested duty cycle.

Best regards
Uwe

Signature · 2 lines
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |