make hdmi work on bananapi-r2
Subsystems (9)
v4 cover make hdmi work on bananapi-r2
From: Frank Wunderlich <[email protected]>
This Patch-Series adds missing Patches/Bugfixes to get hdmi working on BPI-R2
v3->v4:
- fix removed const in "add ddp routing for mt7623"
- change subjects to "drm/mediatek:..."
- add documentation for mt7623-* compatibles
- dropped redundant display_components node (mmsys compatible)
- add reviewd-by collected in v3v2->v3:
- use own mmsys-routing for mt7623 instead of code getting different routing from dts
- remove ddp routing bls -> dpi from bpir2/rfb dts
- updated some commit-Messages as suggested by CK Huv1->v2:
- using get_possible_crtc API instead of hardcoded
- drop unused dts-nodes
- refine commit-messages as far as i can :)
"config component output by device node port" is needed to fix a WARN_ON() "fix boot up for 720 and 480 but 1080" fixes flickering,
which may cause also some resolutions not working on some TFT (had some pr>
Frank Wunderlich (2):
dt-bindings: mediatek: add mt7623 display-nodes
drm/mediatek: add ddp routing for mt7623
Jitao Shi (1):
drm/mediatek: dpi/dsi: change the getting possible_crtc way
Ryder Lee (1):
arm: dts: mt7623: add display subsystem related device nodes
Stu Hsieh (1):
drm/mediatek: Add get_possible_crtc API for dpi, dsi
chunhui dai (1):
drm/mediatek: disable tmds on mt2701
.../display/mediatek/mediatek,disp.txt | 2 +- .../display/mediatek/mediatek,dpi.txt | 2 +- .../display/mediatek/mediatek,dsi.txt | 4 +- .../display/mediatek/mediatek,hdmi.txt | 4 + arch/arm/boot/dts/mt7623.dtsi | 170 ++++++++++++++++++ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 72 ++++++++ arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 72 ++++++++ drivers/gpu/drm/mediatek/mtk_dpi.c | 3 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 42 +++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 23 +++ drivers/gpu/drm/mediatek/mtk_dsi.c | 3 +- drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 + drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 + .../gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 + 15 files changed, 398 insertions(+), 6 deletions(-)
Signature · 7 lines
2.25.1 _______________________________________________ Linux-mediatek mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-mediatek
PATCH v4 1/6 dt-bindings: mediatek: add mt7623 display-nodes
From: Frank Wunderlich <[email protected]>
mt7623 uses mt2701/mt8173 for drm, but have own compatibles
--- .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dpi.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 4 ++-- .../devicetree/bindings/display/mediatek/mediatek,hdmi.txt | 4 ++++ 4 files changed, 8 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +1 -1
@@ -43,7 +43,7 @@ Required properties (all function blocks): "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,<chip>-disp-mutex" - display mutex "mediatek,<chip>-disp-od" - overdrive - the supported chips are mt2701, mt2712 and mt8173. + the supported chips are mt2701, mt7623, mt2712 and mt8173. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks).
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt +1 -1
@@ -7,7 +7,7 @@ output bus. Required properties: - compatible: "mediatek,<chip>-dpi" - the supported chips are mt2701 , mt8173 and mt8183. + the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +2 -2
@@ -7,7 +7,7 @@ channel output. Required properties: - compatible: "mediatek,<chip>-dsi" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks
@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,<chip>-mipi-tx" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, 7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoder
Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt +4 -0
@@ -6,6 +6,7 @@ its parallel input. Required properties: - compatible: Should be "mediatek,<chip>-hdmi". +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks
@@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication. Required properties: - compatible: Should be "mediatek,<chip>-cec" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clock
@@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices. Required properties: - compatible: Should be "mediatek,<chip>-hdmi-ddc" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - clocks: device clock - clock-names: Should be "ddc-i2c".
@@ -56,6 +59,7 @@ output and drives the HDMI pads. Required properties: - compatible: "mediatek,<chip>-hdmi-phy" +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the module's registers - clocks: PLL reference clock - clock-names: must contain "pll_ref"
Signature · 7 lines
2.25.1 _______________________________________________ Linux-mediatek mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-mediatek
Aw: [PATCH v4 1/6] dt-bindings: mediatek: add mt7623 display-nodes
CC Rob Herring and devicetree-list
Quoted 106 lines
Gesendet: Dienstag, 04. August 2020 um 18:55 Uhr
Von: "Frank Wunderlich" <[email protected]>
An: [email protected]
Cc: "Frank Wunderlich" <[email protected]>, "Chun-Kuang Hu" <[email protected]>, "Philipp Zabel" <[email protected]>, "David Airlie" <[email protected]>, "Daniel Vetter" <[email protected]>, "Matthias Brugger" <[email protected]>, [email protected], [email protected], [email protected]
Betreff: [PATCH v4 1/6] dt-bindings: mediatek: add mt7623 display-nodesFrom: Frank Wunderlich <[email protected]>
mt7623 uses mt2701/mt8173 for drm, but have own compatibles
Signed-off-by Frank Wunderlich <[email protected]>--- .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dpi.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 4 ++-- .../devicetree/bindings/display/mediatek/mediatek,hdmi.txt | 4 ++++ 4 files changed, 8 insertions(+), 4 deletions(-)Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +1
-1@@ -43,7 +43,7 @@ Required properties (all function blocks): "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,<chip>-disp-mutex" - display mutex "mediatek,<chip>-disp-od" - overdrive - the supported chips are mt2701, mt2712 and mt8173. + the supported chips are mt2701, mt7623, mt2712 and mt8173. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks).Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt +1
-1@@ -7,7 +7,7 @@ output bus. Required properties: - compatible: "mediatek,<chip>-dpi" - the supported chips are mt2701 , mt8173 and mt8183. + the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocksDocumentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +2
-2@@ -7,7 +7,7 @@ channel output. Required properties: - compatible: "mediatek,<chip>-dsi" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,<chip>-mipi-tx" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, 7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoderDocumentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt +4
-1@@ -6,6 +6,7 @@ its parallel input. Required properties: - compatible: Should be "mediatek,<chip>-hdmi". +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks@@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication. Required properties: - compatible: Should be "mediatek,<chip>-cec" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clock@@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices. Required properties: - compatible: Should be "mediatek,<chip>-hdmi-ddc" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - clocks: device clock - clock-names: Should be "ddc-i2c".@@ -56,6 +59,7 @@ output and drives the HDMI pads. Required properties: - compatible: "mediatek,<chip>-hdmi-phy" +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the module's registers - clocks: PLL reference clock - clock-names: must contain "pll_ref" --2.25.1
Rob Herring
Acked-byRe: [PATCH v4 1/6] dt-bindings: mediatek: add mt7623 display-nodes
Quoted 2 lines · Frank Wunderlich
CC Rob Herring and devicetree-list
Resend or it is not in my patchwork queue.
But this is simple enough:
Quoted 97 lines
Quoted 97 lines
Gesendet: Dienstag, 04. August 2020 um 18:55 Uhr
Von: "Frank Wunderlich" <[email protected]>
An: [email protected]
Cc: "Frank Wunderlich" <[email protected]>, "Chun-Kuang Hu" <[email protected]>, "Philipp Zabel" <[email protected]>, "David Airlie" <[email protected]>, "Daniel Vetter" <[email protected]>, "Matthias Brugger" <[email protected]>, [email protected], [email protected], [email protected]
Betreff: [PATCH v4 1/6] dt-bindings: mediatek: add mt7623 display-nodesFrom: Frank Wunderlich <[email protected]>
mt7623 uses mt2701/mt8173 for drm, but have own compatibles
Signed-off-by Frank Wunderlich <[email protected]>--- .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dpi.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 4 ++-- .../devicetree/bindings/display/mediatek/mediatek,hdmi.txt | 4 ++++ 4 files changed, 8 insertions(+), 4 deletions(-)Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +1
-1@@ -43,7 +43,7 @@ Required properties (all function blocks): "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,<chip>-disp-mutex" - display mutex "mediatek,<chip>-disp-od" - overdrive - the supported chips are mt2701, mt2712 and mt8173. + the supported chips are mt2701, mt7623, mt2712 and mt8173. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks).Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt +1
-1@@ -7,7 +7,7 @@ output bus. Required properties: - compatible: "mediatek,<chip>-dpi" - the supported chips are mt2701 , mt8173 and mt8183. + the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocksDocumentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +2
-2@@ -7,7 +7,7 @@ channel output. Required properties: - compatible: "mediatek,<chip>-dsi" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,<chip>-mipi-tx" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, 7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoderDocumentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt +3
-0@@ -6,6 +6,7 @@ its parallel input. Required properties: - compatible: Should be "mediatek,<chip>-hdmi". +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks@@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication. Required properties: - compatible: Should be "mediatek,<chip>-cec" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clock@@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices. Required properties: - compatible: Should be "mediatek,<chip>-hdmi-ddc" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - clocks: device clock - clock-names: Should be "ddc-i2c".@@ -56,6 +59,7 @@ output and drives the HDMI pads.
Quoted 10 lines
Quoted 10 lines
Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt +1
-1Required properties: - compatible: "mediatek,<chip>-hdmi-phy" +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the module's registers - clocks: PLL reference clock - clock-names: must contain "pll_ref" --2.25.1
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Re: [PATCH v4 1/6] dt-bindings: mediatek: add mt7623 display-nodes
In reply to Frank WunderlichFrank Wunderlich <[email protected]> 於 2020年8月5日 週三 上午12:56寫道:
Quoted 4 lines
From: Frank Wunderlich <[email protected]>
mt7623 uses mt2701/mt8173 for drm, but have own compatibles
Quoted 94 lines
Signed-off-by Frank Wunderlich <[email protected]>--- .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dpi.txt | 2 +- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 4 ++-- .../devicetree/bindings/display/mediatek/mediatek,hdmi.txt | 4 ++++ 4 files changed, 8 insertions(+), 4 deletions(-)Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +1
-1@@ -43,7 +43,7 @@ Required properties (all function blocks): "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,<chip>-disp-mutex" - display mutex "mediatek,<chip>-disp-od" - overdrive - the supported chips are mt2701, mt2712 and mt8173. + the supported chips are mt2701, mt7623, mt2712 and mt8173. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks).Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt +1
-1@@ -7,7 +7,7 @@ output bus. Required properties: - compatible: "mediatek,<chip>-dpi" - the supported chips are mt2701 , mt8173 and mt8183. + the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocksDocumentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +2
-2@@ -7,7 +7,7 @@ channel output. Required properties: - compatible: "mediatek,<chip>-dsi" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,<chip>-mipi-tx" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, 7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoderDocumentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt +4
-1@@ -6,6 +6,7 @@ its parallel input. Required properties: - compatible: Should be "mediatek,<chip>-hdmi". +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks@@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication. Required properties: - compatible: Should be "mediatek,<chip>-cec" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clock@@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices. Required properties: - compatible: Should be "mediatek,<chip>-hdmi-ddc" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - clocks: device clock - clock-names: Should be "ddc-i2c".@@ -56,6 +59,7 @@ output and drives the HDMI pads. Required properties: - compatible: "mediatek,<chip>-hdmi-phy" +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the module's registers - clocks: PLL reference clock - clock-names: must contain "pll_ref" --
Quoted 2 lines
2.25.1
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PATCH v4 2/6 drm/mediatek: add ddp routing for mt7623
In reply to Frank WunderlichFrom: Frank Wunderlich <[email protected]>
on BPi-R2/mt7623 main-path have to be routed to DPI0 (hdmi) instead of DSI0 using compatible "mt7623-mmsys" already defined in dts
--- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)
drivers/gpu/drm/mediatek/mtk_drm_drv.c +23 -0
@@ -74,6 +74,19 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { DDP_COMPONENT_DPI0, }; +static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = { +DDP_COMPONENT_OVL0 , +DDP_COMPONENT_RDMA0 , +DDP_COMPONENT_COLOR0 , +DDP_COMPONENT_BLS , +DDP_COMPONENT_DPI0 , +}; + +static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = { +DDP_COMPONENT_RDMA1 , +DDP_COMPONENT_DSI0 , +}; +static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {DDP_COMPONENT_OVL0 ,DDP_COMPONENT_COLOR0 ,
@@ -127,6 +140,14 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .shadow_register = true, }; +static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = { + .main_path = mt7623_mtk_ddp_main, + .main_len =ARRAY_SIZE (mt7623_mtk_ddp_main), + .ext_path = mt7623_mtk_ddp_ext, + .ext_len =ARRAY_SIZE (mt7623_mtk_ddp_ext), + .shadow_register = true, +}; +static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { .main_path = mt2712_mtk_ddp_main, .main_len =ARRAY_SIZE (mt2712_mtk_ddp_main),
@@ -422,6 +443,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {static const struct of_device_id mtk_drm_of_ids[] = { { .compatible ="mediatek,mt2701-mmsys" , .data = &mt2701_mmsys_driver_data}, + { .compatible ="mediatek,mt7623-mmsys" , + .data = &mt7623_mmsys_driver_data}, { .compatible ="mediatek,mt2712-mmsys" , .data = &mt2712_mmsys_driver_data}, { .compatible ="mediatek,mt8173-mmsys" ,
Signature · 7 lines
2.25.1 _______________________________________________ Linux-mediatek mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-mediatek
Re: [PATCH v4 2/6] drm/mediatek: add ddp routing for mt7623
Hi, Frank:
Frank Wunderlich <[email protected]> 於 2020年8月5日 週三 上午12:56寫道:
Quoted 5 lines
From: Frank Wunderlich <[email protected]>
on BPi-R2/mt7623 main-path have to be routed to DPI0 (hdmi) instead of DSI0 using compatible "mt7623-mmsys" already defined in dts
Quoted 55 lines
Signed-off-by Frank Wunderlich <[email protected]>--- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)drivers/gpu/drm/mediatek/mtk_drm_drv.c +23
-1@@ -74,6 +74,19 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = { DDP_COMPONENT_DPI0, }; +static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = { +DDP_COMPONENT_OVL0 , +DDP_COMPONENT_RDMA0 , +DDP_COMPONENT_COLOR0 , +DDP_COMPONENT_BLS , +DDP_COMPONENT_DPI0 , +}; + +static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = { +DDP_COMPONENT_RDMA1 , +DDP_COMPONENT_DSI0 , +}; +static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {DDP_COMPONENT_OVL0 ,DDP_COMPONENT_COLOR0 ,@@ -127,6 +140,14 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .shadow_register = true, }; +static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = { + .main_path = mt7623_mtk_ddp_main, + .main_len =ARRAY_SIZE (mt7623_mtk_ddp_main), + .ext_path = mt7623_mtk_ddp_ext, + .ext_len =ARRAY_SIZE (mt7623_mtk_ddp_ext), + .shadow_register = true, +}; +static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { .main_path = mt2712_mtk_ddp_main, .main_len =ARRAY_SIZE (mt2712_mtk_ddp_main),@@ -422,6 +443,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {static const struct of_device_id mtk_drm_of_ids[] = { { .compatible ="mediatek,mt2701-mmsys" , .data = &mt2701_mmsys_driver_data}, + { .compatible ="mediatek,mt7623-mmsys" , + .data = &mt7623_mmsys_driver_data}, { .compatible ="mediatek,mt2712-mmsys" , .data = &mt2712_mmsys_driver_data}, { .compatible ="mediatek,mt8173-mmsys" , --
Quoted 2 lines
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PATCH v4 1/1 net: ethernet: mtk_eth_soc: fix MTU warnings
In reply to Frank WunderlichFrom: Landen Chao <[email protected]>
in recent kernel versions there are warnings about incorrect MTU size like these:
eth0: mtu greater than device maximummtk_soc_eth 1b100000.ethernet eth0: error -22 setting MTU to include DSA overhead
---v3->v4
- fix commit-message (hyphernations,capitalisation) as suggested by Russell
- add Signed-off-by Landen
- dropped wrong signed-off from rene (because previous v1/2 was from him)
--- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/net/ethernet/mediatek/mtk_eth_soc.c +2 -0
@@ -2891,6 +2891,8 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) eth->netdev[id]->irq = eth->irq[0 ]; eth->netdev[id]->dev.of_node = np; + eth->netdev[id]->max_mtu =MTK_MAX_RX_LENGTH -MTK_RX_ETH_HLEN ; +return 0 ; free_netdev:
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2.25.1 _______________________________________________ Linux-mediatek mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-mediatek
Aw: [PATCH v4] net: ethernet: mtk_eth_soc: fix MTU warnings
sorry, send this accidentally while posting my hdmi series v4 (have not deleted patch-file) just ignore this...it's already merged
regards Frank
PATCH v4 3/6 drm/mediatek: disable tmds on mt2701
In reply to Frank WunderlichFrom: chunhui dai <[email protected]>
disable tmds on phy on mt2701 to support other resolutions like 1280x1024
--- drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +++ drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 + drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 + 3 files changed, 5 insertions(+)
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c +3 -0
@@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev)return PTR_ERR (phy_provider); } +if (hdmi_phy->conf->pll_default_off) + hdmi_phy->conf->hdmi_phy_disable_tmds (hdmi_phy); +return of_clk_add_provider (dev->of_node, of_clk_src_simple_get, hdmi_phy->pll); }
drivers/gpu/drm/mediatek/mtk_hdmi_phy.h +1 -0
@@ -22,6 +22,7 @@ struct mtk_hdmi_phy;struct mtk_hdmi_phy_conf {bool tz_disabled;unsigned long flags; +bool pll_default_off;const struct clk_ops *hdmi_phy_clk_ops;void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +1 -0
@@ -239,6 +239,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = { .tz_disabled = true, .flags =CLK_SET_RATE_GATE , + .pll_default_off = true, .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops, .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds, .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
Signature · 7 lines
2.25.1 _______________________________________________ Linux-mediatek mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-mediatek
PATCH v4 4/6 drm/mediatek: Add get_possible_crtc API for dpi, dsi
In reply to Frank WunderlichFrom: Stu Hsieh <[email protected]>
For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so search pipeline information to find out the correct possible crtc.
--- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 42 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 2 + 2 files changed, 44 insertions(+)
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +42 -0
@@ -13,6 +13,8 @@#include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/soc/mediatek/mtk-cmdq.h> +#include <drm/drm_print.h> +#include "mtk_drm_drv.h" #include "mtk_drm_plane.h" #include "mtk_drm_ddp_comp.h"
@@ -412,6 +414,22 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL }, }; +static bool mtk_drm_find_comp_in_ddp (struct mtk_ddp_comp ddp_comp, +const enum mtk_ddp_comp_id *path, +unsigned int path_len) +{ +unsigned int i; + +if (path ==NULL ) +return false; + +for (i =0U ; i < path_len; i++) +if (ddp_comp.id == path[i]) +return true; + +return false; +} +int mtk_ddp_comp_get_id (struct device_node *node,enum mtk_ddp_comp_type comp_type) {
@@ -427,6 +445,30 @@ int mtk_ddp_comp_get_id(struct device_node *node,return -EINVAL ; } +unsigned int mtk_drm_find_possible_crtc_by_comp (struct drm_device *drm, +struct mtk_ddp_comp ddp_comp) +{ +struct mtk_drm_private *private = drm->dev_private; +unsigned int ret; + +if (mtk_drm_find_comp_in_ddp (ddp_comp, private->data->main_path, + private->data->main_len) == true) { + ret =BIT (0 ); + }else if (mtk_drm_find_comp_in_ddp (ddp_comp, + private->data->ext_path, + private->data->ext_len) == true) { + ret =BIT (1 ); + }else if (mtk_drm_find_comp_in_ddp (ddp_comp, + private->data->third_path, + private->data->third_len) == true) { + ret =BIT (2 ); + }else { +DRM_INFO ("Failed to find comp in ddp table\n" ); + ret =0 ; + } +return ret; +} +int mtk_ddp_comp_init (struct device *dev,struct device_node *node,struct mtk_ddp_comp *comp,enum mtk_ddp_comp_id comp_id,const struct mtk_ddp_comp_funcs *funcs)
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +2 -0
@@ -202,6 +202,8 @@ static inline void mtk_ddp_ctm_set(struct mtk_ddp_comp *comp,int mtk_ddp_comp_get_id (struct device_node *node,enum mtk_ddp_comp_type comp_type); +unsigned int mtk_drm_find_possible_crtc_by_comp (struct drm_device *drm, +struct mtk_ddp_comp ddp_comp);int mtk_ddp_comp_init (struct device *dev,struct device_node *comp_node,struct mtk_ddp_comp *comp,enum mtk_ddp_comp_id comp_id,const struct mtk_ddp_comp_funcs *funcs);
Signature · 1 line
2.25.1
PATCH v4 5/6 drm/mediatek: dpi/dsi: change the getting possible_crtc way
In reply to Frank WunderlichFrom: Jitao Shi <[email protected]>
For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so call mtk_drm_find_possible_crtc_by_comp() to find out the correct possible crtc.
--- drivers/gpu/drm/mediatek/mtk_dpi.c | 3 ++- drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-)
drivers/gpu/drm/mediatek/mtk_dpi.c +2 -1
@@ -608,7 +608,8 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)drm_encoder_helper_add (&dpi->encoder, &mtk_dpi_encoder_helper_funcs);/* Currently DPI0 is fixed to be driven by OVL1 */ - dpi->encoder.possible_crtcs =BIT (1 ); + dpi->encoder.possible_crtcs = +mtk_drm_find_possible_crtc_by_comp (drm_dev, dpi->ddp_comp); ret =drm_bridge_attach (&dpi->encoder, dpi->bridge,NULL ,0 );if (ret) {
drivers/gpu/drm/mediatek/mtk_dsi.c +2 -1
@@ -892,7 +892,8 @@ static int mtk_dsi_create_conn_enc(struct drm_device *drm, struct mtk_dsi *dsi)* Currently display data paths are statically assigned to a crtc each. * crtc 0 is OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 */ - dsi->encoder.possible_crtcs =1 ; + dsi->encoder.possible_crtcs = +mtk_drm_find_possible_crtc_by_comp (drm, dsi->ddp_comp);/* If there's a bridge, attach to it and let it create the connector */ if (dsi->bridge) {
Signature · 1 line
2.25.1
PATCH v4 6/6 arm: dts: mt7623: add display subsystem related device nodes
In reply to Frank WunderlichFrom: Ryder Lee <[email protected]>
Add display subsystem related device nodes for MT7623.
---
changedv3->v4:
drop display_components which is duplicate of existing mmsysv2->v3:
drop bls to dpi routing
--- arch/arm/boot/dts/mt7623.dtsi | 170 ++++++++++++++++++ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 72 ++++++++ arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 72 ++++++++ 3 files changed, 314 insertions(+)
arch/arm/boot/dts/mt7623.dtsi +170 -0
@@ -24,6 +24,11 @@ / { #address-cells = <2>; #size-cells = <2>; + aliases { + rdma0 = &rdma0; + rdma1 = &rdma1; + }; + cpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared;
@@ -321,6 +326,25 @@ pwrap: pwrap@1000d000 { clock-names = "spi", "wrap"; }; + mipi_tx0: mipi-dphy@10010000 { + compatible = "mediatek,mt7623-mipi-tx", + "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + }; + + cec: cec@10012000 { + compatible = "mediatek,mt7623-cec", + "mediatek,mt8173-cec"; + reg = <0 0x10012000 0 0xbc>; + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_LOW>; + clocks = <&infracfg CLK_INFRA_CEC>; + status = "disabled"; + }; + cir: cir@10013000 { compatible = "mediatek,mt7623-cir"; reg = <0 0x10013000 0 0x1000>;
@@ -369,6 +393,18 @@ apmixedsys: syscon@10209000 { #clock-cells = <1>; }; + hdmi_phy: phy@10209100 { + compatible = "mediatek,mt7623-hdmi-phy", + "mediatek,mt2701-hdmi-phy"; + reg = <0 0x10209100 0 0x24>; + clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>; + clock-names = "pll_ref"; + clock-output-names = "hdmitx_dig_cts"; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; + rng: rng@1020f000 { compatible = "mediatek,mt7623-rng"; reg = <0 0x1020f000 0 0x1000>;
@@ -568,6 +604,16 @@ bch: ecc@1100e000 { status = "disabled"; }; + hdmiddc0: i2c@11013000 { + compatible = "mediatek,mt7623-hdmi-ddc", + "mediatek,mt8173-hdmi-ddc"; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>; + reg = <0 0x11013000 0 0x1C>; + clocks = <&pericfg CLK_PERI_I2C3>; + clock-names = "ddc-i2c"; + status = "disabled"; + }; + nor_flash: spi@11014000 { compatible = "mediatek,mt7623-nor", "mediatek,mt8173-nor";
@@ -766,6 +812,77 @@ mmsys: syscon@14000000 { #clock-cells = <1>; }; + ovl@14007000 { + compatible = "mediatek,mt7623-disp-ovl", + "mediatek,mt2701-disp-ovl"; + reg = <0 0x14007000 0 0x1000>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_OVL>; + iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>; + mediatek,larb = <&larb0>; + }; + + rdma0: rdma@14008000 { + compatible = "mediatek,mt7623-disp-rdma", + "mediatek,mt2701-disp-rdma"; + reg = <0 0x14008000 0 0x1000>; + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_RDMA>; + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>; + mediatek,larb = <&larb0>; + }; + + wdma@14009000 { + compatible = "mediatek,mt7623-disp-wdma", + "mediatek,mt2701-disp-wdma"; + reg = <0 0x14009000 0 0x1000>; + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_WDMA>; + iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>; + mediatek,larb = <&larb0>; + }; + + bls: pwm@1400a000 { + compatible = "mediatek,mt7623-disp-pwm", + "mediatek,mt2701-disp-pwm"; + reg = <0 0x1400a000 0 0x1000>; + #pwm-cells = <2>; + clocks = <&mmsys CLK_MM_MDP_BLS_26M>, + <&mmsys CLK_MM_DISP_BLS>; + clock-names = "main", "mm"; + status = "disabled"; + }; + + color@1400b000 { + compatible = "mediatek,mt7623-disp-color", + "mediatek,mt2701-disp-color"; + reg = <0 0x1400b000 0 0x1000>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_COLOR>; + }; + + dsi: dsi@1400c000 { + compatible = "mediatek,mt7623-dsi", + "mediatek,mt2701-dsi"; + reg = <0 0x1400c000 0 0x1000>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DSI_ENGINE>, + <&mmsys CLK_MM_DSI_DIG>, + <&mipi_tx0>; + clock-names = "engine", "digital", "hs"; + phys = <&mipi_tx0>; + phy-names = "dphy"; + status = "disabled"; + }; + + mutex: mutex@1400e000 { + compatible = "mediatek,mt7623-disp-mutex", + "mediatek,mt2701-disp-mutex"; + reg = <0 0x1400e000 0 0x1000>; + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_MUTEX_32K>; + }; + larb0: larb@14010000 { compatible = "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb";
@@ -778,6 +895,44 @@ larb0: larb@14010000 { power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; }; + rdma1: rdma@14012000 { + compatible = "mediatek,mt7623-disp-rdma", + "mediatek,mt2701-disp-rdma"; + reg = <0 0x14012000 0 0x1000>; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DISP_RDMA1>; + iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>; + mediatek,larb = <&larb0>; + }; + + dpi0: dpi@14014000 { + compatible = "mediatek,mt7623-dpi", + "mediatek,mt2701-dpi"; + reg = <0 0x14014000 0 0x1000>; + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DPI1_DIGL>, + <&mmsys CLK_MM_DPI1_ENGINE>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + status = "disabled"; + }; + + hdmi0: hdmi@14015000 { + compatible = "mediatek,mt7623-hdmi", + "mediatek,mt8173-hdmi"; + reg = <0 0x14015000 0 0x400>; + clocks = <&mmsys CLK_MM_HDMI_PIXEL>, + <&mmsys CLK_MM_HDMI_PLL>, + <&mmsys CLK_MM_HDMI_AUDIO>, + <&mmsys CLK_MM_HDMI_SPDIF>; + clock-names = "pixel", "pll", "bclk", "spdif"; + phys = <&hdmi_phy>; + phy-names = "hdmi"; + mediatek,syscon-hdmi = <&mmsys 0x900>; + cec = <&cec>; + status = "disabled"; + }; + imgsys: syscon@15000000 { compatible = "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys",
@@ -1102,6 +1257,21 @@ pins-cir { }; }; + hdmi_pins_a: hdmi-default { + pins-hdmi { + pinmux = <MT7623_PIN_123_HTPLG_FUNC_HTPLG>; + input-enable; + bias-pull-down; + }; + }; + + hdmi_ddc_pins_a: hdmi_ddc-default { + pins-hdmi-ddc { + pinmux = <MT7623_PIN_124_GPIO124_FUNC_HDMISCK>, + <MT7623_PIN_125_GPIO125_FUNC_HDMISD>; + }; + }; + i2c0_pins_a: i2c0-default { pins-i2c0 { pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +72 -0
100 lines not on this page · raw message
arch/arm/boot/dts/mt7623n-rfb-emmc.dts +72 -0
100 lines not on this page · raw message
Signature · 1 line
2.25.1
Re: [PATCH v4 6/6] arm: dts: mt7623: add display subsystem related device nodes
Quoted 41 lines · Frank Wunderlich
From: Ryder Lee <[email protected]>
Add display subsystem related device nodes for MT7623.
Cc CK Hu <[email protected]>Signed-off-by chunhui dai <[email protected]>Signed-off-by Bibby Hsieh <[email protected]>Signed-off-by Ryder Lee <[email protected]>Signed-off-by Frank Wunderlich <[email protected]>Tested-by Frank Wunderlich <[email protected]>---
changedv3->v4:
dropdisplay_componentswhich is duplicate of existing mmsysv2->v3:
drop bls to dpi routing--- arch/arm/boot/dts/mt7623.dtsi | 170 ++++++++++++++++++ arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 72 ++++++++ arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 72 ++++++++ 3 files changed, 314 insertions(+)arch/arm/boot/dts/mt7623.dtsi +5
-0@@ -24,6 +24,11 @@ / { #address-cells = <2>; #size-cells = <2>; + aliases { + rdma0 = &rdma0; + rdma1 = &rdma1; + }; + cpu_opp_table: opp-table { compatible = "operating-points-v2"; opp-shared;@@ -321,6 +326,25 @@ pwrap: pwrap@1000d000 { clock-names = "spi", "wrap"; };
arch/arm/boot/dts/mt7623.dtsi pwrap: pwrap@1000d000 { · line 337
Quoted 10 lines
arch/arm/boot/dts/mt7623.dtsi +9
-0+ mipi_tx0: mipi-dphy@10010000 { + compatible = "mediatek,mt7623-mipi-tx", + "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + };
Doesn't this (and some others) also need status="disabled" since they're not present on MT7623A? Or maybe it's time to split mt7623.dtsi into a mt7623n.dtsi which includes mt7623a.dtsi and adds the extra components?
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Aw: Re: [PATCH v4 6/6] arm: dts: mt7623: add display subsystem related device nodes
Quoted 17 lines
Gesendet: Dienstag, 04. August 2020 um 19:24 Uhr
Von: "David Woodhouse" <[email protected]>arch/arm/boot/dts/mt7623.dtsi pwrap: pwrap@1000d000 { · line 337
Quoted 9 lines
arch/arm/boot/dts/mt7623.dtsi +9
-0+ mipi_tx0: mipi-dphy@10010000 { + compatible = "mediatek,mt7623-mipi-tx", + "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + };Doesn't this (and some others) also need status="disabled" since they're not present on MT7623A? Or maybe it's time to split
mt7623.dtsiinto amt7623n.dtsiwhich includesmt7623a.dtsiand adds the extra components?
do you have a MT7623A board for testing? is there any list which components are existing on mt7623a? or should i disable all of them and re-enable them in bpi-r2 dts?
regards Frank
Re: Aw: Re: [PATCH v4 6/6] arm: dts: mt7623: add display subsystem related device nodes
Quoted 18 lines · Frank Wunderlich
Quoted 17 lines
Gesendet: Dienstag, 04. August 2020 um 19:24 Uhr
Von: "David Woodhouse" <[email protected]>arch/arm/boot/dts/mt7623.dtsi pwrap: pwrap@1000d000 { · line 337
Quoted 9 lines
arch/arm/boot/dts/mt7623.dtsi +9
-0+ mipi_tx0: mipi-dphy@10010000 { + compatible = "mediatek,mt7623-mipi-tx", + "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + };Doesn't this (and some others) also need status="disabled" since they're not present on MT7623A? Or maybe it's time to split
mt7623.dtsi
into amt7623n.dtsiwhich includesmt7623a.dtsiand adds the extra components?
Quoted 3 lines
do you have a MT7623A board for testing? is there any list which components are existing on mt7623a? or should i disable all of them and re-enable them in bpi-r2 dts?
The UniElec U7623 board (which is supported in OpenWrt) is MT7623A.
I was told that MT7623N has GPU and HDMI, while the MT7623A has a built-in mt7530 switch. Does that imply the switch on the MT7623N boards is *external*?
If so, that means that mt7623n.dtsi maybe shouldn't just include mt7623a.dtsi because it's not a strict superset; maybe they should both include a common mt7623.dtsi that has the parts that are truly common?
I also suspect the switch definition from the UniElec U7623 dts should probably move to this new mt7623a.dtsi? That's not upstream yet though.
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Aw: Re: Re: [PATCH v4 6/6] arm: dts: mt7623: add display subsystem related device nodes
CC Rob Herring + devicetree List + Sean
Quoted 20 lines
Gesendet: Dienstag, 04. August 2020 um 20:02 Uhr
Von: "David Woodhouse" <[email protected]>Quoted 17 lines · Frank Wunderlich
Quoted 17 lines
Gesendet: Dienstag, 04. August 2020 um 19:24 Uhr
Von: "David Woodhouse" <[email protected]>arch/arm/boot/dts/mt7623.dtsi pwrap: pwrap@1000d000 { · line 337
Quoted 9 lines
arch/arm/boot/dts/mt7623.dtsi +9
-0+ mipi_tx0: mipi-dphy@10010000 { + compatible = "mediatek,mt7623-mipi-tx", + "mediatek,mt2701-mipi-tx"; + reg = <0 0x10010000 0 0x90>; + clocks = <&clk26m>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + };Doesn't this (and some others) also need status="disabled" since they're not present on MT7623A? Or maybe it's time to split
mt7623.dtsi
into amt7623n.dtsiwhich includesmt7623a.dtsiand adds the extra components?
any opinions about this? should i disable all new nodes and enable them in the dts for specific board (bpi-r2/mt7623n-rfb)?
have prepared it here [1]
Quoted 9 lines
Quoted 3 lines
do you have a MT7623A board for testing? is there any list which components are existing on mt7623a? or should i disable all of them and re-enable them in bpi-r2 dts?
The UniElec U7623 board (which is supported in OpenWrt) is MT7623A.
I was told that MT7623N has GPU and HDMI, while the MT7623A has a built-in mt7530 switch. Does that imply the switch on the MT7623N boards is *external*?
yes, bananapi r2 has external mt7530 switch connected to gmacs 0+1 with its ports 6+5
Quoted 6 lines
If so, that means that
mt7623n.dtsimaybe shouldn't just includemt7623a.dtsibecause it's not a strict superset; maybe they should both include a commonmt7623.dtsithat has the parts that are truly common?I also suspect the switch definition from the UniElec U7623 dts should probably move to this new
mt7623a.dtsi? That's not upstream yet though.
or should we split dtsi to have a common part (mt7623.dtsi), and one for soc (mt7623n.dtsi/mt7623a.dtsi)?
mt7623.dtsi => mt7623n.dtsi => mt7623n-bananapi-bpi-r2.dts mt7623.dtsi => mt7623a.dtsi => mt7623a-unielec-u7623.dts (not existing yet, openwrt seems to use a board-specific dtsi)
regards Frank
[1] https://github.com/frank-w/BPI-R2-4.14/commits/5.8-hdmi4mainline
Re: Aw: Re: Re: [PATCH v4 6/6] arm: dts: mt7623: add display subsystem related device nodes
Quoted 6 lines · Frank Wunderlich
or should we split dtsi to have a common part (
mt7623.dtsi), and one for soc (mt7623n.dtsi/mt7623a.dtsi)?
mt7623.dtsi=>mt7623n.dtsi=>mt7623n-bananapi-bpi-r2.dtsmt7623.dtsi=>mt7623a.dtsi=>mt7623a-unielec-u7623.dts(not existing yet, openwrt seems to use a board-specific dtsi)
Yes, I think we should.
I'll create mt7623a.dtsi and upstream the U7623 support; I think that can happen without conflicting with anything you do.
I note that the GPU node has been added to mt7623.dtsi in 5.8 too; that'll want to move to the new mt7623n.dtsi that you create, along with your other new additions.
Does that seem reasonable?
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Aw: Re: Re: Re: [PATCH v4 6/6] arm: dts: mt7623: add display subsystem related device nodes
Quoted 8 lines
Gesendet: Mittwoch, 05. August 2020 um 10:36 Uhr
Von: "David Woodhouse" <[email protected]>Quoted 3 lines
mt7623.dtsi=>mt7623n.dtsi=>mt7623n-bananapi-bpi-r2.dtsmt7623.dtsi=>mt7623a.dtsi=>mt7623a-unielec-u7623.dts(not existing yet, openwrt seems to use a board-specific dtsi)Yes, I think we should.
i want to see what MTK/DT owner says to this...
my current way will be still adding the nodes to existing mt7623.dtsi (like ryder lee did it in original patch) but disabling them to not break mt7623a and splitting it afterwards.
Quoted 6 lines
I'll create
mt7623a.dtsiand upstream the U7623 support; I think that can happen without conflicting with anything you do.I note that the GPU node has been added to
mt7623.dtsiin 5.8 too; that'll want to move to the newmt7623n.dtsithat you create, along with your other new additions.
i guess mali-node also needs to be moved to mt7623n.dtsi, so my current way seems right... but it's decision of MTK/DT owner. if they make a note i squash the disabling-commit into this and post v5
regards Frank
Re: Aw: Re: Re: Re: [PATCH v4 6/6] arm: dts: mt7623: add display subsystem related device nodes
Quoted 17 lines · Frank Wunderlich
Quoted 8 lines
Gesendet: Mittwoch, 05. August 2020 um 10:36 Uhr
Von: "David Woodhouse" <[email protected]>Quoted 4 lines
mt7623.dtsi=>mt7623n.dtsi=>mt7623n-bananapi-bpi-r2.dtsmt7623.dtsi=>mt7623a.dtsi=>mt7623a-unielec-u7623.dts(not existing yet,
openwrt seems to use a board-specific dtsi)Yes, I think we should.
i want to see what MTK/DT owner says to this...
my current way will be still adding the nodes to existingmt7623.dtsi(like ryder lee did it in original patch)
but disabling them to not break mt7623a and splitting it afterwards.Quoted 3 lines
I'll create
mt7623a.dtsiand upstream the U7623 support; I think that can happen without conflicting with anything you do.
Quoted 8 lines
Quoted 3 lines
I note that the GPU node has been added to
mt7623.dtsiin 5.8 too; that'll want to move to the newmt7623n.dtsithat you create, along with your other new additions.i guess mali-node also needs to be moved to
mt7623n.dtsi, so my current way seems right...
but it's decision of MTK/DT owner. if they make a note i squash the disabling-commit into this and post v5
Yes, the mali node needs moving too. I've pushed an untested series to
http://git.infradead.org/users/dwmw2/linux.git/shortlog/refs/heads/mt7623
which does that and adds the UniElec board.
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PATCH 1/3 arm: dts: remove stray /dts-v1/ from mt7623a.dtsi
From: David Woodhouse <[email protected]>
This isn't needed in dtsi files.
--- arch/arm/boot/dts/mt7623a.dtsi | 1 - 1 file changed, 1 deletion(-)
arch/arm/boot/dts/mt7623a.dtsi +0 -1
@@ -5,7 +5,6 @@ * */ -/dts-v1/; #include <dt-bindings/power/mt7623a-power.h> #include "mt7623.dtsi"
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PATCH 2/3 arm: dts: mt7623: move MT7623N GPU to separate mt7623n.dtsi file
From: David Woodhouse <[email protected]>
The MT7623A doesn't have a GPU; add it only for MT7623N boards.
--- arch/arm/boot/dts/mt7623.dtsi | 24 ------------- arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 2 +- arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 2 +- arch/arm/boot/dts/mt7623n.dtsi | 35 +++++++++++++++++++ 4 files changed, 37 insertions(+), 26 deletions(-) create mode 100644 arch/arm/boot/dts/mt7623n.dtsi
arch/arm/boot/dts/mt7623.dtsi +0 -24
@@ -734,30 +734,6 @@ g3dsys: syscon@13000000 { #reset-cells = <1>; }; - mali: gpu@13040000 { - compatible = "mediatek,mt7623-mali", "arm,mali-450"; - reg = <0 0x13040000 0 0x30000>; - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>; - interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", - "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3", - "pp"; - clocks = <&topckgen CLK_TOP_MMPLL>, - <&g3dsys CLK_G3DSYS_CORE>; - clock-names = "bus", "core"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>; - resets = <&g3dsys MT2701_G3DSYS_CORE_RST>; - }; - mmsys: syscon@14000000 { compatible = "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys",
arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +1 -1
@@ -6,7 +6,7 @@ /dts-v1/; #include <dt-bindings/input/input.h> -#include "mt7623.dtsi" +#include "mt7623n.dtsi" #include "mt6323.dtsi" / {
arch/arm/boot/dts/mt7623n-rfb-emmc.dts +1 -1
@@ -7,7 +7,7 @@ /dts-v1/; #include <dt-bindings/input/input.h> -#include "mt7623.dtsi" +#include "mt7623n.dtsi" #include "mt6323.dtsi" / {
arch/arm/boot/dts/mt7623n.dtsi new file +35 -0
@@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright © 2017-2020 MediaTek Inc. + * Author: Sean Wang <[email protected]> + * Ryder Lee <[email protected]> + * + */ + +#include "mt7623.dtsi" + +/ { + mali: gpu@13040000 { + compatible = "mediatek,mt7623-mali", "arm,mali-450"; + reg = <0 0x13040000 0 0x30000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 172 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 173 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 174 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 175 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 177 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 178 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 179 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", + "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3", + "pp"; + clocks = <&topckgen CLK_TOP_MMPLL>, + <&g3dsys CLK_G3DSYS_CORE>; + clock-names = "bus", "core"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>; + resets = <&g3dsys MT2701_G3DSYS_CORE_RST>; + }; +};
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Aw: [PATCH 2/3] arm: dts: mt7623: move MT7623N GPU to separate mt7623n.dtsi file
Hi David
Quoted 19 lines
Gesendet: Mittwoch, 05. August 2020 um 13:30 Uhr
Von: "David Woodhouse" <[email protected]>
From: David Woodhouse <[email protected]>The MT7623A doesn't have a GPU; add it only for MT7623N boards.
Fixes 1f6ed224594 ("arm: dts: mt7623: add Mali-450 device node")Signed-off-by David Woodhouse <[email protected]>arch/arm/boot/dts/mt7623.dtsi +0
-2@@ -734,30 +734,6 @@ g3dsys: syscon@13000000 { #reset-cells = <1>; }; - mali: gpu@13040000 { - compatible = "mediatek,mt7623-mali", "arm,mali-450";
...
arch/arm/boot/dts/mt7623.dtsi g3dsys: syscon@13000000 { · line 759
Quoted 6 lines
arch/arm/boot/dts/mt7623.dtsi +0
-6- clocks = <&topckgen CLK_TOP_MMPLL>, - <&g3dsys CLK_G3DSYS_CORE>; - clock-names = "bus", "core"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_MFG>; - resets = <&g3dsys MT2701_G3DSYS_CORE_RST>; - };
i guess you should to move g3dsys too, and maybe the mmsys which is also drm-related?
I can add this to my series, but before i change my series, i need advice from MTK/DT owners whats the preferred way ;)
regards Frank
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PATCH 3/3 arm: dts: mt7623: add support for UniElec U7623 eMMC
In reply to David WoodhouseFrom: David Woodhouse <[email protected]>
Based on a patch in OpenWrt from Kristian Evensen <[email protected]>
--- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/mt7623a-unielec-u7623-emmc.dts | 347 ++++++++++++++++++ 2 files changed, 348 insertions(+) create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-emmc.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -1347,6 +1347,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt6580-evbp1.dtb \ mt6589-aquaris5.dtb \ mt6592-evb.dtb \ + mt7623a-unielec-u7623-emmc.dtb \ mt7623a-rfb-emmc.dtb \ mt7623a-rfb-nand.dtb \ mt7623n-rfb-emmc.dtb \
arch/arm/boot/dts/mt7623a-unielec-u7623-emmc.dts new file +347 -0
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