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arm64: dts: qcom: sa8775p: add basic PMIC support

PATCH Applied Bartosz Golaszewski 7 participants 32 messages Mar 14, 2023 – Mar 30, 2023

Subsystems (9)

v1 of 3 Applied Latest is v3 →

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#0 lore raw

cover arm64: dts: qcom: sa8775p: add basic PMIC support

From: Bartosz Golaszewski <[email protected]>

This adds support for a number of PMIC functionalities on sa8775p. The PMIC used on the reference board is pm8654au which is another variant of the SPMI PMIC from Qualcomm. This series doesn't yet add regulators as these will be added separately together with upcoming users (UFS, USB, etc.). The RTC doesn't allow setting time and needs to be used in conjunction with SDAM the support for which will also be added separately.

Bartosz Golaszewski (14):
dt-bindings: interrupt-controller: qcom-pdc: add compatible for

    sa8775p
  arm64: dts: qcom: sa8775p: add the pdc node
  arm64: dts: qcom: sa8775p: add the spmi node
  dt-bindings: mfd: qcom,spmi-pmic: add compatible for pmm8654au
  arm64: dts: qcom: sa8775p: add support for the on-board PMICs
  arm64: dts: qcom: sa8775p-ride: enable PMIC support
  arm64: dts: qcom: sa8775p: add the Power On device node
  arm64: dts: qcom: sa8775p: pmic: add the power key
  arm64: dts: qcom: sa8775p-ride: enable the power key
  arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN
    input
  arm64: dts: qcom: sa8775p: pmic: add thermal zones
  dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for
    pmm8654au-gpio

pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpio
arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes

 .../interrupt-controller/qcom,pdc.yaml        |   1 +
 .../bindings/mfd/qcom,spmi-pmic.yaml          |   1 +
 .../bindings/pinctrl/qcom,pmic-gpio.yaml      |   2 +
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi   | 136 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/sa8775p-ride.dts     |   5 +
 arch/arm64/boot/dts/qcom/sa8775p.dtsi         |  59 ++++++++
 drivers/pinctrl/qcom/pinctrl-spmi-gpio.c      |   1 +
 7 files changed, 205 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
Signature · 1 line
2.37.2
#1 lore raw

PATCH 1/14 dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p

From: Bartosz Golaszewski <[email protected]>

Add a compatible for the Power Domain Controller on SA8775p platforms.

Cc Thomas Gleixner <[email protected]>
Cc Marc Zyngier <[email protected]>
---
 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +1 -0
index 94791e261c42..25c4662a0280 100644
@@ -26,6 +26,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,sa8775p-pdc
           - qcom,sc7180-pdc
           - qcom,sc7280-pdc
           - qcom,sc8280xp-pdc
Signature · 1 line
2.37.2
Acked-by on v1 1/14
#2 lore raw

Re: [PATCH 01/14] dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p

Quoted 7 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a compatible for the Power Domain Controller on SA8775p platforms.

Cc Thomas Gleixner <[email protected]>
Cc Marc Zyngier <[email protected]>

Best regards,
Krzysztof

#3 lore raw

PATCH 2/14 arm64: dts: qcom: sa8775p: add the pdc node

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the Power Domain Controller node for SA8775p.

---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 41 +++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p.dtsi +41 -0
index c5b73c591e0f..428d9e0849b8 100644
@@ -585,6 +585,47 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
 			};
 		};
 
+		pdc: interrupt-controller@b220000 {
+			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
+			reg = <0x0 0x0b220000 0x0 0x30000>,
+			      <0x0 0x17c000f0 0x0 0x64>;
+			qcom,pdc-ranges = <0 480 40>,
+					  <40 140 14>,
+					  <54 263 1>,
+					  <55 306 4>,
+					  <59 312 3>,
+					  <62 374 2>,
+					  <64 434 2>,
+					  <66 438 2>,
+					  <70 520 1>,
+					  <73 523 1>,
+					  <118 568 6>,
+					  <124 609 3>,
+					  <159 638 1>,
+					  <160 720 3>,
+					  <169 728 30>,
+					  <199 416 2>,
+					  <201 449 1>,
+					  <202 89 1>,
+					  <203 451 1>,
+					  <204 462 1>,
+					  <205 264 1>,
+					  <206 579 1>,
+					  <207 653 1>,
+					  <208 656 1>,
+					  <209 659 1>,
+					  <210 122 1>,
+					  <211 699 1>,
+					  <212 705 1>,
+					  <213 450 1>,
+					  <214 643 2>,
+					  <216 646 5>,
+					  <221 390 5>;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&intc>;
+			interrupt-controller;
+		};
+
 		intc: interrupt-controller@17a00000 {
 			compatible = "arm,gic-v3";
 			reg = <0x0 0x17a00000 0x0 0x10000>,     /* GICD */
Signature · 1 line
2.37.2
#4 lore raw

PATCH 3/14 arm64: dts: qcom: sa8775p: add the spmi node

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the SPMI PMIC Arbiter node for SA8775p platforms.

---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p.dtsi +18 -0
index 428d9e0849b8..22c98ebc4c46 100644
@@ -943,6 +943,24 @@ apps_smmu: iommu@15000000 {
 		};
 	};
 
+	spmi_bus: spmi@c440000 {
+		compatible = "qcom,spmi-pmic-arb";
+		reg = <0x0 0x0c440000 0x0 0x1100>,
+		      <0x0 0x0c600000 0x0 0x2000000>,
+		      <0x0 0x0e600000 0x0 0x100000>,
+		      <0x0 0x0e700000 0x0 0xa0000>,
+		      <0x0 0x0c40a000 0x0 0x26000>;
+		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+		qcom,channel = <0>;
+		qcom,ee = <0>;
+		interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "periph_irq";
+		interrupt-controller;
+		#interrupt-cells = <4>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+	};
+
 	arch_timer: timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
Signature · 1 line
2.37.2
#5 lore raw

Re: [PATCH 03/14] arm64: dts: qcom: sa8775p: add the spmi node

Quoted 15 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the SPMI PMIC Arbiter node for SA8775p platforms.

---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p.dtsi +0 -0
index 428d9e0849b8..22c98ebc4c46 100644
@@ -943,6 +943,24 @@ apps_smmu: iommu@15000000 {
 		};

arch/arm64/boot/dts/qcom/sa8775p.dtsi apps_smmu: iommu@15000000 { · line 953

Quoted 10 lines
arch/arm64/boot/dts/qcom/sa8775p.dtsi +8 -0
 	};
 
+	spmi_bus: spmi@c440000 {
+		compatible = "qcom,spmi-pmic-arb";
+		reg = <0x0 0x0c440000 0x0 0x1100>,
+		      <0x0 0x0c600000 0x0 0x2000000>,
+		      <0x0 0x0e600000 0x0 0x100000>,
+		      <0x0 0x0e700000 0x0 0xa0000>,
+		      <0x0 0x0c40a000 0x0 0x26000>;
+		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";

Please make this a vertical list and sort the node properly.

lgtm otherwise

Konrad

Quoted 13 lines
arch/arm64/boot/dts/qcom/sa8775p.dtsi +10 -0
+		qcom,channel = <0>;
+		qcom,ee = <0>;
+		interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "periph_irq";
+		interrupt-controller;
+		#interrupt-cells = <4>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+	};
+
 	arch_timer: timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
#6 lore raw

PATCH 4/14 dt-bindings: mfd: qcom,spmi-pmic: add compatible for pmm8654au

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

PMM8654au is the SPMI PMIC variant used on sa8775p-ride. Add a compatible for it.

---
 Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +1 -0
index 8f076bb622b1..078d47a6ac83 100644
@@ -78,6 +78,7 @@ properties:
           - qcom,pmk8350
           - qcom,pmk8550
           - qcom,pmm8155au
+          - qcom,pmm8654au
           - qcom,pmp8074
           - qcom,pmr735a
           - qcom,pmr735b
Signature · 1 line
2.37.2
maintainer Acked-by on v1 4/14
#7 lore raw

Re: [PATCH 04/14] dt-bindings: mfd: qcom,spmi-pmic: add compatible for pmm8654au

Quoted 11 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

PMM8654au is the SPMI PMIC variant used on sa8775p-ride. Add a compatible for it.

---
 Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 +
 1 file changed, 1 insertion(+)
maintainer Applied
#8 lore raw

Re: [PATCH 04/14] dt-bindings: mfd: qcom,spmi-pmic: add compatible for pmm8654au

In reply to Bartosz Golaszewski
Quoted 10 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

PMM8654au is the SPMI PMIC variant used on sa8775p-ride. Add a compatible for it.

---
 Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 +
 1 file changed, 1 insertion(+)

Applied, thanks

--
Lee Jones [李琼斯]

#9 lore raw

PATCH 5/14 arm64: dts: qcom: sa8775p: add support for the on-board PMICs

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new .dtsi file for sa8775p PMICs and add the four PMICs interfaced to the SoC via SPMI.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 37 +++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +37 -0
new file mode 100644
index 000000000000..77e2515a7ab9
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pmk8775_0: pmic@0 {
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+		reg = <0x0 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	pmk8775_1: pmic@2 {
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+		reg = <0x2 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	pmk8775_2: pmic@4 {
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+		reg = <0x4 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	pmk8775_3: pmic@6 {
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+		reg = <0x6 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
Signature · 1 line
2.37.2
#10 lore raw

Re: [PATCH 05/14] arm64: dts: qcom: sa8775p: add support for the on-board PMICs

Quoted 17 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new .dtsi file for sa8775p PMICs and add the four PMICs interfaced to the SoC via SPMI.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 37 +++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +0 -0
new file mode 100644
index 000000000000..77e2515a7ab9

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi line 10

Quoted 10 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +10 -0
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	pmk8775_0: pmic@0 {

pmk8775..

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi line 11

Quoted 1 line
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +1 -0
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";

..or pmm8654au?

Konrad

Quoted 26 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +26 -0
+		reg = <0x0 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	pmk8775_1: pmic@2 {
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+		reg = <0x2 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	pmk8775_2: pmic@4 {
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+		reg = <0x4 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	pmk8775_3: pmic@6 {
+		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+		reg = <0x6 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
#11 lore raw

Re: [PATCH 05/14] arm64: dts: qcom: sa8775p: add support for the on-board PMICs

Quoted 33 lines · Konrad Dybcio
Quoted 17 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new .dtsi file for sa8775p PMICs and add the four PMICs interfaced to the SoC via SPMI.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 37 +++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +0 -0
new file mode 100644
index 000000000000..77e2515a7ab9

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi line 10

Quoted 10 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +10 -0
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+     pmk8775_0: pmic@0 {

pmk8775..

Quoted 3 lines

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi line 11

Quoted 1 line
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +1 -0
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";

..or pmm8654au?

Honestly, I got inspired by this bit from sc8280xp-pmics.dtsi:

54 &spmi_bus {
55 pmk8280: pmic@0 {

 56                 compatible = "qcom,pmk8350", "qcom,spmi-pmic";
 57                 reg = <0x0 SPMI_USID>;
 58                 #address-cells = <1>;
 59                 #size-cells = <0>;

Where the label seems to follow the SoC's numbering. Do you think it would be better to consistently use the pmic's name?

Bartosz

Quoted 27 lines

Konrad

Quoted 26 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +26 -0
+             reg = <0x0 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+
+     pmk8775_1: pmic@2 {
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+             reg = <0x2 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+
+     pmk8775_2: pmic@4 {
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+             reg = <0x4 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+
+     pmk8775_3: pmic@6 {
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+             reg = <0x6 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+};
#12 lore raw

Re: [PATCH 05/14] arm64: dts: qcom: sa8775p: add support for the on-board PMICs

Quoted 42 lines · Bartosz Golaszewski
Quoted 33 lines · Konrad Dybcio
Quoted 17 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new .dtsi file for sa8775p PMICs and add the four PMICs interfaced to the SoC via SPMI.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 37 +++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +0 -0
new file mode 100644
index 000000000000..77e2515a7ab9

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi line 10

Quoted 10 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +10 -0
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+     pmk8775_0: pmic@0 {

pmk8775..

Quoted 3 lines

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi line 11

Quoted 1 line
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +1 -0
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";

..or pmm8654au?

Honestly, I got inspired by this bit from sc8280xp-pmics.dtsi:

54 &spmi_bus {
55 pmk8280: pmic@0 {

Quoted 7 lines
 56                 compatible = "qcom,pmk8350", "qcom,spmi-pmic";
 57                 reg = <0x0 SPMI_USID>;
 58                 #address-cells = <1>;
 59                 #size-cells = <0>;

Where the label seems to follow the SoC's numbering. Do you think it would be better to consistently use the pmic's name?

Generally, the automotive PMICs seem to be carbon copies of their non-AU relatives, except they're built to a better electrical spec (because well.. they're gonna be used in cars) or very very slightly modified, so I propose:

actual_pmic: pmic@sid {
	compatbile = "qcom,actualpmic", "qcom,pmic-its-based-on";
}

Konrad

Quoted 30 lines

Bartosz

Quoted 27 lines

Konrad

Quoted 26 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file +26 -0
+             reg = <0x0 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+
+     pmk8775_1: pmic@2 {
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+             reg = <0x2 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+
+     pmk8775_2: pmic@4 {
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+             reg = <0x4 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+
+     pmk8775_3: pmic@6 {
+             compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+             reg = <0x6 SPMI_USID>;
+             #address-cells = <1>;
+             #size-cells = <0>;
+     };
+};
#13 lore raw

PATCH 6/14 arm64: dts: qcom: sa8775p-ride: enable PMIC support

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Include the PMIC .dtsi file in the board's .dts to enable PMIC support on sa8775p-ride.

---
 arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 1 +
 1 file changed, 1 insertion(+)
arch/arm64/boot/dts/qcom/sa8775p-ride.dts +1 -0
index 1020dfd21da2..b7ee4cc676b5 100644
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "sa8775p.dtsi"
+#include "sa8775p-pmics.dtsi"
 
 / {
 	model = "Qualcomm SA8775P Ride";
Signature · 1 line
2.37.2
#14 lore raw

PATCH 7/14 arm64: dts: qcom: sa8775p: add the Power On device node

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the PON node to PMIC #0 for sa8775p platforms.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +7 -0
index 77e2515a7ab9..5d73212fbd16 100644
@@ -12,6 +12,13 @@ pmk8775_0: pmic@0 {
 		reg = <0x0 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		pmk8775_0_pon: pon@1200 {
+			compatible = "qcom,pmk8350-pon";
+			reg = <0x1200>, <0x800>;
+			mode-recovery = <0x1>;
+			mode-bootloader = <0x2>;
+		};
 	};
 
 	pmk8775_1: pmic@2 {
Signature · 1 line
2.37.2
#15 lore raw

Re: [PATCH 07/14] arm64: dts: qcom: sa8775p: add the Power On device node

Quoted 14 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the PON node to PMIC #0 for sa8775p platforms.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +0 -0
index 77e2515a7ab9..5d73212fbd16 100644

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi pmk8775_0: pmic@0 { · line 18

Quoted 7 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +4 -0
@@ -12,6 +12,13 @@ pmk8775_0: pmic@0 {
 		reg = <0x0 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		pmk8775_0_pon: pon@1200 {
+			compatible = "qcom,pmk8350-pon";
+			reg = <0x1200>, <0x800>;

reg-names = "hlos", "pbs"

Also, are you sure hlos shouldn't be @1300?

Konrad

Quoted 6 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +3 -0
+			mode-recovery = <0x1>;
+			mode-bootloader = <0x2>;
+		};
 	};
 
 	pmk8775_1: pmic@2 {
#16 lore raw

Re: [PATCH 07/14] arm64: dts: qcom: sa8775p: add the Power On device node

Quoted 27 lines · Konrad Dybcio
Quoted 14 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the PON node to PMIC #0 for sa8775p platforms.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +0 -0
index 77e2515a7ab9..5d73212fbd16 100644

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi pmk8775_0: pmic@0 { · line 18

Quoted 7 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +4 -0
@@ -12,6 +12,13 @@ pmk8775_0: pmic@0 {
              reg = <0x0 SPMI_USID>;
              #address-cells = <1>;
              #size-cells = <0>;
+
+             pmk8775_0_pon: pon@1200 {
+                     compatible = "qcom,pmk8350-pon";
+                     reg = <0x1200>, <0x800>;

reg-names = "hlos", "pbs"

Quoted 2 lines

Also, are you sure hlos shouldn't be @1300?

Nope, that's the right one here.

Bart

Quoted 7 lines

Konrad

Quoted 6 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +3 -0
+                     mode-recovery = <0x1>;
+                     mode-bootloader = <0x2>;
+             };
      };
 
      pmk8775_1: pmic@2 {
#17 lore raw

PATCH 8/14 arm64: dts: qcom: sa8775p: pmic: add the power key

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the power key node under the PON node for PMIC #0 on sa8775p.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +7 -0
index 5d73212fbd16..874460d087db 100644
@@ -18,6 +18,13 @@ pmk8775_0_pon: pon@1200 {
 			reg = <0x1200>, <0x800>;
 			mode-recovery = <0x1>;
 			mode-bootloader = <0x2>;
+
+			pmk8775_0_pon_pwrkey: pwrkey {
+				compatible = "qcom,pmk8350-pwrkey";
+				interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
+				linux,code = <KEY_POWER>;
+				status = "disabled";
+			};
 		};
 	};
 
Signature · 1 line
2.37.2
#18 lore raw

Re: [PATCH 08/14] arm64: dts: qcom: sa8775p: pmic: add the power key

Quoted 14 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the power key node under the PON node for PMIC #0 on sa8775p.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +0 -0
index 5d73212fbd16..874460d087db 100644

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi pmk8775_0_pon: pon@1200 { · line 26

Quoted 9 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +6 -0
@@ -18,6 +18,13 @@ pmk8775_0_pon: pon@1200 {
 			reg = <0x1200>, <0x800>;
 			mode-recovery = <0x1>;
 			mode-bootloader = <0x2>;
+
+			pmk8775_0_pon_pwrkey: pwrkey {
+				compatible = "qcom,pmk8350-pwrkey";
+				interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
+				linux,code = <KEY_POWER>;
+				status = "disabled";

Does it make any sense to disable the power button?

Konrad

Quoted 4 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +1 -0
+			};
 		};
 	};
 
#19 lore raw

Re: [PATCH 08/14] arm64: dts: qcom: sa8775p: pmic: add the power key

Quoted 13 lines · Konrad Dybcio
Quoted 9 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the power key node under the PON node for PMIC #0 on sa8775p.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
Quoted 16 lines
Quoted 5 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +0 -0
index 5d73212fbd16..874460d087db 100644

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi pmk8775_0_pon: pon@1200 { · line 26

Quoted 9 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +6 -0
@@ -18,6 +18,13 @@ pmk8775_0_pon: pon@1200 {
                      reg = <0x1200>, <0x800>;
                      mode-recovery = <0x1>;
                      mode-bootloader = <0x2>;
+
+                     pmk8775_0_pon_pwrkey: pwrkey {
+                             compatible = "qcom,pmk8350-pwrkey";
+                             interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
+                             linux,code = <KEY_POWER>;
+                             status = "disabled";

Does it make any sense to disable the power button?

Since this is an automotive platform, I'd say yes - you wouldn't normally have physical access to the board or even be sure for it to have a power button? But if you prefer it the other way, I won't be dying on this hill.

Bart

Quoted 5 lines

Konrad

Quoted 4 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +1 -0
+                     };
              };
      };
 
#20 lore raw

Re: [PATCH 08/14] arm64: dts: qcom: sa8775p: pmic: add the power key

Quoted 31 lines · Bartosz Golaszewski
Quoted 13 lines · Konrad Dybcio
Quoted 9 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the power key node under the PON node for PMIC #0 on sa8775p.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
Quoted 16 lines
Quoted 5 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +0 -0
index 5d73212fbd16..874460d087db 100644

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi pmk8775_0_pon: pon@1200 { · line 26

Quoted 9 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +6 -0
@@ -18,6 +18,13 @@ pmk8775_0_pon: pon@1200 {
                      reg = <0x1200>, <0x800>;
                      mode-recovery = <0x1>;
                      mode-bootloader = <0x2>;
+
+                     pmk8775_0_pon_pwrkey: pwrkey {
+                             compatible = "qcom,pmk8350-pwrkey";
+                             interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
+                             linux,code = <KEY_POWER>;
+                             status = "disabled";

Does it make any sense to disable the power button?

Quoted 3 lines

Since this is an automotive platform, I'd say yes - you wouldn't normally have physical access to the board or even be sure for it to have a power button?

On Qualcomm platforms there's little different ways to turn on the device short of giving it DC power (though that may also be config dependent), so I'd expect *something* would be connected to PON_PWR..

Quoted 2 lines

But if you prefer it the other way, I won't be
dying on this hill.

Yeah if you could, please leave it on (unless somebody has strong arguments against that)

Konrad

Quoted 8 lines

Bart

Quoted 5 lines

Konrad

Quoted 4 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +1 -0
+                     };
              };
      };
 
#21 lore raw

PATCH 9/14 arm64: dts: qcom: sa8775p-ride: enable the power key

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Enable the power key for sa8775p-ride.

---
 arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-ride.dts +4 -0
index b7ee4cc676b5..396a2543c78a 100644
@@ -40,6 +40,10 @@ &qupv3_id_2 {
 	status = "okay";
 };
 
+&pmk8775_0_pon_pwrkey {
+	status = "okay";
+};
+
 &sleep_clk {
 	clock-frequency = <32764>;
 };
Signature · 1 line
2.37.2
#22 lore raw

PATCH 10/14 arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the RESIN input for sa8775p platforms' PMIC.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +6 -0
index 874460d087db..d55fa5165864 100644
@@ -25,6 +25,12 @@ pmk8775_0_pon_pwrkey: pwrkey {
 				linux,code = <KEY_POWER>;
 				status = "disabled";
 			};
+
+			pmk8775_0_pon_resin: resin {
+				compatible = "qcom,pmk8350-resin";
+				interrupts-extended = <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
+				status = "disabled";
+			};
 		};
 	};
 
Signature · 1 line
2.37.2
#23 lore raw

Re: [PATCH 10/14] arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input

Quoted 14 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the RESIN input for sa8775p platforms' PMIC.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +0 -0
index 874460d087db..d55fa5165864 100644

arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi pmk8775_0_pon_pwrkey: pwrkey { · line 32

Quoted 8 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +5 -0
@@ -25,6 +25,12 @@ pmk8775_0_pon_pwrkey: pwrkey {
 				linux,code = <KEY_POWER>;
 				status = "disabled";
 			};
+
+			pmk8775_0_pon_resin: resin {
+				compatible = "qcom,pmk8350-resin";
+				interrupts-extended = <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
+				status = "disabled";

No usual 15625 debounce time?

Konrad

Quoted 4 lines
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +1 -0
+			};
 		};
 	};
 
#24 lore raw

PATCH 11/14 arm64: dts: qcom: sa8775p: pmic: add thermal zones

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add the thermal zones and associated alarm nodes for the PMICs that have them hooked up on sa8775p-ride.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 59 +++++++++++++++++++++
 1 file changed, 59 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +59 -0
index d55fa5165864..437cfa8aee2f 100644
@@ -6,6 +6,50 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/spmi/spmi.h>
 
+/ {
+	thermal-zones {
+		pm8775_1_thermal: pm8775-1-thermal {
+			polling-delay-passive = <100>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8775_1_temp_alarm>;
+
+			trips {
+				trip0 {
+					temperature = <105000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+
+				trip1 {
+					temperature = <125000>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+
+		pm8775_3_thermal: pm8775-3-thermal {
+			polling-delay-passive = <100>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8775_3_temp_alarm>;
+
+			trips {
+				trip0 {
+					temperature = <105000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+
+				trip1 {
+					temperature = <125000>;
+					hysteresis = <0>;
+					type = "critical";
+				};
+			};
+		};
+	};
+};
+
 &spmi_bus {
 	pmk8775_0: pmic@0 {
 		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
@@ -16,6 +60,7 @@ pmk8775_0: pmic@0 {
 		pmk8775_0_pon: pon@1200 {
 			compatible = "qcom,pmk8350-pon";
 			reg = <0x1200>, <0x800>;
+
 			mode-recovery = <0x1>;
 			mode-bootloader = <0x2>;
 
@@ -39,6 +84,13 @@ pmk8775_1: pmic@2 {
 		reg = <0x2 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		pm8775_1_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts-extended = <&spmi_bus 0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
 	};
 
 	pmk8775_2: pmic@4 {
@@ -53,5 +105,12 @@ pmk8775_3: pmic@6 {
 		reg = <0x6 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		pm8775_3_temp_alarm: temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts-extended = <&spmi_bus 0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
 	};
 };
Signature · 1 line
2.37.2
#25 lore raw

PATCH 12/14 dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for pmm8654au-gpio

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new compatible for the GPIO controller on the pm8654au PMIC. It has 12 pins with no holes.

---
 Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +2 -0
index db505fdeac86..512378a2d4fd 100644
@@ -58,6 +58,7 @@ properties:
           - qcom,pmk8350-gpio
           - qcom,pmk8550-gpio
           - qcom,pmm8155au-gpio
+          - qcom,pmm8654au-gpio
           - qcom,pmp8074-gpio
           - qcom,pmr735a-gpio
           - qcom,pmr735b-gpio
@@ -439,6 +440,7 @@ $defs:
                  - gpio1-gpio4 for pmk8350
                  - gpio1-gpio6 for pmk8550
                  - gpio1-gpio10 for pmm8155au
+                 - gpio1-gpio12 for pmm8654au
                  - gpio1-gpio12 for pmp8074 (holes on gpio1 and gpio12)
                  - gpio1-gpio4 for pmr735a
                  - gpio1-gpio4 for pmr735b
Signature · 1 line
2.37.2
maintainer Acked-by on v1 12/14
#26 lore raw

Re: [PATCH 12/14] dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for pmm8654au-gpio

Quoted 11 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new compatible for the GPIO controller on the pm8654au PMIC. It has 12 pins with no holes.

---
 Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++
 1 file changed, 2 insertions(+)
Acked-by on v1 12/14
#27 lore raw

Re: [PATCH 12/14] dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for pmm8654au-gpio

In reply to Bartosz Golaszewski
Quoted 7 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new compatible for the GPIO controller on the pm8654au PMIC. It has 12 pins with no holes.

Bartosz are these two something I should apply to the pinctrl tree or will you queue them?
Either way:

Yours,
Linus Walleij

#28 lore raw

Re: [PATCH 12/14] dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for pmm8654au-gpio

Quoted 8 lines · Linus Walleij
Quoted 5 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new compatible for the GPIO controller on the pm8654au PMIC. It has 12 pins with no holes.

Quoted 8 lines
Quoted 2 lines

Bartosz are these two something I should apply to the pinctrl tree or will you queue them?
Either way:

I think it's better if Bjorn takes it through the arm-msm tree if you don't mind.

Bart

#29 lore raw

Re: [PATCH 12/14] dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for pmm8654au-gpio

Quoted 11 lines · Bartosz Golaszewski
Quoted 10 lines · Linus Walleij
Quoted 7 lines · Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add a new compatible for the GPIO controller on the pm8654au PMIC. It has 12 pins with no holes.

Quoted 8 lines
Quoted 5 lines

Bartosz are these two something I should apply to the pinctrl tree or will you queue them?
Either way:

I think it's better if Bjorn takes it through the arm-msm tree if you don't mind.

That's fine, I'll ACK the latest version so Bjorn can apply it.

Yours,
Linus Walleij

#30 lore raw

PATCH 13/14 pinctrl: qcom: spmi-gpio: add support for pmm8654au-gpio

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add support for the GPIO controller present on the pmm8654au PMIC.

---
 drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 +
 1 file changed, 1 insertion(+)
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +1 -0
index ea3485344f06..0d94175b34f8 100644
@@ -1238,6 +1238,7 @@ static const struct of_device_id pmic_gpio_of_match[] = {
 	{ .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 },
 	{ .compatible = "qcom,pmk8550-gpio", .data = (void *) 6 },
 	{ .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 },
+	{ .compatible = "qcom,pmm8654au-gpio", .data = (void *) 12 },
 	/* pmp8074 has 12 GPIOs with holes on 1 and 12 */
 	{ .compatible = "qcom,pmp8074-gpio", .data = (void *) 12 },
 	{ .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 },
Signature · 1 line
2.37.2
#31 lore raw

PATCH 14/14 arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes

In reply to Bartosz Golaszewski

From: Bartosz Golaszewski <[email protected]>

Add GPIO controller nodes to PMICs that have the GPIO hooked up on sa8775p-ride.

---
 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi +20 -0
index 437cfa8aee2f..9386a113f1f8 100644
@@ -77,6 +77,16 @@ pmk8775_0_pon_resin: resin {
 				status = "disabled";
 			};
 		};
+
+		pm8775_0_gpios: gpio@8800 {
+			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
+			reg = <0x8800>;
+			gpio-controller;
+			gpio-ranges = <&pm8775_0_gpios 0 0 12>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
 	};
 
 	pmk8775_1: pmic@2 {
@@ -98,6 +108,16 @@ pmk8775_2: pmic@4 {
 		reg = <0x4 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+
+		pm8775_2_gpios: gpio@8800 {
+			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
+			reg = <0x8800>;
+			gpio-controller;
+			gpio-ranges = <&pm8775_2_gpios 0 0 12>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
 	};
 
 	pmk8775_3: pmic@6 {
Signature · 1 line
2.37.2