x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform
Subsystems (3)
v2 cover x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform
From: Tianyu Lan <[email protected]>
Secure AVIC is a new hardware feature in the AMD64 architecture to allow SEV-SNP guests to prevent the hypervisor from generating unexpected interrupts to a vCPU or otherwise violate architectural assumptions around APIC behavior.
Each vCPU has a guest-allocated APIC backing page of size 4K, which maintains APIC state for that vCPU. APIC backing page's ALLOWED_IRR field indicates the interrupt vectors which the guest allows the hypervisor to send.
This patchset is to enable the feature for Hyper-V platform. Patch "Expose x2apic_savic_update_vector()" is to expose new fucntion and device driver and arch code may update AVIC backing page ALLOWED_IRR field to allow Hyper-V inject associated vector.
This patchset is based on the AMD patchset "AMD: Add Secure AVIC Guest Support"
https://lkml.org/lkml/2025/6/10/1579
Change since v1:
- Remove the check of Secure AVIC when set APIC backing page
- Use apic_update_vector() instead of exposing new interface from Secure AVIC driver to update APIC backing page and allow associated interrupt to be injected by hypervisor.
Tianyu Lan (4):
x86/Hyper-V: Not use hv apic driver when Secure AVIC is available drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V x86/Hyper-V: Not use auto-eoi when Secure AVIC is available x86/Hyper-V: Allow Hyper-V to inject Hyper-V vectors
arch/x86/hyperv/hv_apic.c | 3 +++ arch/x86/hyperv/hv_init.c | 4 ++++ arch/x86/kernel/cpu/mshyperv.c | 2 ++ drivers/hv/hv.c | 2 ++ 4 files changed, 11 insertions(+)
Signature · 1 line
2.25.1
RFC PATCH v2 1/4 x86/Hyper-V: Not use hv apic driver when Secure AVIC is available
From: Tianyu Lan <[email protected]>
When Secure AVIC is available, AMD x2apic Secure AVIC driver should be selected and return directly in the hv_apic_init().
--- arch/x86/hyperv/hv_apic.c | 3 +++ 1 file changed, 3 insertions(+)
arch/x86/hyperv/hv_apic.c +3 -0
@@ -293,6 +293,9 @@ static void hv_send_ipi_self(int vector)void __init hv_apic_init (void ) { +if (cc_platform_has (CC_ATTR_SNP_SECURE_AVIC )) +return ; +if (ms_hyperv.hints &HV_X64_CLUSTER_IPI_RECOMMENDED ) {pr_info ("Hyper-V: Using IPI hypercalls\n" );/*
Signature · 1 line
2.25.1
RE: [RFC Patch v2 1/4] x86/Hyper-V: Not use hv apic driver when Secure AVIC is available
From: Tianyu Lan <[email protected]> Sent: Friday, June 13, 2025 4:08 AM
Quoted 2 lines
From: Tianyu Lan <[email protected]>
The for the patch Subject line, use "x86/hyperv:" as the prefix. Also, I would suggest better wording. So:
x86/hyperv: Don't use the Hyper-V APIC driver when Secure AVIC is available
Quoted 4 lines
When Secure AVIC is available, AMD x2apic Secure AVIC driver should be selected and return directly in the
hv_apic_init().
Better wording:
When Secure AVIC is available, the AMD x2apic Secure AVIC driver will be selected. In that case, have hv_apic_init() return immediately without doing anything.
Quoted 23 lines
Signed-off-by Tianyu Lan <[email protected]>--- arch/x86/hyperv/hv_apic.c | 3 +++ 1 file changed, 3 insertions(+)arch/x86/hyperv/hv_apic.c +3
-1@@ -293,6 +293,9 @@ static void hv_send_ipi_self(int vector)void __init hv_apic_init (void ) { +if (cc_platform_has (CC_ATTR_SNP_SECURE_AVIC )) +return ; +if (ms_hyperv.hints &HV_X64_CLUSTER_IPI_RECOMMENDED ) {pr_info ("Hyper-V: Using IPI hypercalls\n" );/* -- 2.25.1
RFC PATCH v2 2/4 drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V
In reply to Tianyu LanFrom: Tianyu Lan <[email protected]>
When Secure AVIC is enabled, Vmbus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject Vmbus message interrupt.
--- drivers/hv/hv.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/hv/hv.c +2 -0
@@ -20,6 +20,7 @@#include <linux/interrupt.h> #include <clocksource/hyperv_timer.h> #include <asm/mshyperv.h> +#include <asm/apic.h> #include <linux/set_memory.h> #include "hyperv_vmbus.h"
@@ -310,6 +311,7 @@ void hv_synic_enable_regs(unsigned int cpu)if (vmbus_irq !=-1 )enable_percpu_irq (vmbus_irq,0 ); shared_sint.as_uint64 =hv_get_msr (HV_MSR_SINT0 +VMBUS_MESSAGE_SINT ); +apic_update_vector (smp_processor_id (), vmbus_interrupt, true); shared_sint.vector = vmbus_interrupt; shared_sint.masked = false;
Signature · 1 line
2.25.1
kernel test robot
build botRe: [RFC Patch v2 2/4] drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V
kernel test robot noticed the following build errors:
Hi Tianyu,
[This is a private test report for your RFC patch.] kernel test robot noticed the following build errors:
[auto build test ERROR on tip/x86/core]
[also build test ERROR on linus/master v6.16-rc1 next-20250613] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Tianyu-Lan/x86-Hyper-V-Not-use-hv-apic-driver-when-Secure-AVIC-is-available/20250613-191041 base: tip/x86/core patch link: https://lore.kernel.org/r/20250613110829.122371-3-ltykernel%40gmail.com patch subject: [RFC Patch v2 2/4] drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V config: arm64-randconfig-002-20250614 (https://download.01.org/0day-ci/archive/20250614/[email protected]/config) compiler: aarch64-linux-gcc (GCC) 15.1.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250614/[email protected]/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
All errors (new ones prefixed by >>):
>> drivers/hv/hv.c:23:10: fatal error: asm/apic.h: No such file or directory
23 | #include <asm/apic.h>
| ^~~~~~~~~~~~compilation terminated.
vim +23 drivers/hv/hv.c
10
11 #include <linux/io.h>
12 #include <linux/kernel.h>
13 #include <linux/mm.h>
14 #include <linux/slab.h>
15 #include <linux/vmalloc.h>
16 #include <linux/hyperv.h>
17 #include <linux/random.h>
18 #include <linux/clockchips.h>
19 #include <linux/delay.h>
20 #include <linux/interrupt.h>
21 #include <clocksource/hyperv_timer.h>
22 #include <asm/mshyperv.h>
> 23 #include <asm/apic.h>
24 #include <linux/set_memory.h>
25 #include "hyperv_vmbus.h"
26 Signature · 2 lines
0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
RE: [RFC Patch v2 2/4] drivers/hv: Allow vmbus message synic interrupt injected from Hyper-V
In reply to Tianyu LanFrom: Tianyu Lan <[email protected]> Sent: Friday, June 13, 2025 4:08 AM
Quoted 2 lines
From: Tianyu Lan <[email protected]>
For consistency with existing commits, use "Drivers: hv:" as the Subject prefix.
Quoted 2 lines
When Secure AVIC is enabled, Vmbus driver should
s/Vmbus/VMBus/
Quoted 2 lines
call x2apic Secure AVIC interface to allow Hyper-V to inject Vmbus message interrupt.
s/Vmbus/VMBus/
Quoted 19 lines
Signed-off-by Tianyu Lan <[email protected]>--- drivers/hv/hv.c | 2 ++ 1 file changed, 2 insertions(+)drivers/hv/hv.c +1
-0@@ -20,6 +20,7 @@#include <linux/interrupt.h> #include <clocksource/hyperv_timer.h> #include <asm/mshyperv.h> +#include <asm/apic.h> #include <linux/set_memory.h> #include "hyperv_vmbus.h"
drivers/hv/hv.c void hv_synic_enable_regs(unsigned int cpu) · line 314
Quoted 4 lines
drivers/hv/hv.c +1
-0@@ -310,6 +311,7 @@ void hv_synic_enable_regs(unsigned int cpu)if (vmbus_irq !=-1 )enable_percpu_irq (vmbus_irq,0 ); shared_sint.as_uint64 =hv_get_msr (HV_MSR_SINT0 +VMBUS_MESSAGE_SINT ); +apic_update_vector (smp_processor_id (), vmbus_interrupt, true);
hv_synic_enable_regs() has an input parameter "cpu". Use that instead of smp_processor_id().
Also, apic_update_vector() is an x86/x64 only function. But hv_synic_enable_regs() is built for ARM64 as well, so there will be a compile error on ARM64. We've worked hard to avoid adding #ifdef CONFIG_X86 or #ifdef CONFIG_ARM64 in this source code, so I don't like the idea of adding #ifdef around the call to apic_update_vector().
A possible approach would be to create a wrapper function such as "hv_enable_coco_interrupt()" with the same function signature as apic_update_vector(). hv_enable_coco_interrupt() would go i arch/x86/hyperv/hv_apic.c and would call apic_update_vector(). Then also implement a __weak stub in hv_common.c that does nothing. hv_common.c already has several such stubs as a pattern to follow. The stub would allow hv_synic_enable_regs() to compile on ARM64 without having to add #ifdef's. And perhaps in the future CoCo VMs on Hyper-V ARM64 would need their own implementation of hv_enable_coco_interrupt(), though I'm not familiar enough with the ARM64 CCA architecture to know for sure.
Since hv_synic_enable_regs() is enabling the vmbus_interrupt vector, should hv_synic_disable_regs() disable the vector? It seems like there should be symmetry unless there is a good reason otherwise.
Quoted 6 lines
drivers/hv/hv.c +0
-1shared_sint.vector = vmbus_interrupt; shared_sint.masked = false; --2.25.1
RFC PATCH v2 3/4 x86/Hyper-V: Not use auto-eoi when Secure AVIC is available
In reply to Tianyu LanFrom: Tianyu Lan <[email protected]>
Hyper-V doesn't support auto-eoi with Secure AVIC. So Enable HV_DEPRECATING_AEOI_RECOMMENDED flag to force to write eoi register after handling interrupt.
--- arch/x86/kernel/cpu/mshyperv.c | 2 ++ 1 file changed, 2 insertions(+)
arch/x86/kernel/cpu/mshyperv.c +2 -0
@@ -463,6 +463,8 @@ static void __init ms_hyperv_init_platform(void) ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);hv_identify_partition_type (); +if (cc_platform_has (CC_ATTR_SNP_SECURE_AVIC )) + ms_hyperv.hints |=HV_DEPRECATING_AEOI_RECOMMENDED ;if (ms_hyperv.hints &HV_X64_HYPERV_NESTED ) { hv_nested = true;
Signature · 1 line
2.25.1
kernel test robot
build botRe: [RFC Patch v2 3/4] x86/Hyper-V: Not use auto-eoi when Secure AVIC is available
kernel test robot noticed the following build errors:
Hi Tianyu,
[This is a private test report for your RFC patch.] kernel test robot noticed the following build errors:
[auto build test ERROR on tip/x86/core]
[also build test ERROR on linus/master v6.16-rc1 next-20250613] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Tianyu-Lan/x86-Hyper-V-Not-use-hv-apic-driver-when-Secure-AVIC-is-available/20250613-191041 base: tip/x86/core patch link: https://lore.kernel.org/r/20250613110829.122371-4-ltykernel%40gmail.com patch subject: [RFC Patch v2 3/4] x86/Hyper-V: Not use auto-eoi when Secure AVIC is available config: i386-buildonly-randconfig-003-20250614 (https://download.01.org/0day-ci/archive/20250614/[email protected]/config) compiler: clang version 20.1.2 (https://github.com/llvm/llvm-project 58df0ef89dd64126512e4ee27b4ac3fd8ddf6247) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250614/[email protected]/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
All errors (new ones prefixed by >>):
>> arch/x86/kernel/cpu/mshyperv.c:466:22: error: use of undeclared identifier 'CC_ATTR_SNP_SECURE_AVIC'
466 | if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
| ^
1 error generated.
vim +/CC_ATTR_SNP_SECURE_AVIC +466 arch/x86/kernel/cpu/mshyperv.c
442
443 /*
444 * Extract the features and hints
445 */
446 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
447 ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES);
448 ms_hyperv.ext_features = cpuid_ecx(HYPERV_CPUID_FEATURES);
449 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
450 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
451
452 hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
453
454 pr_info("Hyper-V: privilege flags low %#x, high %#x, ext %#x, hints %#x, misc %#x\n",
455 ms_hyperv.features, ms_hyperv.priv_high,
456 ms_hyperv.ext_features, ms_hyperv.hints,
457 ms_hyperv.misc_features);
458
459 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
460 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
461
462 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
463 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
464
465 hv_identify_partition_type();
> 466 if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
467 ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED;
468
469 if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
470 hv_nested = true;
471 pr_info("Hyper-V: running on a nested hypervisor\n");
472 }
473
474 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
475 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
476 x86_platform.calibrate_tsc = hv_get_tsc_khz;
477 x86_platform.calibrate_cpu = hv_get_tsc_khz;
478 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
479 }
480
481 if (ms_hyperv.priv_high & HV_ISOLATION) {
482 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG);
483 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG);
484
485 if (ms_hyperv.shared_gpa_boundary_active)
486 ms_hyperv.shared_gpa_boundary =
487 BIT_ULL(ms_hyperv.shared_gpa_boundary_bits);
488
489 hyperv_paravisor_present = !!ms_hyperv.paravisor_present;
490
491 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n",
492 ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b);
493
494
495 if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) {
496 static_branch_enable(&isolation_type_snp);
497 } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) {
498 static_branch_enable(&isolation_type_tdx);
499
500 /* A TDX VM must use x2APIC and doesn't use lazy EOI. */
501 ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED;
502
503 if (!ms_hyperv.paravisor_present) {
504 /*
505 * Mark the Hyper-V TSC page feature as disabled
506 * in a TDX VM without paravisor so that the
507 * Invariant TSC, which is a better clocksource
508 * anyway, is used instead.
509 */
510 ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE;
511
512 /*
513 * The Invariant TSC is expected to be available
514 * in a TDX VM without paravisor, but if not,
515 * print a warning message. The slower Hyper-V MSR-based
516 * Ref Counter should end up being the clocksource.
517 */
518 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
519 pr_warn("Hyper-V: Invariant TSC is unavailable\n");
520
521 /* HV_MSR_CRASH_CTL is unsupported. */
522 ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
523
524 /* Don't trust Hyper-V's TLB-flushing hypercalls. */
525 ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
526
527 x86_init.acpi.reduced_hw_early_init = reduced_hw_init;
528 }
529 }
530 }
531
532 if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
533 ms_hyperv.nested_features =
534 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
535 pr_info("Hyper-V: Nested features: 0x%x\n",
536 ms_hyperv.nested_features);
537 }
538
Signature · 2 lines
0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
RE: [RFC Patch v2 3/4] x86/Hyper-V: Not use auto-eoi when Secure AVIC is available
In reply to Tianyu LanFrom: Tianyu Lan <[email protected]> Sent: Friday, June 13, 2025 4:08 AM
Quoted 2 lines
From: Tianyu Lan <[email protected]>
Suggested Subject line:
x86/hyperv: Don't use auto-eoi when Secure AVIC is available
Quoted 5 lines
Hyper-V doesn't support auto-eoi with Secure AVIC. So Enable
HV_DEPRECATING_AEOI_RECOMMENDEDflag to force to write eoi register after handling interrupt.
Wording:
Hyper-V doesn't support auto-eoi with Secure AVIC. So set the HV_DEPRECATING_AEOI_RECOMMENDED flag
to force writing the EIO register after handling an interrupt.
Quoted 22 lines
Signed-off-by Tianyu Lan <[email protected]>--- arch/x86/kernel/cpu/mshyperv.c | 2 ++ 1 file changed, 2 insertions(+)arch/x86/kernel/cpu/mshyperv.c +2
-1@@ -463,6 +463,8 @@ static void __init ms_hyperv_init_platform(void) ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);hv_identify_partition_type (); +if (cc_platform_has (CC_ATTR_SNP_SECURE_AVIC )) + ms_hyperv.hints |=HV_DEPRECATING_AEOI_RECOMMENDED ;if (ms_hyperv.hints &HV_X64_HYPERV_NESTED ) { hv_nested = true; --2.25.1
RFC PATCH v2 4/4 x86/Hyper-V: Allow Hyper-V to inject Hyper-V vectors
In reply to Tianyu LanFrom: Tianyu Lan <[email protected]>
When Secure AVIC is enabled, call Secure AVIC function to allow Hyper-V to inject STIMER0 interrupt.
--- arch/x86/hyperv/hv_init.c | 4 ++++ 1 file changed, 4 insertions(+)
arch/x86/hyperv/hv_init.c +4 -0
@@ -132,6 +132,10 @@ static int hv_cpu_init(unsigned int cpu)wrmsrq (HV_X64_MSR_VP_ASSIST_PAGE , msr.as_uint64); } +/* Allow Hyper-V stimer vector to be injected from Hypervisor. */ +if (ms_hyperv.misc_features &HV_STIMER_DIRECT_MODE_AVAILABLE ) +apic_update_vector (cpu,HYPERV_STIMER0_VECTOR , true); +return hyperv_init_ghcb (); }
Signature · 1 line
2.25.1
RE: [RFC Patch v2 4/4] x86/Hyper-V: Allow Hyper-V to inject Hyper-V vectors
From: Tianyu Lan <[email protected]> Sent: Friday, June 13, 2025 4:08 AM
Quoted 2 lines
From: Tianyu Lan <[email protected]>
Suggested patch Subject line:
x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts
Quoted 14 lines
When Secure AVIC is enabled, call Secure AVIC function to allow Hyper-V to inject STIMER0 interrupt.
Signed-off-by Tianyu Lan <[email protected]>--- arch/x86/hyperv/hv_init.c | 4 ++++ 1 file changed, 4 insertions(+)arch/x86/hyperv/hv_init.c +0
-0
arch/x86/hyperv/hv_init.c static int hv_cpu_init(unsigned int cpu) · line 138
Quoted 7 lines
arch/x86/hyperv/hv_init.c +4
-0@@ -132,6 +132,10 @@ static int hv_cpu_init(unsigned int cpu)wrmsrq (HV_X64_MSR_VP_ASSIST_PAGE , msr.as_uint64); } +/* Allow Hyper-V stimer vector to be injected from Hypervisor. */ +if (ms_hyperv.misc_features &HV_STIMER_DIRECT_MODE_AVAILABLE ) +apic_update_vector (cpu,HYPERV_STIMER0_VECTOR , true); +
Should hv_cpu_die() disable the vector so that there is symmetry?
Quoted 6 lines
arch/x86/hyperv/hv_init.c +0
-1return hyperv_init_ghcb (); } --2.25.1
From: Tianyu Lan <[email protected]> Sent: Friday, June 13, 2025 4:08 AM
Quoted 13 lines
Secure AVIC is a new hardware feature in the AMD64 architecture to allow SEV-SNP guests to prevent the hypervisor from generating unexpected interrupts to a vCPU or otherwise violate architectural assumptions around APIC behavior.
Each vCPU has a guest-allocated APIC backing page of size 4K, which maintains APIC state for that vCPU. APIC backing page's
ALLOWED_IRRfield indicates the interrupt vectors which the guest allows the hypervisor to send.
Quoted 5 lines
This patchset is to enable the feature for Hyper-V platform. Patch "Expose
x2apic_savic_update_vector()" is to expose new fucntion and device driver and arch code may update AVIC backing pageALLOWED_IRRfield to allow Hyper-V inject associated vector.
The last sentence above seems to be leftover from v1 of the patch set and is no longer accurate. Please update.
Additional observation: These patches depend on CC_ATTR_SNP_SECURE_AVIC, which is not set when operating in VTOM mode (i.e., a paravisor is present). So evidently Linux on Hyper-V must handle the Secure AVIC only when Linux is running as the paravisor in VTL2 (CONFIG_HYPERV_VTL_MODE=y), or when running as an SEV-SNP guest with no paravisor. Is that correct?
Quoted 24 lines
This patchset is based on the AMD patchset "AMD: Add Secure AVIC Guest Support" https://lkml.org/lkml/2025/6/10/1579
Change since v1:
- Remove the check of Secure AVIC when set APIC backing page
- Useapic_update_vector()instead of exposing new interface from Secure AVIC driver to update APIC backing page and allow associated interrupt to be injected by hypervisor.Tianyu Lan (4):
x86/Hyper-V: Not use hv apic driver when Secure AVIC is availabledrivers/hv: Allow vmbus message synic interrupt injected from Hyper-V x86/Hyper-V: Not use auto-eoi when Secure AVIC is available x86/Hyper-V: Allow Hyper-V to inject Hyper-V vectorsarch/x86/hyperv/hv_apic.c | 3 +++ arch/x86/hyperv/hv_init.c | 4 ++++ arch/x86/kernel/cpu/mshyperv.c | 2 ++ drivers/hv/hv.c | 2 ++ 4 files changed, 11 insertions(+)--
2.25.1
Quoted 15 lines · Michael Kelley
From: Tianyu Lan <[email protected]> Sent: Friday, June 13, 2025 4:08 AM
Quoted 13 lines
Secure AVIC is a new hardware feature in the AMD64 architecture to allow SEV-SNP guests to prevent the hypervisor from generating unexpected interrupts to a vCPU or otherwise violate architectural assumptions around APIC behavior.
Each vCPU has a guest-allocated APIC backing page of size 4K, which maintains APIC state for that vCPU. APIC backing page's
ALLOWED_IRRfield indicates the interrupt vectors which the guest allows the hypervisor to send.
Quoted 8 lines
Quoted 5 lines
This patchset is to enable the feature for Hyper-V platform. Patch "Expose
x2apic_savic_update_vector()" is to expose new fucntion and device driver and arch code may update AVIC backing pageALLOWED_IRRfield to allow Hyper-V inject associated vector.The last sentence above seems to be leftover from v1 of the patch set and is no longer accurate. Please update.
Thank you very much, Michael! Will update.
Quoted 8 lines
Additional observation: These patches depend on
CC_ATTR_SNP_SECURE_AVIC, which is not set when operating in VTOM mode (i.e., a paravisor is present). So evidently Linux on Hyper-V must handle the Secure AVIC only when Linux is running as the paravisor in VTL2 (CONFIG_HYPERV_VTL_MODE=y), or when running as an SEV-SNP guest with no paravisor. Is that correct?
This patchset enables Secure AVIC function for enlightened SEV-SNP guest which uses c-bit to encrypt/decrypt guest memory.
Signature · 2 lines
Thanks Tianyu Lan