x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform

RFC PATCH In review Tianyu Lan 3 participants 14 messages Aug 6, 2025 – Aug 13, 2025

Subsystems (4)

x86 Generic include/asm header files Hyper-V/Azure core and drivers Microsoft MANA RDMA driver

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Tianyu Lan

author

2025-08-06 12:18 UTC #0 lore raw

v6 cover x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform

From: Tianyu Lan <[email protected]>

Secure AVIC is a new hardware feature in the AMD64 architecture to allow SEV-SNP guests to prevent the hypervisor from generating unexpected interrupts to a vCPU or otherwise violate architectural assumptions around APIC behavior.

Each vCPU has a guest-allocated APIC backing page of size 4K, which maintains APIC state for that vCPU. APIC backing page's ALLOWED_IRR field indicates the interrupt vectors which the guest allows the hypervisor to send.

This patchset is to enable the feature for Hyper-V platform. Patch "Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V" is to expose new fucntion hv_enable_coco_interrupt() and device driver and arch code may update AVIC backing page ALLOWED_IRR field to allow Hyper-V inject associated vector.

This patchset is based on the AMD patchset "AMD: Add Secure AVIC Guest Support"
https://lkml.org/lkml/2025/6/10/1579

Change since v5:
- Rmove extra line and move hv_enable_coco_interrupt() just after hv_set_msr() in the hv_synic_disable_regs().

Change since v4:
- Change the order to call hv_enable_coco_interrupt() in the hv_synic_enable/disable_regs().
- Update commit title "Drivers/hv:" to "Drivers: hv:"

Change since v3:
- Disable VMBus Message interrupt via hv_enable_ coco_interrupt() in the hv_synic_disable_regs().
- Fix coding style issue and update change log.

Change since v2:
- Add hv_enable_coco_interrupt() as wrapper of apic_update_vector()
- Re-work change logs

Change since v1:
- Remove the check of Secure AVIC when set APIC backing page
- Use apic_update_vector() instead of exposing new interface from Secure AVIC driver to update APIC backing page and allow associated interrupt to be injected by hypervisor.

Tianyu Lan (4):
x86/hyperv: Don't use hv apic driver when Secure AVIC is available
Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V x86/hyperv: Don't use auto-eoi when Secure AVIC is available x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts

 arch/x86/hyperv/hv_apic.c      | 9 +++++++++
 arch/x86/hyperv/hv_init.c      | 7 +++++++
 arch/x86/kernel/cpu/mshyperv.c | 2 ++
 drivers/hv/hv.c                | 7 ++++++-
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 6 files changed, 30 insertions(+), 1 deletion(-)

Signature · 1 line

2.25.1

Tianyu Lan

author

2025-08-06 12:18 UTC #1 lore raw

RFC PATCH v6 1/4 x86/hyperv: Don't use hv apic driver when Secure AVIC is available

From: Tianyu Lan <[email protected]>

When Secure AVIC is available, the AMD x2apic Secure AVIC driver will be selected. In that case, have hv_apic_init() return immediately without doing anything.

Reviewed-by Michael Kelley <[email protected]>

Reviewed-by Neeraj Upadhyay <[email protected]>

Signed-off-by Tianyu Lan <[email protected]>

---
Change since RFC V3:
- Update Change log and fix coding style issue.

---
 arch/x86/hyperv/hv_apic.c | 4 ++++
 1 file changed, 4 insertions(+)

arch/x86/hyperv/hv_apic.c +4 -0

index bfde0a3498b9..01bc02cc0590 100644
@@ -25,6 +25,7 @@
 #include <linux/clockchips.h>
 #include <linux/slab.h>
 #include <linux/cpuhotplug.h>
+#include <linux/cc_platform.h>
 #include <asm/hypervisor.h>
 #include <asm/mshyperv.h>
 #include <asm/apic.h>

@@ -293,6 +294,9 @@ static void hv_send_ipi_self(int vector)
 
 void __init hv_apic_init(void)
 {
+	if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+		return;
+
 	if (ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) {
 		pr_info("Hyper-V: Using IPI hypercalls\n");
 		/*

Signature · 1 line

2.25.1

Tianyu Lan

author

2025-08-06 12:19 UTC #2 lore raw

RFC PATCH v6 2/4 Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V

In reply to Tianyu Lan

From: Tianyu Lan <[email protected]>

When Secure AVIC is enabled, VMBus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject VMBus message interrupt.

Reviewed-by Neeraj Upadhyay <[email protected]>

Signed-off-by Tianyu Lan <[email protected]>

---
Change since RFC V5:
- Rmove extra line and move hv_enable_coco_interrupt() just after hv_set_msr() in the hv_synic_disable_regs().

Change since RFC V4:
- Change the order to call hv_enable_coco_interrupt() in the hv_synic_enable/disable_regs().
- Update commit title "Drivers/hv:" to "Drivers: hv:"

Change since RFC V3:
- Disable VMBus Message interrupt via hv_enable_ coco_interrupt() in the hv_synic_disable_regs().

---
 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 7 ++++++-
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 17 insertions(+), 1 deletion(-)

arch/x86/hyperv/hv_apic.c +5 -0

index 01bc02cc0590..c9808a51fa37 100644
@@ -54,6 +54,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
 	wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+	apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
 	u32 reg_val, hi;

drivers/hv/hv.c +6 -1

index 308c8f279df8..d68a96de1626 100644
@@ -312,10 +312,13 @@ void hv_synic_enable_regs(unsigned int cpu)
 	shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
 
 	shared_sint.vector = vmbus_interrupt;
+
 	shared_sint.masked = false;
 	shared_sint.auto_eoi = hv_recommend_using_aeoi();
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
+
 	/* Enable the global synic bit */
 	sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
 	sctrl.enable = 1;

@@ -342,7 +345,6 @@ void hv_synic_disable_regs(unsigned int cpu)
 	union hv_synic_scontrol sctrl;
 
 	shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
-
 	shared_sint.masked = 1;
 
 	/* Need to correctly cleanup in the case of SMP!!! */

@@ -350,6 +352,9 @@ void hv_synic_disable_regs(unsigned int cpu)
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
 	simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
+
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
+
 	/*
 	 * In Isolation VM, sim and sief pages are allocated by
 	 * paravisor. These pages also will be used by kdump

drivers/hv/hv_common.c +5 -0

index 49898d10faff..0f024ab3d360 100644
@@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64 param2)
 }
 EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
 
+void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+}
+EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
+
 void hv_identify_partition_type(void)
 {
 	/* Assume guest role */

include/asm-generic/mshyperv.h +1 -0

index a729b77983fa..7907c9878369 100644
@@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
 bool hv_isolation_type_snp(void);
 u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
 void hyperv_cleanup(void);
 bool hv_query_ext_cap(u64 cap_query);
 void hv_setup_dma_ops(struct device *dev, bool coherent);

Signature · 1 line

2.25.1

Michael Kelley

2025-08-06 14:11 UTC #3 lore raw

RE: [RFC PATCH V6 2/4 Resend] Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V

From: Tianyu Lan <[email protected]> Sent: Wednesday, August 6, 2025 5:19 AM

Quoted 48 lines

When Secure AVIC is enabled, VMBus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject VMBus message interrupt.
Reviewed-by Neeraj Upadhyay <[email protected]>
Signed-off-by Tianyu Lan <[email protected]>
---
Change since RFC V5:
- Rmove extra line and move hv_enable_coco_interrupt() just after hv_set_msr() in the hv_synic_disable_regs().
Change since RFC V4:
- Change the order to call hv_enable_coco_interrupt() in the hv_synic_enable/disable_regs().
- Update commit title "Drivers/hv:" to "Drivers: hv:"
Change since RFC V3:
- Disable VMBus Message interrupt via hv_enable_ coco_interrupt() in the hv_synic_disable_regs().
---
 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 7 ++++++-
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 17 insertions(+), 1 deletion(-)
arch/x86/hyperv/hv_apic.c +5 -0
index 01bc02cc0590..c9808a51fa37 100644
@@ -54,6 +54,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
 	wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+	apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
 	u32 reg_val, hi;
drivers/hv/hv.c +0 -0
index 308c8f279df8..d68a96de1626 100644

drivers/hv/hv.c void hv_synic_enable_regs(unsigned int cpu) · line 315

Quoted 4 lines

drivers/hv/hv.c +1 -0

@@ -312,10 +312,13 @@ void hv_synic_enable_regs(unsigned int cpu)
 	shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
 
 	shared_sint.vector = vmbus_interrupt;
+

The spurious blank line is still here.

Quoted 18 lines

drivers/hv/hv.c +2 -1

 	shared_sint.masked = false;
 	shared_sint.auto_eoi = hv_recommend_using_aeoi();
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
+
 	/* Enable the global synic bit */
 	sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
 	sctrl.enable = 1;

@@ -342,7 +345,6 @@ void hv_synic_disable_regs(unsigned int cpu)
 	union hv_synic_scontrol sctrl;
 
 	shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
-
 	shared_sint.masked = 1;
 
 	/* Need to correctly cleanup in the case of SMP!!! */

drivers/hv/hv.c void hv_synic_disable_regs(unsigned int cpu) · line 357

Quoted 6 lines

drivers/hv/hv.c +3 -0

@@ -350,6 +352,9 @@ void hv_synic_disable_regs(unsigned int cpu)
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
 	simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
+
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
+

This line is still in the wrong place. Maybe you accidentally resent the previous version of the patch instead of the version with your intended changes?

Michael

Quoted 35 lines

drivers/hv/hv.c +0 -0

 	/*
 	 * In Isolation VM, sim and sief pages are allocated by
 	 * paravisor. These pages also will be used by kdump

drivers/hv/hv_common.c +5 -0

index 49898d10faff..0f024ab3d360 100644
@@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64
 param2)
 }
 EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
 
+void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+}
+EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
+
 void hv_identify_partition_type(void)
 {

drivers/hv/hv_common.c +0 -0

 	/* Assume guest role */

include/asm-generic/mshyperv.h +1 -1

index a729b77983fa..7907c9878369 100644
@@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
 bool hv_isolation_type_snp(void);
 u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
 void hyperv_cleanup(void);
 bool hv_query_ext_cap(u64 cap_query);
 void hv_setup_dma_ops(struct device *dev, bool coherent);
--

2.25.1

Tianyu Lan

author

2025-08-06 16:01 UTC #4 lore raw

RFC PATCH v6 2/4 Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V

From: Tianyu Lan <[email protected]>

When Secure AVIC is enabled, VMBus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject VMBus message interrupt.

Reviewed-by Neeraj Upadhyay <[email protected]>

Signed-off-by Tianyu Lan <[email protected]>

---
Change since RFC V5:
- Rmove extra line and move hv_enable_coco_interrupt() just after hv_set_msr() in the hv_synic_disable_regs().

Change since RFC V4:
- Change the order to call hv_enable_coco_interrupt() in the hv_synic_enable/disable_regs().
- Update commit title "Drivers/hv:" to "Drivers: hv:"

Change since RFC V3:
- Disable VMBus Message interrupt via hv_enable_ coco_interrupt() in the hv_synic_disable_regs().

---
 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 4 ++++
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 15 insertions(+)

arch/x86/hyperv/hv_apic.c +5 -0

index 01bc02cc0590..c9808a51fa37 100644
@@ -54,6 +54,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
 	wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+	apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
 	u32 reg_val, hi;

drivers/hv/hv.c +4 -0

index 308c8f279df8..355663a6e3b8 100644
@@ -316,6 +316,8 @@ void hv_synic_enable_regs(unsigned int cpu)
 	shared_sint.auto_eoi = hv_recommend_using_aeoi();
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
+
 	/* Enable the global synic bit */
 	sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
 	sctrl.enable = 1;

@@ -349,6 +351,8 @@ void hv_synic_disable_regs(unsigned int cpu)
 	/* Disable the interrupt */
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
+
 	simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
 	/*
 	 * In Isolation VM, sim and sief pages are allocated by

drivers/hv/hv_common.c +5 -0

index 49898d10faff..0f024ab3d360 100644
@@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64 param2)
 }
 EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
 
+void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+}
+EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
+
 void hv_identify_partition_type(void)
 {
 	/* Assume guest role */

include/asm-generic/mshyperv.h +1 -0

index a729b77983fa..7907c9878369 100644
@@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
 bool hv_isolation_type_snp(void);
 u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
 void hyperv_cleanup(void);
 bool hv_query_ext_cap(u64 cap_query);
 void hv_setup_dma_ops(struct device *dev, bool coherent);

Signature · 1 line

2.25.1

Michael Kelley

Reviewed-by on v6 2/4

2025-08-07 04:14 UTC #5 lore raw

RE: [Update RFC PATCH V6 2/4] Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V

From: Tianyu Lan <[email protected]> Sent: Wednesday, August 6, 2025 9:01 AM

Quoted 94 lines

When Secure AVIC is enabled, VMBus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject VMBus message interrupt.

Reviewed-by Neeraj Upadhyay <[email protected]>

Signed-off-by Tianyu Lan <[email protected]>

---
Change since RFC V5:
- Rmove extra line and move hv_enable_coco_interrupt() just after hv_set_msr() in the hv_synic_disable_regs().

Change since RFC V4:
- Change the order to call hv_enable_coco_interrupt() in the hv_synic_enable/disable_regs().
- Update commit title "Drivers/hv:" to "Drivers: hv:"

Change since RFC V3:
- Disable VMBus Message interrupt via hv_enable_ coco_interrupt() in the hv_synic_disable_regs().

---
 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 4 ++++
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 15 insertions(+)

arch/x86/hyperv/hv_apic.c +5 -0

index 01bc02cc0590..c9808a51fa37 100644
@@ -54,6 +54,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
 	wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+	apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
 	u32 reg_val, hi;

drivers/hv/hv.c +4 -0

index 308c8f279df8..355663a6e3b8 100644
@@ -316,6 +316,8 @@ void hv_synic_enable_regs(unsigned int cpu)
 	shared_sint.auto_eoi = hv_recommend_using_aeoi();
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
+
 	/* Enable the global synic bit */
 	sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
 	sctrl.enable = 1;

@@ -349,6 +351,8 @@ void hv_synic_disable_regs(unsigned int cpu)
 	/* Disable the interrupt */
 	hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
+	hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
+
 	simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
 	/*
 	 * In Isolation VM, sim and sief pages are allocated by

drivers/hv/hv_common.c +5 -0

index 49898d10faff..0f024ab3d360 100644
@@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64 param2)
 }
 EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
 
+void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+}
+EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
+
 void hv_identify_partition_type(void)
 {
 	/* Assume guest role */

include/asm-generic/mshyperv.h +1 -1

index a729b77983fa..7907c9878369 100644
@@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
 bool hv_isolation_type_snp(void);
 u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
 void hyperv_cleanup(void);
 bool hv_query_ext_cap(u64 cap_query);
 void hv_setup_dma_ops(struct device *dev, bool coherent);
--

Quoted 2 lines

2.25.1

Reviewed-by Michael Kelley <[email protected]>

Tianyu Lan

author

2025-08-06 16:05 UTC #6 lore raw

Re: [RFC PATCH V6 2/4 Resend] Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V

In reply to Michael Kelley

Quoted 86 lines · Michael Kelley

From: Tianyu Lan <[email protected]> Sent: Wednesday, August 6, 2025 5:19 AM
Quoted 48 lines
When Secure AVIC is enabled, VMBus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject VMBus message interrupt.
Reviewed-by Neeraj Upadhyay <[email protected]>
Signed-off-by Tianyu Lan <[email protected]>
---
Change since RFC V5:
- Rmove extra line and move hv_enable_coco_interrupt() just after hv_set_msr() in the hv_synic_disable_regs().
Change since RFC V4:
- Change the order to call hv_enable_coco_interrupt() in the hv_synic_enable/disable_regs().
- Update commit title "Drivers/hv:" to "Drivers: hv:"
Change since RFC V3:
- Disable VMBus Message interrupt via hv_enable_ coco_interrupt() in the hv_synic_disable_regs().
---
 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 7 ++++++-
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 17 insertions(+), 1 deletion(-)
arch/x86/hyperv/hv_apic.c +5 -0
index 01bc02cc0590..c9808a51fa37 100644
@@ -54,6 +54,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
      wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+     apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
      u32 reg_val, hi;
drivers/hv/hv.c +0 -0
index 308c8f279df8..d68a96de1626 100644
drivers/hv/hv.c void hv_synic_enable_regs(unsigned int cpu) · line 315
Quoted 4 lines
drivers/hv/hv.c +1 -0
@@ -312,10 +312,13 @@ void hv_synic_enable_regs(unsigned int cpu)
      shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
 
      shared_sint.vector = vmbus_interrupt;
+
The spurious blank line is still here.
Quoted 18 lines
drivers/hv/hv.c +2 -1
      shared_sint.masked = false;
      shared_sint.auto_eoi = hv_recommend_using_aeoi();
      hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
+     hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);
+
      /* Enable the global synic bit */
      sctrl.as_uint64 = hv_get_msr(HV_MSR_SCONTROL);
      sctrl.enable = 1;
@@ -342,7 +345,6 @@ void hv_synic_disable_regs(unsigned int cpu)
      union hv_synic_scontrol sctrl;
 
      shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
-
      shared_sint.masked = 1;
 
      /* Need to correctly cleanup in the case of SMP!!! */
drivers/hv/hv.c void hv_synic_disable_regs(unsigned int cpu) · line 357
Quoted 6 lines
drivers/hv/hv.c +3 -0
@@ -350,6 +352,9 @@ void hv_synic_disable_regs(unsigned int cpu)
      hv_set_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 
      simp.as_uint64 = hv_get_msr(HV_MSR_SIMP);
+
+     hv_enable_coco_interrupt(cpu, vmbus_interrupt, false);
+
This line is still in the wrong place. Maybe you accidentally resent the previous version of the patch instead of the version with your intended changes?

Quoted 1 line

Michael

Hi Michael:
I just sent out an update version. Sorry for confusion.

Signature · 2 lines

Thanks
Tianyu Lan

Tianyu Lan

author

2025-08-06 12:19 UTC #7 lore raw

RFC PATCH v6 3/4 x86/hyperv: Don't use auto-eoi when Secure AVIC is available

In reply to Tianyu Lan

From: Tianyu Lan <[email protected]>

Hyper-V doesn't support auto-eoi with Secure AVIC. So set the HV_DEPRECATING_AEOI_RECOMMENDED flag to force writing the EOI register after handling an interrupt.

Reviewed-by Michael Kelley <[email protected]>

Reviewed-by Neeraj Upadhyay <[email protected]>

Signed-off-by Tianyu Lan <[email protected]>

---
Change since RFC V3:
- Update title prefix from "x86/Hyper-V" to "x86/hyperv"

---
 arch/x86/kernel/cpu/mshyperv.c | 2 ++
 1 file changed, 2 insertions(+)

arch/x86/kernel/cpu/mshyperv.c +2 -0

index c78f860419d6..8f029650f16c 100644
@@ -463,6 +463,8 @@ static void __init ms_hyperv_init_platform(void)
 		 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
 
 	hv_identify_partition_type();
+	if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+		ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED;
 
 	if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
 		hv_nested = true;

Signature · 1 line

2.25.1

Tianyu Lan

author

2025-08-06 12:19 UTC #8 lore raw

RFC PATCH v6 4/4 x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts

In reply to Tianyu Lan

From: Tianyu Lan <[email protected]>

When Secure AVIC is enabled, call Secure AVIC function to allow Hyper-V to inject STIMER0 interrupt.

Reviewed-by Michael Kelley <[email protected]>

Reviewed-by Neeraj Upadhyay <[email protected]>

Signed-off-by Tianyu Lan <[email protected]>

---
 arch/x86/hyperv/hv_init.c | 7 +++++++
 1 file changed, 7 insertions(+)

arch/x86/hyperv/hv_init.c +7 -0

index 3d1d3547095a..591338162420 100644
@@ -132,6 +132,10 @@ static int hv_cpu_init(unsigned int cpu)
 		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
 	}
 
+	/* Allow Hyper-V stimer vector to be injected from Hypervisor. */
+	if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
+		apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, true);
+
 	return hyperv_init_ghcb();
 }

@@ -239,6 +243,9 @@ static int hv_cpu_die(unsigned int cpu)
 		*ghcb_va = NULL;
 	}
 
+	if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
+		apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, false);
+
 	hv_common_cpu_die(cpu);
 
 	if (hv_vp_assist_page && hv_vp_assist_page[cpu]) {

Signature · 1 line

2.25.1

Wei Liu

maintainer

2025-08-12 23:47 UTC #9 lore raw

In reply to Tianyu Lan

Quoted 1 line · Tianyu Lan

From: Tianyu Lan <[email protected]>

[...]

Quoted 5 lines

Tianyu Lan (4):
x86/hyperv: Don't use hv apic driver when Secure AVIC is available
Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V x86/hyperv: Don't use auto-eoi when Secure AVIC is available x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts

Are they still RFC? They look like ready to be merged.

Wei

Tianyu Lan

author

2025-08-13 11:44 UTC #10 lore raw

Quoted 10 lines · Wei Liu

Quoted 1 line · Tianyu Lan
From: Tianyu Lan <[email protected]>
[...]
Quoted 5 lines
Tianyu Lan (4):
x86/hyperv: Don't use hv apic driver when Secure AVIC is available
Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V x86/hyperv: Don't use auto-eoi when Secure AVIC is available x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts

Quoted 3 lines

Are they still RFC? They look like ready to be merged.
Wei

Hi Wei:
This patchset depends on the AMD Secure AVIC patchset. If we just
add hv_enable_coco_interrupt() as a dummy function. If It's acceptable, I may send out a new version for merge.

Signature · 2 lines

Thanks
Tianyu Lan

Wei Liu

maintainer

2025-08-13 14:40 UTC #11 lore raw

Quoted 11 lines · Tianyu Lan

Quoted 10 lines · Wei Liu
Quoted 1 line · Tianyu Lan
From: Tianyu Lan <[email protected]>
[...]
Quoted 5 lines
Tianyu Lan (4):
x86/hyperv: Don't use hv apic driver when Secure AVIC is available
Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V x86/hyperv: Don't use auto-eoi when Secure AVIC is available x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts

Quoted 7 lines

Quoted 3 lines
Are they still RFC? They look like ready to be merged.
Wei
Hi Wei:
This patchset depends on the AMD Secure AVIC patchset. If we just
add hv_enable_coco_interrupt() as a dummy function. If It's acceptable, I may send out a new version for merge.

Let's wait for the AMD Secure AVIC patchset to be merged first. You can then repost without the RFC tag.

Thanks,
Wei

Quoted 3 lines

Signature · 2 lines
Thanks
Tianyu Lan

Tianyu Lan

author

2025-08-13 15:06 UTC #12 lore raw

Quoted 21 lines · Wei Liu

Quoted 11 lines · Tianyu Lan
Quoted 10 lines · Wei Liu
Quoted 1 line · Tianyu Lan
From: Tianyu Lan <[email protected]>
[...]
Quoted 5 lines
Tianyu Lan (4):
x86/hyperv: Don't use hv apic driver when Secure AVIC is available
Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V x86/hyperv: Don't use auto-eoi when Secure AVIC is available x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts
Quoted 7 lines
Quoted 3 lines
Are they still RFC? They look like ready to be merged.
Wei
Hi Wei:
This patchset depends on the AMD Secure AVIC patchset. If we just
add hv_enable_coco_interrupt() as a dummy function. If It's acceptable, I may send out a new version for merge.

Quoted 9 lines

Let's wait for the AMD Secure AVIC patchset to be merged first. You can then repost without the RFC tag.
Thanks,
Wei
Quoted 3 lines
--
Thanks
Tianyu Lan

Sure. I got it. Thanks for your suggestion.and will update patches soon. --
Thanks
Tianyu Lan

Tianyu Lan

author

2025-08-13 12:08 UTC #13 lore raw

In reply to Wei Liu

Quoted 10 lines · Wei Liu

Quoted 1 line · Tianyu Lan
From: Tianyu Lan <[email protected]>
[...]
Quoted 5 lines
Tianyu Lan (4):
x86/hyperv: Don't use hv apic driver when Secure AVIC is available
Drivers: hv: Allow vmbus message synic interrupt injected from Hyper-V x86/hyperv: Don't use auto-eoi when Secure AVIC is available x86/hyperv: Allow Hyper-V to inject STIMER0 interrupts

Quoted 3 lines

Are they still RFC? They look like ready to be merged.
Wei

Hi Wei:
Please ignore my previous email. I always ignore something.
AMD Secure AVIC patchset is still in the RFC stage. Is it possible to accept my patchset before AMD Secure AVIC patchset to be merged?

Signature · 2 lines

Thanks
Tianyu Lan