x86/Hyper-V: Add AMD Secure AVIC for Hyper-V platform

When Secure AVIC is available, AMD x2apic Secure AVIC driver should be selected and return directly in the hv_apic_init().

Signed-off-by Tianyu Lan <[email protected]>

---
 arch/x86/hyperv/hv_apic.c | 3 +++
 1 file changed, 3 insertions(+)

arch/x86/hyperv/hv_apic.c +0 -0

index bfde0a3498b9..1c48396e5389 100644

arch/x86/hyperv/hv_apic.c +1 -1

+
 	if (ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) {
 		pr_info("Hyper-V: Using IPI hypercalls\n");
 		/*
--

2.25.1

From: Tianyu Lan <[email protected]> Sent: Wednesday, July 23, 2025 12:03 PM

Quoted 4 lines

When Secure AVIC is available, AMD x2apic Secure AVIC driver should be selected and return directly in the hv_apic_init().

For the "RFC Patch v2" version of this patch, I had provided some comments on the wording for the patch "Subject:" and for the commit message. [1] It doesn't look like those comments were picked up. The comments improve the use of English without changing any substantive information, so I think they should be adopted.

[1] https://lore.kernel.org/linux-hyperv/CAMvTesAscN2MyqJXpcbwcXWC-6-en6U_c03M+2=zcMF0bLv4iw@mail.gmail.com/T/#m893e8cac0314e73ee4626d736c623e640b46ef5d

When Secure AVIC is enabled, VMBus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject VMBus message interrupt.

Signed-off-by Tianyu Lan <[email protected]>

---
Change since v3
- Add hv_enable_coco_interrupt() as wrapper of apic_update_vector()

 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 2 ++
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 13 insertions(+)

arch/x86/hyperv/hv_apic.c +5 -0

index 1c48396e5389..dd6829440ea2 100644
@@ -53,6 +53,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
 	wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+	apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
 	u32 reg_val, hi;

drivers/hv/hv.c +0 -0

index 308c8f279df8..2aafe8946e5b 100644

drivers/hv/hv.c +0 -0

 	shared_sint.vector = vmbus_interrupt;
 	shared_sint.masked = false;

drivers/hv/hv_common.c +5 -0

index 49898d10faff..0f024ab3d360 100644
@@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64 param2)
 }
 EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
 
+void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+}
+EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
+
 void hv_identify_partition_type(void)
 {
 	/* Assume guest role */

include/asm-generic/mshyperv.h +1 -1

index a729b77983fa..7907c9878369 100644
@@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
 bool hv_isolation_type_snp(void);
 u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
 void hyperv_cleanup(void);
 bool hv_query_ext_cap(u64 cap_query);
 void hv_setup_dma_ops(struct device *dev, bool coherent);
--

2.25.1

From: Tianyu Lan <[email protected]> Sent: Wednesday, July 23, 2025 12:03 PM

Quoted 38 lines

When Secure AVIC is enabled, VMBus driver should call x2apic Secure AVIC interface to allow Hyper-V to inject VMBus message interrupt.

Signed-off-by Tianyu Lan <[email protected]>

---
Change since v3
- Add hv_enable_coco_interrupt() as wrapper of apic_update_vector()

 arch/x86/hyperv/hv_apic.c      | 5 +++++
 drivers/hv/hv.c                | 2 ++
 drivers/hv/hv_common.c         | 5 +++++
 include/asm-generic/mshyperv.h | 1 +
 4 files changed, 13 insertions(+)

arch/x86/hyperv/hv_apic.c +5 -0

index 1c48396e5389..dd6829440ea2 100644
@@ -53,6 +53,11 @@ static void hv_apic_icr_write(u32 low, u32 id)
      wrmsrq(HV_X64_MSR_ICR, reg_val);
 }
 
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+     apic_update_vector(cpu, vector, set);
+}
+
 static u32 hv_apic_read(u32 reg)
 {
      u32 reg_val, hi;

drivers/hv/hv.c +0 -0

index 308c8f279df8..2aafe8946e5b 100644

drivers/hv/hv.c line 23

Quoted 4 lines

drivers/hv/hv.c +1 -0

@@ -20,6 +20,7 @@
 #include <linux/interrupt.h>
 #include <clocksource/hyperv_timer.h>
 #include <asm/mshyperv.h>
+#include <asm/apic.h>

This #include is no longer needed since apic_update_vector() isn't being called directly. And the file doesn't exist on arm64, so it would create a compile error on arm64.

Before submitting, I always do a test compile on arm64 with my patches so that errors like this are caught beforehand! :-)

Quoted 4 lines

drivers/hv/hv.c +0 -0

 #include <linux/set_memory.h>
 #include "hyperv_vmbus.h"
 

drivers/hv/hv.c void hv_synic_enable_regs(unsigned int cpu) · line 314

Quoted 5 lines

drivers/hv/hv.c +1 -0

@@ -310,6 +311,7 @@ void hv_synic_enable_regs(unsigned int cpu)
      if (vmbus_irq != -1)
              enable_percpu_irq(vmbus_irq, 0);
      shared_sint.as_uint64 = hv_get_msr(HV_MSR_SINT0 + VMBUS_MESSAGE_SINT);
+     hv_enable_coco_interrupt(cpu, vmbus_interrupt, true);

In the "RFC Patch v2" version of this patch, I had asked about whether the interrupt should be disabled in hv_synic_disable_regs(), so there is symmetry. [1] I see that in Patch 4 of this series, you are disabling the STIMER0 interrupt when a CPU goes offline. If disabling vmbus_interrupt causes a problem, I'm curious about the details.

Quoted 35 lines

drivers/hv/hv.c +0 -0

      shared_sint.vector = vmbus_interrupt;
      shared_sint.masked = false;

drivers/hv/hv_common.c +5 -0

index 49898d10faff..0f024ab3d360 100644
@@ -716,6 +716,11 @@ u64 __weak hv_tdx_hypercall(u64 control, u64 param1, u64 param2)
 }
 EXPORT_SYMBOL_GPL(hv_tdx_hypercall);
 
+void __weak hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set)
+{
+}
+EXPORT_SYMBOL_GPL(hv_enable_coco_interrupt);
+
 void hv_identify_partition_type(void)
 {
      /* Assume guest role */

include/asm-generic/mshyperv.h +1 -1

index a729b77983fa..7907c9878369 100644
@@ -333,6 +333,7 @@ bool hv_is_isolation_supported(void);
 bool hv_isolation_type_snp(void);
 u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size);
 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
+void hv_enable_coco_interrupt(unsigned int cpu, unsigned int vector, bool set);
 void hyperv_cleanup(void);
 bool hv_query_ext_cap(u64 cap_query);
 void hv_setup_dma_ops(struct device *dev, bool coherent);
--

2.25.1

Hyper-V doesn't support auto-eoi with Secure AVIC. So set the HV_DEPRECATING_AEOI_RECOMMENDED flag
to force writing the EIO register after handling an interrupt.

Signed-off-by Tianyu Lan <[email protected]>

---
 arch/x86/kernel/cpu/mshyperv.c | 2 ++
 1 file changed, 2 insertions(+)

arch/x86/kernel/cpu/mshyperv.c +2 -1

index c78f860419d6..8f029650f16c 100644
@@ -463,6 +463,8 @@ static void __init ms_hyperv_init_platform(void)
 		 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
 
 	hv_identify_partition_type();
+	if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+		ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED;
 
 	if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
 		hv_nested = true;
--

2.25.1

From: Tianyu Lan <[email protected]> Sent: Wednesday, July 23, 2025 12:03 PM

Quoted 1 line

I'm nit-picking, but the patch Subject: line prefix should be "x86/hyperv:" for consistency with past patches. Note that there's no capitalization or dash. I know not everyone is consistent on this if you look at the git log for mshyperv.c, but I try to flag it and encourage consistency.

Quoted 20 lines

Hyper-V doesn't support auto-eoi with Secure AVIC. So set the HV_DEPRECATING_AEOI_RECOMMENDED flag
to force writing the EIO register after handling an interrupt.

Signed-off-by Tianyu Lan <[email protected]>

---
 arch/x86/kernel/cpu/mshyperv.c | 2 ++
 1 file changed, 2 insertions(+)

arch/x86/kernel/cpu/mshyperv.c +2 -0

index c78f860419d6..8f029650f16c 100644
@@ -463,6 +463,8 @@ static void __init ms_hyperv_init_platform(void)
               ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
 
      hv_identify_partition_type();
+     if (cc_platform_has(CC_ATTR_SNP_SECURE_AVIC))
+             ms_hyperv.hints |= HV_DEPRECATING_AEOI_RECOMMENDED;
 

Quoted 5 lines

arch/x86/kernel/cpu/mshyperv.c +0 -1

      if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
              hv_nested = true;
--

2.25.1

When Secure AVIC is enabled, call Secure AVIC function to allow Hyper-V to inject STIMER0 interrupt.

Signed-off-by Tianyu Lan <[email protected]>

---
 arch/x86/hyperv/hv_init.c | 7 +++++++
 1 file changed, 7 insertions(+)

arch/x86/hyperv/hv_init.c +7 -1

index 3d1d3547095a..591338162420 100644
@@ -132,6 +132,10 @@ static int hv_cpu_init(unsigned int cpu)
 		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);
 	}
 
+	/* Allow Hyper-V stimer vector to be injected from Hypervisor. */
+	if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
+		apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, true);
+
 	return hyperv_init_ghcb();
 }
 

@@ -239,6 +243,9 @@ static int hv_cpu_die(unsigned int cpu)
 		*ghcb_va = NULL;
 	}
 
+	if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
+		apic_update_vector(cpu, HYPERV_STIMER0_VECTOR, false);
+
 	hv_common_cpu_die(cpu);
 
 	if (hv_vp_assist_page && hv_vp_assist_page[cpu]) {
--

2.25.1