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ASoC: mediatek: mt8195: Fix clock error handling

PATCH Superseded [email protected] 2 participants 27 messages Oct 5 – Oct 9

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v2 of 3 Superseded Latest is v3 →

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#0 lore raw

v2 cover ASoC: mediatek: mt8195: Fix clock error handling

From: bui duc phuc <[email protected]>

Hi all,

This series improves error handling in the MT8195 ASoC driver, mainly by checking and propagating errors from clock operations.

Changes in v2:
- Check for negative return from mtk_afe_fe_startup().

Compile-tested only.

Best regards,
Phuc

bui duc phuc (14):
ASoC: mediatek: mt8195: Fix tuner clock error handling
ASoC: mediatek: mt8195: Use dev_err_probe() in mt8195_afe_init_clock()
ASoC: mediatek: mt8195: Fix register access clock error handling
ASoC: mediatek: mt8195: Fix timing system clock error handling
ASoC: mediatek: mt8195: Fix paired memif clock error handling
ASoC: mediatek: mt8195: Fix FE startup error handling
ASoC: mediatek: mt8195: Fix runtime resume error handling
ASoC: mediatek: mt8195: Remove redundant error message
ASoC: mediatek: mt8195: Propagate IRQ lookup errors
ASoC: mediatek: mt8195: Fix ETDM MCLK error handling
ASoC: mediatek: mt8195: Fix ETDM startup error handling
ASoC: mediatek: mt8195: Fix HDMI TX startup error handling
ASoC: mediatek: mt8195: Fix ETDM probe error handling
ASoC: mediatek: mt8195: Fix clock parent error handling

 sound/soc/mediatek/mt8195/mt8195-afe-clk.c  |  69 +++++++++----
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c  | 102 ++++++++++++++------
 sound/soc/mediatek/mt8195/mt8195-dai-adda.c |   3 +-
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c |  99 ++++++++++++++-----
 4 files changed, 198 insertions(+), 75 deletions(-)
Signature · 1 line
2.43.0
#1 lore raw

PATCH v2 1/14 ASoC: mediatek: mt8195: Fix tuner clock error handling

From: bui duc phuc <[email protected]>

Check and propagate errors from mt8195_afe_enable_clk(). If enabling the tuner clock fails, disable the previously enabled APLL clock.

Fixes ff5a90173d98 ("ASoC: mediatek: mt8195: enable apll tuner")
---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 24 +++++++++++++++++-----
 1 file changed, 19 insertions(+), 5 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +19 -5
index 618d8400913a..ec1ea5b988ff 100644
@@ -241,21 +241,35 @@ static int mt8195_afe_enable_tuner_clk(struct mtk_base_afe *afe,
 				       unsigned int id)
 {
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
+	int ret;
 
 	switch (id) {
 	case MT8195_AUD_PLL1:
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
+		if (ret)
+			return ret;
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
+		if (ret) {
+			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
+			return ret;
+		}
 		break;
 	case MT8195_AUD_PLL2:
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
+		if (ret)
+			return ret;
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
+		if (ret) {
+			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
+			return ret;
+		}
 		break;
 	default:
+		ret = 0;
 		break;
 	}
 
-	return 0;
+	return ret;
 }
 
 static int mt8195_afe_disable_tuner_clk(struct mtk_base_afe *afe,
Signature · 1 line
2.43.0
#2 lore raw

Re: [PATCH v2 01/14] ASoC: mediatek: mt8195: Fix tuner clock error handling

Quoted 44 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Check and propagate errors from mt8195_afe_enable_clk(). If enabling the tuner clock fails, disable the previously enabled APLL clock.

Fixes ff5a90173d98 ("ASoC: mediatek: mt8195: enable apll tuner")
---
  sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 24 +++++++++++++++++-----
  1 file changed, 19 insertions(+), 5 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +16 -4
index 618d8400913a..ec1ea5b988ff 100644
@@ -241,21 +241,35 @@ static int mt8195_afe_enable_tuner_clk(struct mtk_base_afe *afe,
  				       unsigned int id)
  {
  	struct mt8195_afe_private *afe_priv = afe->platform_priv;
+	int ret;
 
  	switch (id) {
  	case MT8195_AUD_PLL1:
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
+		if (ret)
+			return ret;
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
+		if (ret) {
+			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
+			return ret;
+		}
  		break;
  	case MT8195_AUD_PLL2:
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
+		if (ret)
+			return ret;
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
+		if (ret) {
+			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
+			return ret;

sound/soc/mediatek/mt8195/mt8195-afe-clk.c static int mt8195_afe_enable_tuner_clk(struct mtk_base_afe *afe, · line 273

Quoted 10 lines
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +3 -1
+		}
  		break;
  	default:
+		ret = 0;
  		break;
  	}
 
-	return 0;
+	return ret;
  }

This makes mt8195_afe_enable_tuner_clk() return the clock enable failure, but after applying the series I think the error is still dropped by the next caller.

mt8195_afe_enable_apll_tuner() now returns the error from this helper, but mt8195_afe_enable_main_clock() still calls it for APLL1 and APLL2 without checking either return value. mt8195_afe_runtime_resume() does check the return from mt8195_afe_enable_main_clock(), so checking the tuner calls there would let the failure reach the existing resume unwind path.

Should mt8195_afe_enable_main_clock() also check these return values, and unwind APLL1 if enabling the APLL2 tuner fails?

Thanks
Ajay Kumar Nandam

Quoted 2 lines
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +0 -0
  static int mt8195_afe_disable_tuner_clk(struct mtk_base_afe *afe,
#3 lore raw

Re: [PATCH v2 01/14] ASoC: mediatek: mt8195: Fix tuner clock error handling

Hi Ajay,

Thank you for your review.

Quoted 4 lines

Should mt8195_afe_enable_main_clock() also check these return values, and unwind APLL1 if enabling the APLL2 tuner fails?

Yes, I think it should.

However, since I don't have MT8195 hardware to test with, I'd like to wait for feedback from the MediaTek side before sending the next version of this patch series.

Best regards,
Phuc

#4 lore raw

PATCH v2 2/14 ASoC: mediatek: mt8195: Use dev_err_probe() in mt8195_afe_init_clock()

In reply to [email protected]

From: bui duc phuc <[email protected]>

Use dev_err_probe() when obtaining clocks to avoid redundant error messages, particularly for probe deferral.

---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +3 -6
index ec1ea5b988ff..12d8159338be 100644
@@ -397,12 +397,9 @@ int mt8195_afe_init_clock(struct mtk_base_afe *afe)
 
 	for (i = 0; i < MT8195_CLK_NUM; i++) {
 		afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);
-		if (IS_ERR(afe_priv->clk[i])) {
-			dev_dbg(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n",
-				__func__, aud_clks[i],
-				PTR_ERR(afe_priv->clk[i]));
-			return PTR_ERR(afe_priv->clk[i]);
-		}
+		if (IS_ERR(afe_priv->clk[i]))
+			return dev_err_probe(afe->dev, PTR_ERR(afe_priv->clk[i]),
+					     "failed to get clock %s\n", aud_clks[i]);
 	}
 
 	/* initial tuner */
Signature · 1 line
2.43.0
Reviewed-by on v2 2/14
#5 lore raw

Re: [PATCH v2 02/14] ASoC: mediatek: mt8195: Use dev_err_probe() in mt8195_afe_init_clock()

Quoted 6 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Use dev_err_probe() when obtaining clocks to avoid redundant error messages, particularly for probe deferral.

LGTM

Quoted 24 lines
---
  sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 9 +++------
  1 file changed, 3 insertions(+), 6 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +3 -6
index ec1ea5b988ff..12d8159338be 100644
@@ -397,12 +397,9 @@ int mt8195_afe_init_clock(struct mtk_base_afe *afe)
 
  	for (i = 0; i < MT8195_CLK_NUM; i++) {
  		afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);
-		if (IS_ERR(afe_priv->clk[i])) {
-			dev_dbg(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n",
-				__func__, aud_clks[i],
-				PTR_ERR(afe_priv->clk[i]));
-			return PTR_ERR(afe_priv->clk[i]);
-		}
+		if (IS_ERR(afe_priv->clk[i]))
+			return dev_err_probe(afe->dev, PTR_ERR(afe_priv->clk[i]),
+					     "failed to get clock %s\n", aud_clks[i]);
  	}
 
  	/* initial tuner */
#6 lore raw

PATCH v2 3/14 ASoC: mediatek: mt8195: Fix register access clock error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check the return value of mt8195_afe_enable_clk() when enabling the register access clocks.

If enabling a clock fails, disable the clocks that were already enabled and propagate the error to the caller

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +12 -3
index 12d8159338be..34c828fdea29 100644
@@ -599,7 +599,7 @@ static int mt8195_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_t
 int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
 {
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
-	int i;
+	int i, ret;
 	static const unsigned int clk_array[] = {
 		MT8195_CLK_SCP_ADSP_AUDIODSP, /* bus clock for infra */
 		MT8195_CLK_TOP_AUDIO_H_SEL, /* clock for ADSP bus */
@@ -611,10 +611,19 @@ int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
 		MT8195_CLK_AUD_A1SYS, /* AFE HW clock */
 	};
 
-	for (i = 0; i < ARRAY_SIZE(clk_array); i++)
-		mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+	for (i = 0; i < ARRAY_SIZE(clk_array); i++) {
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+		if (ret)
+			goto err_disable_clk;
+	}
 
 	return 0;
+
+err_disable_clk:
+	while (--i >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);
+
+	return ret;
 }
 
 int mt8195_afe_disable_reg_rw_clk(struct mtk_base_afe *afe)
Signature · 1 line
2.43.0
Reviewed-by on v2 3/14
#7 lore raw

Re: [PATCH v2 03/14] ASoC: mediatek: mt8195: Fix register access clock error handling

Quoted 10 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Check the return value of mt8195_afe_enable_clk() when enabling the register access clocks.

If enabling a clock fails, disable the clocks that were already enabled and propagate the error to the caller

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
Quoted 39 lines
---
  sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 15 ++++++++++++---
  1 file changed, 12 insertions(+), 3 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +12 -3
index 12d8159338be..34c828fdea29 100644
@@ -599,7 +599,7 @@ static int mt8195_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_t
  int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
  {
  	struct mt8195_afe_private *afe_priv = afe->platform_priv;
-	int i;
+	int i, ret;
  	static const unsigned int clk_array[] = {
  		MT8195_CLK_SCP_ADSP_AUDIODSP, /* bus clock for infra */
  		MT8195_CLK_TOP_AUDIO_H_SEL, /* clock for ADSP bus */
@@ -611,10 +611,19 @@ int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
  		MT8195_CLK_AUD_A1SYS, /* AFE HW clock */
  	};
 
-	for (i = 0; i < ARRAY_SIZE(clk_array); i++)
-		mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+	for (i = 0; i < ARRAY_SIZE(clk_array); i++) {
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+		if (ret)
+			goto err_disable_clk;
+	}
 
  	return 0;
+
+err_disable_clk:
+	while (--i >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);
+
+	return ret;
  }
 
  int mt8195_afe_disable_reg_rw_clk(struct mtk_base_afe *afe)
#8 lore raw

PATCH v2 4/14 ASoC: mediatek: mt8195: Fix timing system clock error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check the return value of mt8195_afe_enable_clk() when enabling the timing system clocks.

If enabling a clock fails, disable the clocks that were already enabled and propagate the error to the caller. In mt8195_afe_enable_main_clock(), return the error instead of continuing with AFE clock enable.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-clk.c +17 -4
index 34c828fdea29..ef7a62fba6ec 100644
@@ -662,7 +662,7 @@ static int mt8195_afe_disable_afe_on(struct mtk_base_afe *afe)
 static int mt8195_afe_enable_timing_sys(struct mtk_base_afe *afe)
 {
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
-	int i;
+	int i, ret;
 	static const unsigned int clk_array[] = {
 		MT8195_CLK_AUD_A1SYS,
 		MT8195_CLK_AUD_A2SYS,
@@ -673,13 +673,22 @@ static int mt8195_afe_enable_timing_sys(struct mtk_base_afe *afe)
 		MT8195_TOP_CG_26M_TIMING,
 	};
 
-	for (i = 0; i < ARRAY_SIZE(clk_array); i++)
-		mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+	for (i = 0; i < ARRAY_SIZE(clk_array); i++) {
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+		if (ret)
+			goto err_disable_clk;
+	}
 
 	for (i = 0; i < ARRAY_SIZE(cg_array); i++)
 		mt8195_afe_enable_top_cg(afe, cg_array[i]);
 
 	return 0;
+
+err_disable_clk:
+	while (--i >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);
+
+	return ret;
 }
 
 static int mt8195_afe_disable_timing_sys(struct mtk_base_afe *afe)
@@ -707,7 +716,11 @@ static int mt8195_afe_disable_timing_sys(struct mtk_base_afe *afe)
 
 int mt8195_afe_enable_main_clock(struct mtk_base_afe *afe)
 {
-	mt8195_afe_enable_timing_sys(afe);
+	int ret;
+
+	ret = mt8195_afe_enable_timing_sys(afe);
+	if (ret)
+		return ret;
 
 	mt8195_afe_enable_afe_on(afe);
 
Signature · 1 line
2.43.0
#9 lore raw

PATCH v2 5/14 ASoC: mediatek: mt8195: Fix paired memif clock error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when preparing and enabling the paired DL8/DL10 memif clocks.

If enabling the second clock fails, undo the clock that was already prepared or enabled to keep the clock state balanced.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 24 ++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +20 -4
index 52c3381e6766..1d3e01e2c3e7 100644
@@ -286,15 +286,23 @@ mt8195_afe_paired_memif_clk_prepare(struct snd_pcm_substream *substream,
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
 	int clk_id;
+	int ret;
 
 	if (id != MT8195_AFE_MEMIF_DL8 && id != MT8195_AFE_MEMIF_DL10)
 		return 0;
 
 	if (enable) {
 		clk_id = MT8195_CLK_AUD_MEMIF_DL10;
-		mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		if (ret)
+			return ret;
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
-		mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		if (ret) {
+			clk_id = MT8195_CLK_AUD_MEMIF_DL10;
+			mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);
+			return ret;
+		}
 	} else {
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
 		mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);
@@ -315,6 +323,7 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream,
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
 	int clk_id;
+	int ret;
 
 	if (id != MT8195_AFE_MEMIF_DL8 && id != MT8195_AFE_MEMIF_DL10)
 		return 0;
@@ -322,11 +331,18 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream,
 	if (enable) {
 		/* DL8_DL10_MEM */
 		clk_id = MT8195_CLK_AUD_MEMIF_DL10;
-		mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		if (ret)
+			return ret;
 		udelay(1);
 		/* DL8_DL10_AGENT */
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
-		mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		if (ret) {
+			clk_id = MT8195_CLK_AUD_MEMIF_DL10;
+			mt8195_afe_disable_clk_atomic(afe, afe_priv->clk[clk_id]);
+			return ret;
+		}
 	} else {
 		/* DL8_DL10_AGENT */
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
Signature · 1 line
2.43.0
#10 lore raw

Re: [PATCH v2 05/14] ASoC: mediatek: mt8195: Fix paired memif clock error handling

Quoted 60 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Check and propagate errors when preparing and enabling the paired DL8/DL10 memif clocks.

If enabling the second clock fails, undo the clock that was already prepared or enabled to keep the clock state balanced.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
---
  sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 24 ++++++++++++++++++----
  1 file changed, 20 insertions(+), 4 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +14 -3
index 52c3381e6766..1d3e01e2c3e7 100644
@@ -286,15 +286,23 @@ mt8195_afe_paired_memif_clk_prepare(struct snd_pcm_substream *substream,
  	struct mt8195_afe_private *afe_priv = afe->platform_priv;
  	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
  	int clk_id;
+	int ret;
 
  	if (id != MT8195_AFE_MEMIF_DL8 && id != MT8195_AFE_MEMIF_DL10)
  		return 0;
 
  	if (enable) {
  		clk_id = MT8195_CLK_AUD_MEMIF_DL10;
-		mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		if (ret)
+			return ret;
  		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
-		mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		if (ret) {
+			clk_id = MT8195_CLK_AUD_MEMIF_DL10;
+			mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);
+			return ret;
+		}
  	} else {
  		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
  		mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);
@@ -315,6 +323,7 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream,
  	struct mt8195_afe_private *afe_priv = afe->platform_priv;
  	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
  	int clk_id;
+	int ret;
 
  	if (id != MT8195_AFE_MEMIF_DL8 && id != MT8195_AFE_MEMIF_DL10)
  		return 0;
@@ -322,11 +331,18 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream,
  	if (enable) {
  		/* DL8_DL10_MEM */
  		clk_id = MT8195_CLK_AUD_MEMIF_DL10;
-		mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		if (ret)
+			return ret;

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream, · line 345

Quoted 10 lines
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +6 -1
  		udelay(1);
  		/* DL8_DL10_AGENT */
  		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
-		mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		if (ret) {
+			clk_id = MT8195_CLK_AUD_MEMIF_DL10;
+			mt8195_afe_disable_clk_atomic(afe, afe_priv->clk[clk_id]);
+			return ret;
+		}

This makes mt8195_afe_paired_memif_clk_enable() return failures from the paired DL8/DL10 clock enables, but the return value still appears to be dropped by the trigger path.

After applying the full series, mt8195_afe_fe_trigger() still calls the enable helper like this on START/RESUME:

   mt8195_afe_paired_memif_clk_enable(substream, dai, 1);

so a failure from clk_enable() would not be propagated back through the DAI .trigger callback. Patch 6 handles the prepare-side helper in startup(), but I do not see the enable-side helper being handled by any later patch.

Should the START/RESUME path check this return value and unwind the trigger state if enabling the paired MEMIF clock fails?

Thanks
Ajay Kumar Nandam

Quoted 3 lines
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +0 -0
  	} else {
  		/* DL8_DL10_AGENT */
  		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
#11 lore raw

Re: [PATCH v2 05/14] ASoC: mediatek: mt8195: Fix paired memif clock error handling

Quoted 4 lines

Should the START/RESUME path check this return value and unwind the trigger state if enabling the paired MEMIF clock fails?

Yes, I think it should. As mentioned in my reply to patch 1, I'll wait for feedback from the MediaTek side before sending the next version.

Best regards,
Phuc

#12 lore raw

PATCH v2 6/14 ASoC: mediatek: mt8195: Fix FE startup error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors from paired memif clock preparation and PCM hardware constraints during FE startup.

Unprepare the paired memif clocks and shut down the FE when a later startup step fails to avoid leaving resources enabled on error.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

---

Changes in v2:
- Check for negative return from mtk_afe_fe_startup().

 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 44 ++++++++++++++--------
 1 file changed, 29 insertions(+), 15 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +29 -15
index 1d3e01e2c3e7..02736949ae6a 100644
@@ -364,24 +364,38 @@ static int mt8195_afe_fe_startup(struct snd_pcm_substream *substream,
 	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
 	int ret = 0;
 
-	mt8195_afe_paired_memif_clk_prepare(substream, dai, 1);
+	ret = mt8195_afe_paired_memif_clk_prepare(substream, dai, 1);
+	if (ret)
+		return ret;
 
 	ret = mtk_afe_fe_startup(substream, dai);
-
-	snd_pcm_hw_constraint_step(runtime, 0,
-				   SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
-				   MT8195_MEMIF_BUFFER_BYTES_ALIGN);
-
-	if (id != MT8195_AFE_MEMIF_DL7)
-		goto out;
-
-	ret = snd_pcm_hw_constraint_minmax(runtime,
-					   SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
-					   1,
-					   MT8195_MEMIF_DL7_MAX_PERIOD_SIZE);
 	if (ret < 0)
-		dev_dbg(afe->dev, "hw_constraint_minmax failed\n");
-out:
+		goto err_clk_unprepare;
+
+	ret = snd_pcm_hw_constraint_step(runtime, 0,
+					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					 MT8195_MEMIF_BUFFER_BYTES_ALIGN);
+	if (ret)
+		goto err_fe_shutdow;
+
+	if (id == MT8195_AFE_MEMIF_DL7) {
+		ret = snd_pcm_hw_constraint_minmax(runtime,
+						   SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
+						   1,
+						   MT8195_MEMIF_DL7_MAX_PERIOD_SIZE);
+		if (ret < 0) {
+			dev_dbg(afe->dev, "hw_constraint_minmax failed\n");
+			goto err_fe_shutdow;
+		}
+	}
+
+	return 0;
+
+err_fe_shutdow:
+	mtk_afe_fe_shutdown(substream, dai);
+err_clk_unprepare:
+	mt8195_afe_paired_memif_clk_prepare(substream, dai, 0);
+
 	return ret;
 }
 
Signature · 1 line
2.43.0
#13 lore raw

PATCH v2 7/14 ASoC: mediatek: mt8195: Fix runtime resume error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when enabling the register access and main clocks during runtime resume.

If regcache_sync() or main clock enable fails, restore regmap cache-only mode and disable the register access clocks before returning the error.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 23 +++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +18 -5
index 02736949ae6a..bb357cc674cb 100644
@@ -2958,18 +2958,31 @@ static int mt8195_afe_runtime_resume(struct device *dev)
 {
 	struct mtk_base_afe *afe = dev_get_drvdata(dev);
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
+	int ret;
 
-	mt8195_afe_enable_reg_rw_clk(afe);
+	ret = mt8195_afe_enable_reg_rw_clk(afe);
+	if (ret)
+		return ret;
 
 	if (!afe->regmap || afe_priv->pm_runtime_bypass_reg_ctl)
-		goto skip_regmap;
+		return 0;
 
 	regcache_cache_only(afe->regmap, false);
-	regcache_sync(afe->regmap);
+	ret = regcache_sync(afe->regmap);
+	if (ret)
+		goto err_restore_cache;
+
+	ret = mt8195_afe_enable_main_clock(afe);
+	if (ret)
+		goto err_restore_cache;
 
-	mt8195_afe_enable_main_clock(afe);
-skip_regmap:
 	return 0;
+
+err_restore_cache:
+	regcache_cache_only(afe->regmap, true);
+	mt8195_afe_disable_reg_rw_clk(afe);
+
+	return ret;
 }
 
 static int init_memif_priv_data(struct mtk_base_afe *afe)
Signature · 1 line
2.43.0
#14 lore raw

PATCH v2 8/14 ASoC: mediatek: mt8195: Remove redundant error message

In reply to [email protected]

From: bui duc phuc <[email protected]>

The errors handled here are already reported by the called functions, either directly or deeper in the call chain. Therefore, the additional dev_warn() and dev_err_probe() call is redundant and can be removed.

---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +4 -5
index bb357cc674cb..1bca2f62e76e 100644
@@ -3083,7 +3083,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	/* initial audio related clock */
 	ret = mt8195_afe_init_clock(afe);
 	if (ret)
-		return dev_err_probe(dev, ret, "init clock error\n");
+		return ret;
 
 	/* reset controller to reset audio regs before regmap cache */
 	rstc = devm_reset_control_get_exclusive(dev, "audiosys");
@@ -3130,7 +3130,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler,
 			       IRQF_TRIGGER_NONE, "asys-isr", (void *)afe);
 	if (ret)
-		return dev_err_probe(dev, ret, "could not request_irq for asys-isr\n");
+		return ret;
 
 	/* init sub_dais */
 	INIT_LIST_HEAD(&afe->sub_dais);
@@ -3188,10 +3188,9 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	/* register component */
 	ret = devm_snd_soc_register_component(dev, &mtk_afe_pcm_platform,
 					      afe->dai_drivers, afe->num_dai_drivers);
-	if (ret) {
-		dev_warn(dev, "err_platform\n");
+	if (ret)
 		goto err_pm_put;
-	}
+
 
 	ret = regmap_multi_reg_write(afe->regmap, mt8195_afe_reg_defaults,
 				     ARRAY_SIZE(mt8195_afe_reg_defaults));
Signature · 1 line
2.43.0
Reviewed-by on v2 8/14
#15 lore raw

Re: [PATCH v2 08/14] ASoC: mediatek: mt8195: Remove redundant error message

Quoted 7 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

The errors handled here are already reported by the called functions, either directly or deeper in the call chain. Therefore, the additional dev_warn() and dev_err_probe() call is redundant and can be removed.

LGTM

Quoted 39 lines
---
  sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 9 ++++-----
  1 file changed, 4 insertions(+), 5 deletions(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +4 -5
index bb357cc674cb..1bca2f62e76e 100644
@@ -3083,7 +3083,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
  	/* initial audio related clock */
  	ret = mt8195_afe_init_clock(afe);
  	if (ret)
-		return dev_err_probe(dev, ret, "init clock error\n");
+		return ret;
 
  	/* reset controller to reset audio regs before regmap cache */
  	rstc = devm_reset_control_get_exclusive(dev, "audiosys");
@@ -3130,7 +3130,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
  	ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler,
  			       IRQF_TRIGGER_NONE, "asys-isr", (void *)afe);
  	if (ret)
-		return dev_err_probe(dev, ret, "could not request_irq for asys-isr\n");
+		return ret;
 
  	/* init sub_dais */
  	INIT_LIST_HEAD(&afe->sub_dais);
@@ -3188,10 +3188,9 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
  	/* register component */
  	ret = devm_snd_soc_register_component(dev, &mtk_afe_pcm_platform,
  					      afe->dai_drivers, afe->num_dai_drivers);
-	if (ret) {
-		dev_warn(dev, "err_platform\n");
+	if (ret)
  		goto err_pm_put;
-	}
+
 
  	ret = regmap_multi_reg_write(afe->regmap, mt8195_afe_reg_defaults,
  				     ARRAY_SIZE(mt8195_afe_reg_defaults));
#16 lore raw

PATCH v2 9/14 ASoC: mediatek: mt8195: Propagate IRQ lookup errors

In reply to [email protected]

From: bui duc phuc <[email protected]>

Propagate the error returned by platform_get_irq() instead of replacing it with -ENXIO.

This preserves errors such as -EPROBE_DEFER for proper handling by the caller.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +1 -1
index 1bca2f62e76e..4ddf2114a1ab 100644
@@ -3125,7 +3125,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	/* request irq */
 	irq_id = platform_get_irq(pdev, 0);
 	if (irq_id < 0)
-		return -ENXIO;
+		return irq_id;
 
 	ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler,
 			       IRQF_TRIGGER_NONE, "asys-isr", (void *)afe);
Signature · 1 line
2.43.0
Reviewed-by on v2 9/14
#17 lore raw

Re: [PATCH v2 09/14] ASoC: mediatek: mt8195: Propagate IRQ lookup errors

Quoted 10 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Propagate the error returned by platform_get_irq() instead of replacing it with -ENXIO.

This preserves errors such as -EPROBE_DEFER for proper handling by the caller.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

LGTM

Quoted 17 lines
---
  sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +1 -1
index 1bca2f62e76e..4ddf2114a1ab 100644
@@ -3125,7 +3125,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
  	/* request irq */
  	irq_id = platform_get_irq(pdev, 0);
  	if (irq_id < 0)
-		return -ENXIO;
+		return irq_id;
 
  	ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler,
  			       IRQF_TRIGGER_NONE, "asys-isr", (void *)afe);
#18 lore raw

PATCH v2 10/14 ASoC: mediatek: mt8195: Fix ETDM MCLK error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Propagate errors from mt8195_afe_enable_clk() when enabling the ETDM MCLK instead of always returning success.

This allows callers to properly handle failures when enabling the MCLK.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +1 -3
index 1a20adb2cbf5..fba51c552eec 100644
@@ -1549,9 +1549,7 @@ static int mtk_dai_etdm_enable_mclk(struct mtk_base_afe *afe, int dai_id)
 	if (clkdiv_id < 0)
 		return -EINVAL;
 
-	mt8195_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);
-
-	return 0;
+	return mt8195_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);
 }
 
 static int mtk_dai_etdm_disable_mclk(struct mtk_base_afe *afe, int dai_id)
Signature · 1 line
2.43.0
Reviewed-by on v2 10/14
#19 lore raw

Re: [PATCH v2 10/14] ASoC: mediatek: mt8195: Fix ETDM MCLK error handling

Quoted 10 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Propagate errors from mt8195_afe_enable_clk() when enabling the ETDM MCLK instead of always returning success.

This allows callers to properly handle failures when enabling the MCLK.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")

LGTM

Quoted 19 lines
---
  sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +1 -3
index 1a20adb2cbf5..fba51c552eec 100644
@@ -1549,9 +1549,7 @@ static int mtk_dai_etdm_enable_mclk(struct mtk_base_afe *afe, int dai_id)
  	if (clkdiv_id < 0)
  		return -EINVAL;
 
-	mt8195_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);
-
-	return 0;
+	return mt8195_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);
  }
 
  static int mtk_dai_etdm_disable_mclk(struct mtk_base_afe *afe, int dai_id)
#20 lore raw

PATCH v2 11/14 ASoC: mediatek: mt8195: Fix ETDM startup error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when enabling the ETDM MCLK and clock gates during startup.

If enabling a clock fails, disable the clocks that were already enabled to keep the clock state balanced.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 50 ++++++++++++++++-----
 1 file changed, 40 insertions(+), 10 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +40 -10
index fba51c552eec..1270fcac6b3f 100644
@@ -1575,36 +1575,66 @@ static int mtk_dai_etdm_startup(struct snd_pcm_substream *substream,
 	int cg_id;
 	int mst_dai_id;
 	int slv_dai_id;
-	int i;
+	int i, ret;
 
 	if (is_cowork_mode(dai)) {
 		mst_dai_id = get_etdm_cowork_master_id(dai);
 		if (!mt8195_afe_etdm_is_valid(mst_dai_id))
 			return -EINVAL;
 
-		mtk_dai_etdm_enable_mclk(afe, mst_dai_id);
+		ret = mtk_dai_etdm_enable_mclk(afe, mst_dai_id);
+		if (ret)
+			return ret;
 		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(mst_dai_id);
-		if (cg_id >= 0)
-			mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (cg_id >= 0) {
+			ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+			if (ret)
+				goto err_disable_mclk;
+		}
 
 		mst_etdm_data = afe_priv->dai_priv[mst_dai_id];
 
 		for (i = 0; i < mst_etdm_data->cowork_slv_count; i++) {
 			slv_dai_id = mst_etdm_data->cowork_slv_id[i];
 			cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(slv_dai_id);
-			if (cg_id >= 0)
-				mt8195_afe_enable_clk(afe,
-						      afe_priv->clk[cg_id]);
+			if (cg_id >= 0) {
+				ret = mt8195_afe_enable_clk(afe,
+							    afe_priv->clk[cg_id]);
+				if (ret)
+					goto err_disable_slv_clk;
+			}
 		}
 	} else {
-		mtk_dai_etdm_enable_mclk(afe, dai->id);
+		ret = mtk_dai_etdm_enable_mclk(afe, dai->id);
+		if (ret)
+			return ret;
 
 		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(dai->id);
-		if (cg_id >= 0)
-			mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (cg_id >= 0) {
+			ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+			if (ret)
+				goto err_disable_mclk;
+		}
 	}
 
 	return 0;
+
+err_disable_slv_clk:
+	while (--i >= 0) {
+		slv_dai_id = mst_etdm_data->cowork_slv_id[i];
+		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(slv_dai_id);
+		if (cg_id >= 0)
+			mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+	}
+
+	cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(mst_dai_id);
+	if (cg_id >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+
+err_disable_mclk:
+	mtk_dai_etdm_disable_mclk(afe, is_cowork_mode(dai) ? mst_dai_id : dai->id);
+
+	return ret;
 }
 
 static void mtk_dai_etdm_shutdown(struct snd_pcm_substream *substream,
Signature · 1 line
2.43.0
Reviewed-by on v2 11/14
#21 lore raw

Re: [PATCH v2 11/14] ASoC: mediatek: mt8195: Fix ETDM startup error handling

Quoted 10 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Check and propagate errors when enabling the ETDM MCLK and clock gates during startup.

If enabling a clock fails, disable the clocks that were already enabled to keep the clock state balanced.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")

LGTM

Quoted 85 lines
---
  sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 50 ++++++++++++++++-----
  1 file changed, 40 insertions(+), 10 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +40 -10
index fba51c552eec..1270fcac6b3f 100644
@@ -1575,36 +1575,66 @@ static int mtk_dai_etdm_startup(struct snd_pcm_substream *substream,
  	int cg_id;
  	int mst_dai_id;
  	int slv_dai_id;
-	int i;
+	int i, ret;
 
  	if (is_cowork_mode(dai)) {
  		mst_dai_id = get_etdm_cowork_master_id(dai);
  		if (!mt8195_afe_etdm_is_valid(mst_dai_id))
  			return -EINVAL;
 
-		mtk_dai_etdm_enable_mclk(afe, mst_dai_id);
+		ret = mtk_dai_etdm_enable_mclk(afe, mst_dai_id);
+		if (ret)
+			return ret;
  		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(mst_dai_id);
-		if (cg_id >= 0)
-			mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (cg_id >= 0) {
+			ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+			if (ret)
+				goto err_disable_mclk;
+		}
 
  		mst_etdm_data = afe_priv->dai_priv[mst_dai_id];
 
  		for (i = 0; i < mst_etdm_data->cowork_slv_count; i++) {
  			slv_dai_id = mst_etdm_data->cowork_slv_id[i];
  			cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(slv_dai_id);
-			if (cg_id >= 0)
-				mt8195_afe_enable_clk(afe,
-						      afe_priv->clk[cg_id]);
+			if (cg_id >= 0) {
+				ret = mt8195_afe_enable_clk(afe,
+							    afe_priv->clk[cg_id]);
+				if (ret)
+					goto err_disable_slv_clk;
+			}
  		}
  	} else {
-		mtk_dai_etdm_enable_mclk(afe, dai->id);
+		ret = mtk_dai_etdm_enable_mclk(afe, dai->id);
+		if (ret)
+			return ret;
 
  		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(dai->id);
-		if (cg_id >= 0)
-			mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (cg_id >= 0) {
+			ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+			if (ret)
+				goto err_disable_mclk;
+		}
  	}
 
  	return 0;
+
+err_disable_slv_clk:
+	while (--i >= 0) {
+		slv_dai_id = mst_etdm_data->cowork_slv_id[i];
+		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(slv_dai_id);
+		if (cg_id >= 0)
+			mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+	}
+
+	cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(mst_dai_id);
+	if (cg_id >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+
+err_disable_mclk:
+	mtk_dai_etdm_disable_mclk(afe, is_cowork_mode(dai) ? mst_dai_id : dai->id);
+
+	return ret;
  }
 
  static void mtk_dai_etdm_shutdown(struct snd_pcm_substream *substream,
#22 lore raw

PATCH v2 12/14 ASoC: mediatek: mt8195: Fix HDMI TX startup error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when enabling the clock gate and MCLK during HDMI TX/DP TX startup.

If MCLK enabling fails, disable the clock gate that was already enabled before returning the error.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +15 -3
index 1270fcac6b3f..11317cdd14ab 100644
@@ -2321,13 +2321,25 @@ static int mtk_dai_hdmitx_dptx_startup(struct snd_pcm_substream *substream,
 	struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	int cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(dai->id);
+	int ret;
 
-	if (cg_id >= 0)
-		mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+	if (cg_id >= 0) {
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (ret)
+			return ret;
+	}
 
-	mtk_dai_etdm_enable_mclk(afe, dai->id);
+	ret = mtk_dai_etdm_enable_mclk(afe, dai->id);
+	if (ret)
+		goto err_disable_cg_clk;
 
 	return 0;
+
+err_disable_cg_clk:
+	if (cg_id >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+
+	return ret;
 }
 
 static void mtk_dai_hdmitx_dptx_shutdown(struct snd_pcm_substream *substream,
Signature · 1 line
2.43.0
#23 lore raw

PATCH v2 13/14 ASoC: mediatek: mt8195: Fix ETDM probe error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Use pm_runtime_resume_and_get() to properly handle runtime PM errors during ETDM probe.

Propagate errors from MCLK configuration and enabling instead of ignoring them.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 27 ++++++++++++++-------
 1 file changed, 18 insertions(+), 9 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +18 -9
index 11317cdd14ab..8fa830a57502 100644
@@ -2503,6 +2503,7 @@ static int mtk_dai_etdm_probe(struct snd_soc_dai *dai)
 	struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	struct mtk_dai_etdm_priv *etdm_data;
+	int ret;
 
 	dev_dbg(dai->dev, "%s id %d\n", __func__, dai->id);
 
@@ -2510,15 +2511,23 @@ static int mtk_dai_etdm_probe(struct snd_soc_dai *dai)
 		return -EINVAL;
 
 	etdm_data = afe_priv->dai_priv[dai->id];
-	if (etdm_data->mclk_freq) {
-		dev_dbg(afe->dev, "MCLK always on, rate %d\n",
-			etdm_data->mclk_freq);
-		pm_runtime_get_sync(afe->dev);
-		mtk_dai_etdm_mclk_configure(afe, dai->id);
-		mtk_dai_etdm_enable_mclk(afe, dai->id);
-		pm_runtime_put_sync(afe->dev);
-	}
-	return 0;
+	if (!etdm_data->mclk_freq)
+		return 0;
+
+	dev_dbg(afe->dev, "MCLK always on, rate %d\n",
+		etdm_data->mclk_freq);
+	ret = pm_runtime_resume_and_get(afe->dev);
+	if (ret)
+		return ret;
+	ret = mtk_dai_etdm_mclk_configure(afe, dai->id);
+	if (ret)
+		goto err_put_pm;
+	ret = mtk_dai_etdm_enable_mclk(afe, dai->id);
+
+err_put_pm:
+	pm_runtime_put_sync(afe->dev);
+
+	return ret;
 }
 
 static const struct snd_soc_dai_ops mtk_dai_hdmitx_dptx_ops = {
Signature · 1 line
2.43.0
#24 lore raw

PATCH v2 14/14 ASoC: mediatek: mt8195: Fix clock parent error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Propagate the error returned by mt8195_afe_set_clk_parent() instead of ignoring it.

This allows clock parent configuration failures to be properly handled by the caller.

Fixes 3de3eba588bb ("ASoC: mediatek: mt8195: support adda in platform driver")
---
 sound/soc/mediatek/mt8195/mt8195-dai-adda.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-adda.c +1 -2
index 94abde15ea09..8a58a142064d 100644
@@ -262,9 +262,8 @@ static int mtk_audio_hires_event(struct snd_soc_dapm_widget *w,
 	default:
 		return 0;
 	}
-	mt8195_afe_set_clk_parent(afe, clk, clk_parent);
 
-	return 0;
+	return mt8195_afe_set_clk_parent(afe, clk, clk_parent);
 }
 
 static struct mtk_dai_adda_priv *get_adda_priv_by_name(struct mtk_base_afe *afe,
Signature · 1 line
2.43.0
#25 lore raw

Re: [PATCH v2 14/14] ASoC: mediatek: mt8195: Fix clock parent error handling

Quoted 19 lines · On 10/5/2026 4:32 PM, [email protected] wrote:

From: bui duc phuc <[email protected]>

Propagate the error returned by mt8195_afe_set_clk_parent() instead of ignoring it.

This allows clock parent configuration failures to be properly handled by the caller.

Fixes 3de3eba588bb ("ASoC: mediatek: mt8195: support adda in platform driver")
---
  sound/soc/mediatek/mt8195/mt8195-dai-adda.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
sound/soc/mediatek/mt8195/mt8195-dai-adda.c +0 -0
index 94abde15ea09..8a58a142064d 100644

sound/soc/mediatek/mt8195/mt8195-dai-adda.c static int mtk_audio_hires_event(struct snd_soc_dapm_widget *w, · line 266

Quoted 7 lines
sound/soc/mediatek/mt8195/mt8195-dai-adda.c +1 -2
@@ -262,9 +262,8 @@ static int mtk_audio_hires_event(struct snd_soc_dapm_widget *w,
  	default:
  		return 0;
  	}
-	mt8195_afe_set_clk_parent(afe, clk, clk_parent);
 
-	return 0;
+	return mt8195_afe_set_clk_parent(afe, clk, clk_parent);

The commit message says this allows clock parent configuration failures to be properly handled by the caller, but I don't think the current DAPM event path propagates this error back to the operation that triggered the power change.

mtk_audio_hires_event() now returns the error from mt8195_afe_set_clk_parent(), but the caller in the DAPM core is dapm_seq_check_event(), which is a void helper. It logs a negative event
return with "event failed", but it does not return that error up through
the DAPM sequencing path.

So this looks like it improves error reporting, but not actual failure
handling/propagation. Was the intent only to get the DAPM error log here, or should the commit message/code be adjusted so the behavior matches the "properly handled by the caller" wording?

Thanks
Ajay Kumar Nandam

Quoted 3 lines
sound/soc/mediatek/mt8195/mt8195-dai-adda.c +0 -0
  }
 
  static struct mtk_dai_adda_priv *get_adda_priv_by_name(struct mtk_base_afe *afe,
#26 lore raw

Re: [PATCH v2 14/14] ASoC: mediatek: mt8195: Fix clock parent error handling

Quoted 4 lines

Was the intent only to get the DAPM error log
here, or should the commit message/code be adjusted so the behavior matches the "properly handled by the caller" wording?

The intent was only to get the error reported instead of silently ignored; the commit message wording was imprecise. I'll reword it in the next version.

Best regards,
Phuc