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add support for DWC UFS Controller

PATCH Superseded Joao Pinto 6 participants 25 messages Mar 31, 2016 – Apr 15, 2016

Subsystems (3)

v12 of 16 Superseded Latest is v16 →

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Joao Pinto

author
#0 lore raw

v12 cover add support for DWC UFS Controller

The work consisted of:
- Fixed typo in ufshcd-pltfrm.c
- Tweak ufshcd.c for UFS 2.0 support
- Implement ufshcd-dwc which contains all DWC HW specific code
- Unipro attributes were added and new registers were added to the driver
- Implement a tc-dwc-g210 containing G210 MPHY specific code
- Implement a tc-dwc-g210 glue platform driver
- Implement a tc-dwc-g210 glue pci driver
- Documentation update

Joao Pinto (9):
fixed typo in ufshcd-pltfrm
add UFS 2.0 to ufshcd-pltfrm bindings
added UFS 2.0 capabilities
added unipro attributes
added link status to ufshci
added support for DesignWare Controller
added support for Synopsys G210 Test Chip
add TC G210 platform driver
add TC G210 pci driver

 .../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt |  26 ++
 .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |   4 +-
 MAINTAINERS                                        |   6 +
 drivers/scsi/ufs/Kconfig                           |  25 ++
 drivers/scsi/ufs/Makefile                          |   4 +
 drivers/scsi/ufs/tc-dwc-g210-pci.c                 | 181 ++++++++++++
 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c              | 113 ++++++++
 drivers/scsi/ufs/tc-dwc-g210.c                     | 315 +++++++++++++++++++++
 drivers/scsi/ufs/tc-dwc-g210.h                     |  19 ++
 drivers/scsi/ufs/ufshcd-dwc.c                      | 150 ++++++++++
 drivers/scsi/ufs/ufshcd-dwc.h                      |  26 ++
 drivers/scsi/ufs/ufshcd-pltfrm.c                   |   2 +-
 drivers/scsi/ufs/ufshcd.c                          |  90 +++---
 drivers/scsi/ufs/ufshcd.h                          |   7 +
 drivers/scsi/ufs/ufshci-dwc.h                      |  36 +++
 drivers/scsi/ufs/ufshci.h                          |  11 +
 drivers/scsi/ufs/unipro.h                          |  39 +++
 17 files changed, 1010 insertions(+), 44 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pci.c
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210.c
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210.h
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
 create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
Signature · 1 line
1.8.1.5
author
#1 lore raw

PATCH v12 1/9 fixed typo in ufshcd-pltfrm

Fixed typo in ufshcd-pltfrm.

---
Changes v0->v12:
- Nothing changed (just to keep up with patch set version).

 drivers/scsi/ufs/ufshcd-pltfrm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/scsi/ufs/ufshcd-pltfrm.c +1 -1
index d2a7b12..0522891 100644
@@ -353,6 +353,6 @@ EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init);
 
 MODULE_AUTHOR("Santosh Yaragnavi <[email protected]>");
 MODULE_AUTHOR("Vinayak Holikatti <[email protected]>");
-MODULE_DESCRIPTION("UFS host controller Pltform bus based glue driver");
+MODULE_DESCRIPTION("UFS host controller Platform bus based glue driver");
 MODULE_LICENSE("GPL");
 MODULE_VERSION(UFSHCD_DRIVER_VERSION);
Signature · 1 line
1.8.1.5
author
#2 lore raw

PATCH v12 2/9 add UFS 2.0 to ufshcd-pltfrm bindings

In reply to Joao Pinto

Add UFS 2.0 to the ufshcd-pltfrm devicetree binding.

---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12

 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +2 -2
index 03c0e98..8d9a9d2 100644
@@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
 Each UFS controller instance should have its own node.
 
 Required properties:
-- compatible		: must contain "jedec,ufs-1.1", may also list one or more
-					  of the following:
+- compatible		: must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
+			  also list one or more of the following:
 					  "qcom,msm8994-ufshc"
 					  "qcom,msm8996-ufshc"
 					  "qcom,ufshc"
Signature · 1 line
1.8.1.5
maintainer Acked-by on v12 2/9
#3 lore raw

Re: [PATCH v12 2/9] add UFS 2.0 to ufshcd-pltfrm bindings

Quoted 9 lines · Joao Pinto

Add UFS 2.0 to the ufshcd-pltfrm devicetree binding.

---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12

 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
author
#4 lore raw

PATCH v12 3/9 added UFS 2.0 capabilities

In reply to Joao Pinto

Adding UFS 2.0 support to the UFS core driver.

---
Changes v11->v12 (Tomas Winkler):
- devicetree binding tweak was moved to a separated patch
- unipro tweaks were moved to a separated patch
- ufshcd_compose_upiu was decomposed in 2 functions
- UTP_CMD_TYPE_UFS_STORAGE is now 0x1 (previously was 0x11) Changes v8->v11:
- Nothing changed (just to keep up with patch set version). Changes v7->v8:
- Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
- Nothing changed (just to keep up with patch set version).

 drivers/scsi/ufs/ufshcd.c | 90 ++++++++++++++++++++++++++---------------------
 drivers/scsi/ufs/ufshci.h |  5 +++
 2 files changed, 54 insertions(+), 41 deletions(-)
drivers/scsi/ufs/ufshcd.c +48 -41
index 9c1b94b..a69d637 100644
@@ -1127,7 +1127,7 @@ static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
  * @cmd_dir: requests data direction
  */
 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
-		u32 *upiu_flags, enum dma_data_direction cmd_dir)
+			u32 *upiu_flags, enum dma_data_direction cmd_dir)
 {
 	struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
 	u32 data_direction;
@@ -1253,47 +1253,55 @@ static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
 }
 
 /**
- * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
+ * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU) 
+ *			     for Device Management Purposes
  * @hba - per adapter instance
  * @lrb - pointer to local reference block
  */
-static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
+static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
 {
 	u32 upiu_flags;
 	int ret = 0;
 
-	switch (lrbp->command_type) {
-	case UTP_CMD_TYPE_SCSI:
-		if (likely(lrbp->cmd)) {
-			ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
-					lrbp->cmd->sc_data_direction);
-			ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
-		} else {
-			ret = -EINVAL;
-		}
-		break;
-	case UTP_CMD_TYPE_DEV_MANAGE:
-		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
-		if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
-			ufshcd_prepare_utp_query_req_upiu(
-					hba, lrbp, upiu_flags);
-		else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
-			ufshcd_prepare_utp_nop_upiu(lrbp);
-		else
-			ret = -EINVAL;
-		break;
-	case UTP_CMD_TYPE_UFS:
-		/* For UFS native command implementation */
-		ret = -ENOTSUPP;
-		dev_err(hba->dev, "%s: UFS native command are not supported\n",
-			__func__);
-		break;
-	default:
-		ret = -ENOTSUPP;
-		dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
-				__func__, lrbp->command_type);
-		break;
-	} /* end of switch */
+	if (hba->ufs_version == UFSHCI_VERSION_20)
+		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+	else
+		lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
+	ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
+	if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
+		ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
+	else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
+		ufshcd_prepare_utp_nop_upiu(lrbp);
+	else
+		ret = -EINVAL;
+
+	return ret;
+}
+
+/**
+ * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU) 
+ *			   for SCSI Purposes
+ * @hba - per adapter instance
+ * @lrb - pointer to local reference block
+ */
+static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
+{
+	u32 upiu_flags;
+	int ret = 0;
+
+	if (hba->ufs_version == UFSHCI_VERSION_20)
+		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+	else
+		lrbp->command_type = UTP_CMD_TYPE_SCSI;
+
+	if (likely(lrbp->cmd)) {
+		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
+						lrbp->cmd->sc_data_direction);
+		ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
+	} else {
+		ret = -EINVAL;
+	}
 
 	return ret;
 }
@@ -1405,10 +1414,9 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 	lrbp->task_tag = tag;
 	lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
 	lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
-	lrbp->command_type = UTP_CMD_TYPE_SCSI;
 
-	/* form UPIU before issuing the command */
-	ufshcd_compose_upiu(hba, lrbp);
+	ufshcd_comp_scsi_upiu(hba, lrbp);
+
 	err = ufshcd_map_sg(lrbp);
 	if (err) {
 		lrbp->cmd = NULL;
@@ -1433,11 +1441,10 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
 	lrbp->sense_buffer = NULL;
 	lrbp->task_tag = tag;
 	lrbp->lun = 0; /* device management cmd is not specific to any LUN */
-	lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
 	lrbp->intr_cmd = true; /* No interrupt aggregation */
 	hba->dev_cmd.type = cmd_type;
 
-	return ufshcd_compose_upiu(hba, lrbp);
+	return ufshcd_comp_devman_upiu(hba, lrbp);
 }
 
 static int
@@ -3403,7 +3410,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
 			/* Do not touch lrbp after scsi done */
 			cmd->scsi_done(cmd);
 			__ufshcd_release(hba);
-		} else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
+		} else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
+			lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
 			if (hba->dev_cmd.complete)
 				complete(hba->dev_cmd.complete);
 		}
drivers/scsi/ufs/ufshci.h +5 -0
index 0ae0967..20ece18 100644
@@ -275,6 +275,11 @@ enum {
 	UTP_CMD_TYPE_DEV_MANAGE		= 0x2,
 };
 
+/* To accomodate UFS2.0 required Command type */
+enum {
+	UTP_CMD_TYPE_UFS_STORAGE	= 0x1,
+};
+
 enum {
 	UTP_SCSI_COMMAND		= 0x00000000,
 	UTP_NATIVE_UFS_COMMAND		= 0x10000000,
Signature · 1 line
1.8.1.5
#5 lore raw

Re: [PATCH v12 3/9] added UFS 2.0 capabilities

Quoted 3 lines · Joao Pinto

Adding UFS 2.0 support to the UFS core driver.

Looks good to me, though not tested yet
Tomas

Quoted 196 lines

---
Changes v11->v12 (Tomas Winkler):
- devicetree binding tweak was moved to a separated patch
- unipro tweaks were moved to a separated patch
- ufshcd_compose_upiu was decomposed in 2 functions
- UTP_CMD_TYPE_UFS_STORAGE is now 0x1 (previously was 0x11) Changes v8->v11:
- Nothing changed (just to keep up with patch set version). Changes v7->v8:
- Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
- Nothing changed (just to keep up with patch set version).

 drivers/scsi/ufs/ufshcd.c | 90 ++++++++++++++++++++++++++-----------
----------
 drivers/scsi/ufs/ufshci.h |  5 +++
 2 files changed, 54 insertions(+), 41 deletions(-)
drivers/scsi/ufs/ufshcd.c +1 -1
index 9c1b94b..a69d637 100644
@@ -1127,7 +1127,7 @@ static void ufshcd_disable_intr(struct ufs_hba
 *hba, u32 intrs)
  * @cmd_dir: requests data direction
  */
 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
-		u32 *upiu_flags, enum dma_data_direction cmd_dir)
+			u32 *upiu_flags, enum dma_data_direction
 cmd_dir)
 {
drivers/scsi/ufs/ufshcd.c +3 -33
 	struct utp_transfer_req_desc *req_desc = lrbp
->utr_descriptor_ptr;
 	u32 data_direction;
@@ -1253,47 +1253,55 @@ static inline void
 ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
 }
 
 /**
- * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
+ * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU) 
+ *			     for Device Management Purposes
  * @hba - per adapter instance
  * @lrb - pointer to local reference block
  */
-static int ufshcd_compose_upiu(struct ufs_hba *hba, struct
 ufshcd_lrb *lrbp)
+static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct
 ufshcd_lrb *lrbp)
 {
 	u32 upiu_flags;
 	int ret = 0;
 
-	switch (lrbp->command_type) {
-	case UTP_CMD_TYPE_SCSI:
-		if (likely(lrbp->cmd)) {
-			ufshcd_prepare_req_desc_hdr(lrbp,
 &upiu_flags,
-					lrbp->cmd
->sc_data_direction);
-			ufshcd_prepare_utp_scsi_cmd_upiu(lrbp,
 upiu_flags);
-		} else {
-			ret = -EINVAL;
-		}
-		break;
-	case UTP_CMD_TYPE_DEV_MANAGE:
-		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
 DMA_NONE);
-		if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
-			ufshcd_prepare_utp_query_req_upiu(
-					hba, lrbp, upiu_flags);
-		else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
-			ufshcd_prepare_utp_nop_upiu(lrbp);
-		else
-			ret = -EINVAL;
-		break;
-	case UTP_CMD_TYPE_UFS:
-		/* For UFS native command implementation */
-		ret = -ENOTSUPP;
-		dev_err(hba->dev, "%s: UFS native command are not
 supported\n",
-			__func__);
-		break;
-	default:
-		ret = -ENOTSUPP;
-		dev_err(hba->dev, "%s: unknown command type:

0x%x\n",

drivers/scsi/ufs/ufshcd.c +8 -3
-				__func__, lrbp->command_type);
-		break;
-	} /* end of switch */
+	if (hba->ufs_version == UFSHCI_VERSION_20)
+		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+	else
+		lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
+	ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
+	if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
+		ufshcd_prepare_utp_query_req_upiu(hba, lrbp,

upiu_flags);

drivers/scsi/ufs/ufshcd.c +15 -0
+	else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
+		ufshcd_prepare_utp_nop_upiu(lrbp);
+	else
+		ret = -EINVAL;
+
+	return ret;
+}
+
+/**
+ * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU) 
+ *			   for SCSI Purposes
+ * @hba - per adapter instance
+ * @lrb - pointer to local reference block
+ */
+static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct

ufshcd_lrb *lrbp)

drivers/scsi/ufs/ufshcd.c +18 -4
+{
+	u32 upiu_flags;
+	int ret = 0;
+
+	if (hba->ufs_version == UFSHCI_VERSION_20)
+		lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+	else
+		lrbp->command_type = UTP_CMD_TYPE_SCSI;
+
+	if (likely(lrbp->cmd)) {
+		ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
+						lrbp->cmd
->sc_data_direction);
+		ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
+	} else {
+		ret = -EINVAL;
+	}
 
 	return ret;
 }
@@ -1405,10 +1414,9 @@ static int ufshcd_queuecommand(struct
 Scsi_Host *host, struct scsi_cmnd *cmd)
 	lrbp->task_tag = tag;
 	lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
 	lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true :
 false;
-	lrbp->command_type = UTP_CMD_TYPE_SCSI;
 
-	/* form UPIU before issuing the command */
-	ufshcd_compose_upiu(hba, lrbp);
+	ufshcd_comp_scsi_upiu(hba, lrbp);
+
 	err = ufshcd_map_sg(lrbp);
drivers/scsi/ufs/ufshcd.c +0 -0
 	if (err) {
 		lrbp->cmd = NULL;
@@ -1433,11 +1441,10 @@ static int ufshcd_compose_dev_cmd(struct
 ufs_hba *hba,
 	lrbp->sense_buffer = NULL;
 	lrbp->task_tag = tag;
 	lrbp->lun = 0; /* device management cmd is not specific to

any LUN */

drivers/scsi/ufs/ufshcd.c +2 -3
-	lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
 	lrbp->intr_cmd = true; /* No interrupt aggregation */
 	hba->dev_cmd.type = cmd_type;
 
-	return ufshcd_compose_upiu(hba, lrbp);
+	return ufshcd_comp_devman_upiu(hba, lrbp);
 }
 
 static int
@@ -3403,7 +3410,8 @@ static void ufshcd_transfer_req_compl(struct
 ufs_hba *hba)
 			/* Do not touch lrbp after scsi done */
 			cmd->scsi_done(cmd);
 			__ufshcd_release(hba);
-		} else if (lrbp->command_type ==
 UTP_CMD_TYPE_DEV_MANAGE) {
+		} else if (lrbp->command_type ==

UTP_CMD_TYPE_DEV_MANAGE ||

drivers/scsi/ufs/ufshcd.c +1 -0
+			lrbp->command_type ==

UTP_CMD_TYPE_UFS_STORAGE) {

drivers/scsi/ufs/ufshcd.c +0 -0
 			if (hba->dev_cmd.complete)
 				complete(hba->dev_cmd.complete);
 		}
drivers/scsi/ufs/ufshci.h +5 -0
index 0ae0967..20ece18 100644
@@ -275,6 +275,11 @@ enum {
 	UTP_CMD_TYPE_DEV_MANAGE		= 0x2,
 };
 
+/* To accomodate UFS2.0 required Command type */
+enum {
+	UTP_CMD_TYPE_UFS_STORAGE	= 0x1,
+};
+
 enum {
 	UTP_SCSI_COMMAND		= 0x00000000,
 	UTP_NATIVE_UFS_COMMAND		= 0x10000000,
author
#6 lore raw

Re: [PATCH v12 3/9] added UFS 2.0 capabilities

Quoted 7 lines · Tomas
Quoted 3 lines · Joao Pinto

Adding UFS 2.0 support to the UFS core driver.

Looks good to me, though not tested yet
Tomas

I have tested the build in a x86 and ARC. Also tested the functionality by using a HAPS-DX FPGA with the UFS 2.0 design + MPHY G210.

Quoted 6 lines
Quoted 6 lines

---
Changes v11->v12 (Tomas Winkler):
- devicetree binding tweak was moved to a separated patch
- unipro tweaks were moved to a separated patch
- ufshcd_compose_upiu was decomposed in 2 functions

[snip]

Quoted 7 lines

drivers/scsi/ufs/ufshci.h enum { · line 285

Quoted 7 lines
drivers/scsi/ufs/ufshci.h +4 -0
+enum {
+	UTP_CMD_TYPE_UFS_STORAGE	= 0x1,
+};
+
 enum {
 	UTP_SCSI_COMMAND		= 0x00000000,
 	UTP_NATIVE_UFS_COMMAND		= 0x10000000,

If you need anything else, please let me know.

Thanks.
Joao

author
#7 lore raw

PATCH v12 4/9 added unipro attributes

In reply to Joao Pinto

Added unipro attributes.

---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12

 drivers/scsi/ufs/unipro.h | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
drivers/scsi/ufs/unipro.h +39 -0
index 816a8a4..da16254 100644
@@ -35,6 +35,10 @@
 #define TX_LCC_SEQUENCER			0x0032
 #define TX_MIN_ACTIVATETIME			0x0033
 #define TX_PWM_G6_G7_SYNC_LENGTH		0x0034
+#define TX_REFCLKFREQ				0x00EB
+#define TX_CFGCLKFREQVAL			0x00EC
+#define	CFGEXTRATTR				0x00F0
+#define DITHERCTRL2				0x00F1
 
 /*
  * M-RX Configuration Attributes
@@ -48,8 +52,38 @@
 #define RX_ENTER_HIBERN8			0x00A7
 #define RX_BYPASS_8B10B_ENABLE			0x00A8
 #define RX_TERMINATION_FORCE_ENABLE		0x0089
+#define RX_REFCLKFREQ				0x00EB
+#define	RX_CFGCLKFREQVAL			0x00EC
+#define CFGWIDEINLN				0x00F0
+#define CFGRXCDR8				0x00BA
+#define ENARXDIRECTCFG4				0x00F2
+#define CFGRXOVR8				0x00BD
+#define RXDIRECTCTRL2				0x00C7
+#define ENARXDIRECTCFG3				0x00F3
+#define RXCALCTRL				0x00B4
+#define ENARXDIRECTCFG2				0x00F4
+#define CFGRXOVR4				0x00E9
+#define RXSQCTRL				0x00B5
+#define CFGRXOVR6				0x00BF
 
 #define is_mphy_tx_attr(attr)			(attr < RX_MODE)
+
+/*
+ * Common Block Attributes
+ */
+#define TX_GLOBALHIBERNATE			UNIPRO_CB_OFFSET(0x002B)
+#define REFCLKMODE				UNIPRO_CB_OFFSET(0x00BF)
+#define DIRECTCTRL19				UNIPRO_CB_OFFSET(0x00CD)
+#define DIRECTCTRL10				UNIPRO_CB_OFFSET(0x00E6)
+#define CDIRECTCTRL6				UNIPRO_CB_OFFSET(0x00EA)
+#define RTOBSERVESELECT				UNIPRO_CB_OFFSET(0x00F0)
+#define CBDIVFACTOR				UNIPRO_CB_OFFSET(0x00F1)
+#define CBDCOCTRL5				UNIPRO_CB_OFFSET(0x00F3)
+#define CBPRGPLL2				UNIPRO_CB_OFFSET(0x00F8)
+#define CBPRGTUNING				UNIPRO_CB_OFFSET(0x00FB)
+
+#define UNIPRO_CB_OFFSET(x)			(0x8000 | x)
+
 /*
  * PHY Adpater attributes
  */
@@ -110,6 +144,11 @@
 #define PA_STALLNOCONFIGTIME	0x15A3
 #define PA_SAVECONFIGTIME	0x15A4
 
+/*Other attributes*/
+#define VS_MPHYCFGUPDT		0xD085
+#define VS_DEBUGOMC		0xD09E
+#define VS_POWERSTATE		0xD083
+
 /* PA power modes */
 enum {
 	FAST_MODE	= 1,
Signature · 1 line
1.8.1.5
author
#8 lore raw

PATCH v12 5/9 added link status to ufshci

In reply to Joao Pinto

Added link status to ufshci.

---
Changes v0->v12 (Tomas Winkler):
- This patch only appeared in v12

 drivers/scsi/ufs/ufshci.h | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/scsi/ufs/ufshci.h +6 -0
index 20ece18..169363e 100644
@@ -216,6 +216,12 @@ enum {
 #define UIC_ARG_ATTR_TYPE(t)		(((t) & 0xFF) << 16)
 #define UIC_GET_ATTR_ID(v)		(((v) >> 16) & 0xFFFF)
 
+/* Link Status*/
+enum link_status {
+	UFSHCD_LINK_IS_DOWN	= 1,
+	UFSHCD_LINK_IS_UP	= 2,
+};
+
 /* UIC Commands */
 enum uic_cmd_dme {
 	UIC_CMD_DME_GET			= 0x01,
Signature · 6 lines
1.8.1.5

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author
#9 lore raw

PATCH v12 6/9 added support for DesignWare Controller

In reply to Joao Pinto

This patch has the goal to add support for DesignWare UFS Controller specific operations.

---
Changes v11->v12 (Tomas Winkler):
- custom_phy_initialization is now phy_initialization
- ufshcd_is_intr_aggr_allowed() has now a DWC tweak
- link status was now moved to a separated patch
Changes v10->v11:
- Nothing changed (just to keep up with patch set version). Changes v9->v10 (Arnd Bergmann):
- Patch now only has DWC controller specific code
- Added custom_phy_initialization callback for PHY specific code Changes v8->v9 (Robert Herring):
- drop 0x in the node declaration
- most specific compatibility string declared first
Changes v7->v8 (Akinobu Mita):
- DME sets were simplified for easier reading
- CLK DIV default values definitions names were changed to match the register's name
- New line added to dev_err and dev_info statements
Changes v6->v7 (Arnd Bergmann):
- Changed DT node name (to ufs only) and the memory address (to 0xd000000)
- Removed CONFIG_PM from the PCI glue driver (pm.h already does this)
- No other changes are necessary in ufshcd.c because of the link up notify function usage (it is simpler now)
- Removed the PHY mentioning since the Test Chip is not a real PHY for real world usage, since it is a test chip for prototyping with a very specific usage
- Added again the Test Chip 20-bit option
Changes v5->v6:
- Patch bad format fixed
Changes v4->v5 (Akinobu Mita):
- All functions used only locally in ufshcd-dwc are now declared as static
- ufshcd_dwc_configuration() was removed in ufshcd-dwc and a notify function (ufshcd_dwc_link_startup_notify) was created to deal with the DWC specific init routines
- 20-bit RMMI option was removed from Kconfig. Now if MPHY TC is selected and 40-bit is not then it assumes a 20-bit config
Changes v3->v4 (Arnd Bergmann and Mark Rutland):
- SCSI_UFS_DWC_HOOKS is now silent and selected by the SCSI_UFS_DWC_PLAT or SCSI_UFS_DWC_PCI
- Compatibility string has the ufs core version for info purposes since the driver is capable of getting the controller version from its registers
- Created ufs-dwc-pci glue driver with specific DWC data
- MPHY configuration remains in the ufshcd-dwc since it is unipro attribute writting only not following the a linux phy framework logic
Changes v2->v3 (Julian Calaby):
- Implement a common DWC code to be used by the platform and pci glue drivers
- Synopsys ID & Class added to the existing pci driver and specific DWC was also added to the pci driver
Changes v1->v2 (Akinobu Mita):
- Implement a platform driver that uses the existing UFS core driver
- Add DWC specific code to the existing UFS core driver

 MAINTAINERS                   |   6 ++
 drivers/scsi/ufs/Kconfig      |   3 +
 drivers/scsi/ufs/Makefile     |   1 +
 drivers/scsi/ufs/ufshcd-dwc.c | 150 ++++++++++++++++++++++++++++++++++++++++++
 drivers/scsi/ufs/ufshcd-dwc.h |  26 ++++++++
 drivers/scsi/ufs/ufshcd.h     |   7 ++
 drivers/scsi/ufs/ufshci-dwc.h |  36 ++++++++++
 7 files changed, 229 insertions(+)
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
 create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
 create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
MAINTAINERS +6 -0
index 32bafda..7fc2730 100644
@@ -11408,6 +11408,12 @@ S:	Supported
 F:	Documentation/scsi/ufs.txt
 F:	drivers/scsi/ufs/
 
+UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER DWC HOOKS
+M:	Joao Pinto <[email protected]>
+L:	[email protected]
+S:	Supported
+F:	drivers/scsi/ufs/*dwc*
+
 UNSORTED BLOCK IMAGES (UBI)
 M:	Artem Bityutskiy <[email protected]>
 M:	Richard Weinberger <[email protected]>
drivers/scsi/ufs/Kconfig +3 -0
index 5f45307..647c324 100644
@@ -83,3 +83,6 @@ config SCSI_UFS_QCOM
 
 	  Select this if you have UFS controller on QCOM chipset.
 	  If unsure, say N.
+
+config SCSI_UFS_DWC
+	bool
drivers/scsi/ufs/Makefile +1 -0
index 8303bcc..ccbad53 100644
@@ -1,4 +1,5 @@
 # UFSHCD makefile
+obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
drivers/scsi/ufs/ufshcd-dwc.c new file +150 -0

150 lines not on this page · raw message

drivers/scsi/ufs/ufshcd-dwc.h new file +26 -0
new file mode 100644
index 0000000..c8be295
@@ -0,0 +1,26 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCD_DWC_H
+#define _UFSHCD_DWC_H
+
+struct ufshcd_dme_attr_val {
+	u32 attr_sel;
+	u32 mib_val;
+	u8 peer;
+};
+
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+					enum ufs_notify_change_status status);
+int ufshcd_dwc_dme_set_attrs(struct ufs_hba *hba,
+				const struct ufshcd_dme_attr_val *v, int n);
+#endif /* End of Header */
drivers/scsi/ufs/ufshcd.h +7 -0
index e3931d0..c780d14 100644
@@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
  * @suspend: called during host controller PM callback
  * @resume: called during host controller PM callback
  * @dbg_register_dump: used to dump controller debug information
+ * @phy_initialization: used to initialize phys
  */
 struct ufs_hba_variant_ops {
 	const char *name;
@@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
 	int     (*suspend)(struct ufs_hba *, enum ufs_pm_op);
 	int     (*resume)(struct ufs_hba *, enum ufs_pm_op);
 	void	(*dbg_register_dump)(struct ufs_hba *hba);
+	int	(*phy_initialization)(struct ufs_hba *);
 };
 
 /* clock gating state  */
@@ -555,11 +557,16 @@ static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
 
 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
 {
+/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
+#ifndef CONFIG_SCSI_UFS_DWC
 	if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
 	    !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
 		return true;
 	else
 		return false;
+#else
+return true;
+#endif
 }
 
 #define ufshcd_writel(hba, val, reg)	\
drivers/scsi/ufs/ufshci-dwc.h new file +36 -0
new file mode 100644
index 0000000..ca341fe
@@ -0,0 +1,36 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCI_DWC_H
+#define _UFSHCI_DWC_H
+
+/* DWC HC UFSHCI specific Registers */
+enum dwc_specific_registers {
+	DWC_UFS_REG_HCLKDIV	= 0xFC,
+};
+
+/* Clock Divider Values: Hex equivalent of frequency in MHz */
+enum clk_div_values {
+	DWC_UFS_REG_HCLKDIV_DIV_62_5	= 0x3e,
+	DWC_UFS_REG_HCLKDIV_DIV_125	= 0x7d,
+	DWC_UFS_REG_HCLKDIV_DIV_200	= 0xc8,
+};
+
+/* Selector Index */
+enum selector_index {
+	SELIND_LN0_TX		= 0x00,
+	SELIND_LN1_TX		= 0x01,
+	SELIND_LN0_RX		= 0x04,
+	SELIND_LN1_RX		= 0x05,
+};
+
+#endif /* End of Header */
Signature · 1 line
1.8.1.5
#10 lore raw

Re: [PATCH v14 6/9] added support for DesignWare Controller

Hi Joao,

2016-04-13 18:04 GMT+09:00 Joao Pinto <[email protected]>:

Quoted 13 lines
drivers/scsi/ufs/ufshcd.h +1 -0
index e3931d0..c780d14 100644
@@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
  * @suspend: called during host controller PM callback
  * @resume: called during host controller PM callback
  * @dbg_register_dump: used to dump controller debug information
+ * @phy_initialization: used to initialize phys
  */
 struct ufs_hba_variant_ops {
        const char *name;

drivers/scsi/ufs/ufshcd.h struct ufs_hba_variant_ops { · line 289

Quoted 5 lines
drivers/scsi/ufs/ufshcd.h +1 -0
@@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
        int     (*suspend)(struct ufs_hba *, enum ufs_pm_op);
        int     (*resume)(struct ufs_hba *, enum ufs_pm_op);
        void    (*dbg_register_dump)(struct ufs_hba *hba);
+       int     (*phy_initialization)(struct ufs_hba *);
 };

This vops->phy_initialization is only called from ufs dwc specific source files and not called from ufs core. So this should not belong to ufs_hba_variant_ops.

You can use hba->priv to put the controller specific data structure including phy_initialization and you also need to define vops->init callback which allocates and initialize the data structure.

author
#11 lore raw

Re: [PATCH v14 6/9] added support for DesignWare Controller

Hi Akinobu,

Quoted 18 lines · Akinobu Mita

Hi Joao,

2016-04-13 18:04 GMT+09:00 Joao Pinto <[email protected]>:

Quoted 14 lines
drivers/scsi/ufs/ufshcd.h +1 -0
index e3931d0..c780d14 100644
@@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
  * @suspend: called during host controller PM callback
  * @resume: called during host controller PM callback
  * @dbg_register_dump: used to dump controller debug information
+ * @phy_initialization: used to initialize phys
  */
 struct ufs_hba_variant_ops {
        const char *name;
@@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
        int     (*suspend)(struct ufs_hba *, enum ufs_pm_op);
Quoted 8 lines

drivers/scsi/ufs/ufshcd.h struct ufs_hba_variant_ops { · line 289

Quoted 4 lines
drivers/scsi/ufs/ufshcd.h +1 -0
        int     (*resume)(struct ufs_hba *, enum ufs_pm_op);
        void    (*dbg_register_dump)(struct ufs_hba *hba);
+       int     (*phy_initialization)(struct ufs_hba *);
 };

This vops->phy_initialization is only called from ufs dwc specific source files and not called from ufs core. So this should not belong to ufs_hba_variant_ops.

At this time only DWC specific uses the phy_initialization, but can be used by others in the future when the same necessity comes.

Quoted 5 lines

You can use hba->priv to put the controller specific data structure including phy_initialization and you also need to define vops->init callback which allocates and initialize the data structure.

Joao

#12 lore raw

Re: [PATCH v14 6/9] added support for DesignWare Controller

Hi Joao,

2016-04-13 21:57 GMT+09:00 Joao Pinto <[email protected]>:

Quoted 31 lines

Hi Akinobu,

Quoted 18 lines · Akinobu Mita

Hi Joao,

2016-04-13 18:04 GMT+09:00 Joao Pinto <[email protected]>:

Quoted 14 lines
drivers/scsi/ufs/ufshcd.h +1 -0
index e3931d0..c780d14 100644
@@ -263,6 +263,7 @@ struct ufs_pwr_mode_info {
  * @suspend: called during host controller PM callback
  * @resume: called during host controller PM callback
  * @dbg_register_dump: used to dump controller debug information
+ * @phy_initialization: used to initialize phys
  */
 struct ufs_hba_variant_ops {
        const char *name;
@@ -284,6 +285,7 @@ struct ufs_hba_variant_ops {
        int     (*suspend)(struct ufs_hba *, enum ufs_pm_op);
Quoted 8 lines

drivers/scsi/ufs/ufshcd.h struct ufs_hba_variant_ops { · line 289

Quoted 4 lines
drivers/scsi/ufs/ufshcd.h +1 -0
        int     (*resume)(struct ufs_hba *, enum ufs_pm_op);
        void    (*dbg_register_dump)(struct ufs_hba *hba);
+       int     (*phy_initialization)(struct ufs_hba *);
 };

This vops->phy_initialization is only called from ufs dwc specific source files and not called from ufs core. So this should not belong to ufs_hba_variant_ops.

Quoted 2 lines

At this time only DWC specific uses the phy_initialization, but can be used by others in the future when the same necessity comes.

But vops->phy_initialization is only called from DWC specific vops->link_startup_notify. So I think there is no point adding new callback to vops.

Quoted 3 lines
Quoted 3 lines

You can use hba->priv to put the controller specific data structure including phy_initialization and you also need to define vops->init callback which allocates and initialize the data structure.

Or you can create another vops which have different link_startup_notify because phy_initialization is only called from link_starup_notify.

author
#13 lore raw

PATCH v12 7/9 added support for Synopsys G210 Test Chip

In reply to Joao Pinto

This patch adds support for Synopsys G210 Test Chip.

---
Changes v10->v12:
- Nothing changed (just to keep up with patch set version). Changes v0->v10:
- This patch only appeared in v10

 drivers/scsi/ufs/Kconfig       |   4 +
 drivers/scsi/ufs/Makefile      |   1 +
 drivers/scsi/ufs/tc-dwc-g210.c | 315 +++++++++++++++++++++++++++++++++++++++++
 drivers/scsi/ufs/tc-dwc-g210.h |  19 +++
 4 files changed, 339 insertions(+)
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210.c
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210.h
drivers/scsi/ufs/Kconfig +4 -0
index 647c324..9d218f9 100644
@@ -86,3 +86,7 @@ config SCSI_UFS_QCOM
 
 config SCSI_UFS_DWC
 	bool
+
+config SCSI_UFS_DWC_TC
+	bool
+	select SCSI_UFS_DWC
drivers/scsi/ufs/Makefile +1 -0
index ccbad53..9468d7b 100644
@@ -1,5 +1,6 @@
 # UFSHCD makefile
 obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
drivers/scsi/ufs/tc-dwc-g210.c new file +315 -0

315 lines not on this page · raw message

drivers/scsi/ufs/tc-dwc-g210.h new file +19 -0
new file mode 100644
index 0000000..fb177db
@@ -0,0 +1,19 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _TC_DWC_G210_H
+#define _TC_DWC_G210_H
+
+int tc_dwc_g210_config_40_bit(struct ufs_hba *hba);
+int tc_dwc_g210_config_20_bit(struct ufs_hba *hba);
+
+#endif /* End of Header */
Signature · 1 line
1.8.1.5
author
#14 lore raw

PATCH v12 8/9 add TC G210 platform driver

In reply to Joao Pinto

This patch adds a glue platform driver for the Synopsys G210 Test Chip.

---
Changes v11->v12 (Tomas Winkler):
- custom_phy_initialization replaced by phy_initialization Changes v10->v11 (Arnd Bergmann):
- vops structs are now passed in .data
Changes v0->v10:
- This patch only appeared in v10

 .../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt |  26 +++++
 drivers/scsi/ufs/Kconfig                           |   9 ++
 drivers/scsi/ufs/Makefile                          |   1 +
 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c              | 113 +++++++++++++++++++++
 4 files changed, 149 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +26 -0
new file mode 100644
index 0000000..6ec9647
@@ -0,0 +1,26 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+
+DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible	: compatible list must contain the PHY type & version:
+			"snps, g210-tc-6.00-20bit"
+			"snps, g210-tc-6.00-40bit"
+		  complemented with the Controller IP version:
+			"snps, dwc-ufshcd-1.40a"
+		  complemented with the JEDEC version:
+			"jedec,ufs-1.1"
+			"jedec,ufs-2.0"
+
+- reg		: <registers mapping>
+- interrupts	: <interrupt mapping for UFS host controller IRQ>
+
+Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
+	dwc_ufs@d0000000 {
+		compatible = "snps, g210-tc-6.00-40bit",
+			     "snps, dwc-ufshcd-1.40a",
+			     "jedec,ufs-2.0";
+		reg = < 0xd0000000 0x10000 >;
+		interrupts = < 24 >;
+	};
drivers/scsi/ufs/Kconfig +9 -0
index 9d218f9..5cfa87b 100644
@@ -90,3 +90,12 @@ config SCSI_UFS_DWC
 config SCSI_UFS_DWC_TC
 	bool
 	select SCSI_UFS_DWC
+
+config SCSI_UFS_DWC_TC_PLATFORM
+	tristate "DesignWare platform support using a G210 Test Chip"
+	depends on SCSI_UFSHCD_PLATFORM
+	select SCSI_UFS_DWC_TC
+	---help---
+	  Synopsys Test Chip is a PHY for prototyping purposes.
+
+	  If unsure, say N."
drivers/scsi/ufs/Makefile +1 -0
index 9468d7b..a977fe0 100644
@@ -1,6 +1,7 @@
 # UFSHCD makefile
 obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
 obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
drivers/scsi/ufs/tc-dwc-g210-pltfrm.c new file +113 -0

113 lines not on this page · raw message

Signature · 1 line
1.8.1.5
maintainer
#15 lore raw

Re: [PATCH v12 8/9] add TC G210 platform driver

Quoted 25 lines · Joao Pinto

This patch adds a glue platform driver for the Synopsys G210 Test Chip.

---
Changes v11->v12 (Tomas Winkler):
- custom_phy_initialization replaced by phy_initialization Changes v10->v11 (Arnd Bergmann):
- vops structs are now passed in .data
Changes v0->v10:
- This patch only appeared in v10

 .../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt |  26 +++++
 drivers/scsi/ufs/Kconfig                           |   9 ++
 drivers/scsi/ufs/Makefile                          |   1 +
 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c              | 113 +++++++++++++++++++++
 4 files changed, 149 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +0 -0
new file mode 100644
index 0000000..6ec9647

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 9

Quoted 9 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +9 -0
@@ -0,0 +1,26 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+
+DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible	: compatible list must contain the PHY type & version:
+			"snps, g210-tc-6.00-20bit"
+			"snps, g210-tc-6.00-40bit"

Remove the space ^

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 11

Quoted 2 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +2 -0
+		  complemented with the Controller IP version:
+			"snps, dwc-ufshcd-1.40a"

ditto

Combining the phy and controller compatible strings is a bit strange. Generally, they would be separate nodes using the common phy binding.

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 20

Quoted 9 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +9 -0
+		  complemented with the JEDEC version:
+			"jedec,ufs-1.1"
+			"jedec,ufs-2.0"
+
+- reg		: <registers mapping>
+- interrupts	: <interrupt mapping for UFS host controller IRQ>
+
+Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
+	dwc_ufs@d0000000 {

No underscores please.

Quoted 6 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +6 -0
+		compatible = "snps, g210-tc-6.00-40bit",
+			     "snps, dwc-ufshcd-1.40a",
+			     "jedec,ufs-2.0";
+		reg = < 0xd0000000 0x10000 >;
+		interrupts = < 24 >;
+	};
author
#16 lore raw

Re: [PATCH v12 8/9] add TC G210 platform driver

Hi Rob,

Quoted 5 lines · Rob Herring
Quoted 4 lines · Joao Pinto

This patch adds a glue platform driver for the Synopsys G210 Test Chip.

---

[snip]

Quoted 11 lines

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 9

Quoted 5 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +5 -0
+
+Required properties:
+- compatible	: compatible list must contain the PHY type & version:
+			"snps, g210-tc-6.00-20bit"
+			"snps, g210-tc-6.00-40bit"

Remove the space ^

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 11

Quoted 2 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +2 -0
+		  complemented with the Controller IP version:
+			"snps, dwc-ufshcd-1.40a"

ditto

Ok, will do that!

Quoted 4 lines

Combining the phy and controller compatible strings is a bit strange. Generally, they would be separate nodes using the common phy binding.

Correct, but in this case is just the compatibility string is just to tell the dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip is initialized by a unipro command sequence and there is no more ops related to it.

Quoted 11 lines

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 20

Quoted 9 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +9 -0
+		  complemented with the JEDEC version:
+			"jedec,ufs-1.1"
+			"jedec,ufs-2.0"
+
+- reg		: <registers mapping>
+- interrupts	: <interrupt mapping for UFS host controller IRQ>
+
+Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
+	dwc_ufs@d0000000 {

No underscores please.

Ok, will update it.

Quoted 8 lines

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 26

Quoted 7 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +6 -0
+		compatible = "snps, g210-tc-6.00-40bit",
+			     "snps, dwc-ufshcd-1.40a",
+			     "jedec,ufs-2.0";
+		reg = < 0xd0000000 0x10000 >;
+		interrupts = < 24 >;
+	};

Will send a v13 with these tweaks.

Thanks.

maintainer
#17 lore raw

Re: [PATCH v12 8/9] add TC G210 platform driver

Quoted 27 lines · Joao Pinto

Hi Rob,

Quoted 5 lines · Rob Herring
Quoted 4 lines · Joao Pinto

This patch adds a glue platform driver for the Synopsys G210 Test Chip.

---

[snip]

Quoted 11 lines

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 9

Quoted 5 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +5 -0
+
+Required properties:
+- compatible	: compatible list must contain the PHY type & version:
+			"snps, g210-tc-6.00-20bit"
+			"snps, g210-tc-6.00-40bit"

Remove the space ^

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 11

Quoted 2 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +2 -0
+		  complemented with the Controller IP version:
+			"snps, dwc-ufshcd-1.40a"

ditto

Ok, will do that!

Quoted 1 line
Quoted 7 lines
Quoted 3 lines

Combining the phy and controller compatible strings is a bit strange. Generally, they would be separate nodes using the common phy binding.

Correct, but in this case is just the compatibility string is just to tell the dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip is initialized by a unipro command sequence and there is no more ops related to it.

Okay. In that case, I think it should be a separate property unless the controller h/w is synthesized for one or the other.

Rob

author
#18 lore raw

Re: [PATCH v12 8/9] add TC G210 platform driver

Hi Rob,

Quoted 32 lines · Rob Herring
Quoted 31 lines · Joao Pinto

Hi Rob,

Quoted 5 lines · Rob Herring
Quoted 4 lines · Joao Pinto

This patch adds a glue platform driver for the Synopsys G210 Test Chip.

---

[snip]

Quoted 11 lines

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 9

Quoted 5 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +5 -0
+
+Required properties:
+- compatible	: compatible list must contain the PHY type & version:
+			"snps, g210-tc-6.00-20bit"
+			"snps, g210-tc-6.00-40bit"

Remove the space ^

Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt line 11

Quoted 2 lines
Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt new file +2 -0
+		  complemented with the Controller IP version:
+			"snps, dwc-ufshcd-1.40a"

ditto

Ok, will do that!

Quoted 4 lines

Combining the phy and controller compatible strings is a bit strange. Generally, they would be separate nodes using the common phy binding.

Quoted 6 lines
Quoted 3 lines

Correct, but in this case is just the compatibility string is just to tell the dw ufs host that it has a 40-bit or a 20-bit test chip connected. The Test chip is initialized by a unipro command sequence and there is no more ops related to it.

Okay. In that case, I think it should be a separate property unless the controller h/w is synthesized for one or the other.

Yes, the hardware must be synthesized for a certain PHY type, 20 or 40-bit.

Quoted 3 lines

Rob

Joao

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author
#19 lore raw

PATCH v12 9/9 add TC G210 pci driver

In reply to Joao Pinto

This patch adds a glue pci driver for the Synopsys G210 Test Chip.

---
Changes v10->v12 (Tomas Winkler):
- custom_phy_initialization replaced by phy_initialization Changes v10->v11 (Arnd Bergmann):
- tc_type is now initialized to TC_G210_INV
- probe function checks if the test chip version is specified Changes v0->v10:
- This patch only appeared in v10

 drivers/scsi/ufs/Kconfig           |   9 ++
 drivers/scsi/ufs/Makefile          |   1 +
 drivers/scsi/ufs/tc-dwc-g210-pci.c | 181 +++++++++++++++++++++++++++++++++++++
 3 files changed, 191 insertions(+)
 create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pci.c
drivers/scsi/ufs/Kconfig +9 -0
index 5cfa87b..5a3fde7 100644
@@ -99,3 +99,12 @@ config SCSI_UFS_DWC_TC_PLATFORM
 	  Synopsys Test Chip is a PHY for prototyping purposes.
 
 	  If unsure, say N."
+
+config SCSI_UFS_DWC_TC_PCI
+	tristate "DesignWare pci support using a G210 Test Chip"
+	depends on SCSI_UFSHCD_PCI
+	select SCSI_UFS_DWC_TC
+	---help---
+	  Synopsys Test Chip is a PHY for prototyping purposes.
+
+	  If unsure, say N."
drivers/scsi/ufs/Makefile +1 -0
index a977fe0..5303d85 100644
@@ -2,6 +2,7 @@
 obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
 obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
 obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PCI) += tc-dwc-g210-pci.o
 obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
 obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
 obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
drivers/scsi/ufs/tc-dwc-g210-pci.c new file +181 -0

181 lines not on this page · raw message

Signature · 1 line
1.8.1.5
#20 lore raw
In reply to Joao Pinto
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

"Joao" == Joao Pinto <[email protected]> writes:

Joao,

Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which contains Joao> all DWC HW specific code - Unipro attributes were added and new Joao> registers were added to the driver - Implement a tc-dwc-g210 Joao> containing G210 MPHY specific code - Implement a tc-dwc-g210 glue Joao> platform driver - Implement a tc-dwc-g210 glue pci driver - Joao> Documentation update

You really need to keep track of which Acked-by: and Reviewed-by: tags you have gotten from people and apply them to patches that you haven't changed. Otherwise we start from scratch every time you resubmit.

Thanks!

Signature · 1 line
Martin K. Petersen	Oracle Linux Engineering
author
#21 lore raw

Hi,

Quoted 12 lines · Martin K. Petersen
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

"Joao" == Joao Pinto <[email protected]> writes:

Joao,

Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which contains Joao> all DWC HW specific code - Unipro attributes were added and new Joao> registers were added to the driver - Implement a tc-dwc-g210 Joao> containing G210 MPHY specific code - Implement a tc-dwc-g210 glue Joao> platform driver - Implement a tc-dwc-g210 glue pci driver - Joao> Documentation update

Quoted 6 lines

You really need to keep track of which Acked-by: and Reviewed-by: tags you have gotten from people and apply them to patches that you haven't changed. Otherwise we start from scratch every time you resubmit.

Thanks!

It's ok to submit the same v13 with the ACK tags?

Joao

#22 lore raw

Hi,

Quoted 12 lines · Martin K. Petersen
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

"Joao" == Joao Pinto <[email protected]> writes:

Joao,

Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which Joao> contains all DWC HW specific code - Unipro attributes were added Joao> and new registers were added to the driver - Implement a Joao> tc-dwc-g210 containing G210 MPHY specific code - Implement a Joao> tc-dwc-g210 glue platform driver - Implement a tc-dwc-g210 glue Joao> pci driver - Documentation update

Quoted 6 lines

You really need to keep track of which Acked-by: and Reviewed-by: tags you have gotten from people and apply them to patches that you haven't changed. Otherwise we start from scratch every time you resubmit.

Thanks!

It's ok to submit the same v13 with the ACK tags?

You can add my Ack on the core patches, not DWC specific, I didn't really look at those properly. Thanks
Tomas

author
#23 lore raw
Quoted 20 lines · Tomas

Hi,

Quoted 16 lines · Martin K. Petersen
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line

"Joao" == Joao Pinto <Joao.Pinto-HKixBCOQz3hWk0Htik3J/[email protected]> writes:

Joao,

Joao> The work consisted of: - Fixed typo in ufshcd-pltfrm.c - Tweak Joao> ufshcd.c for UFS 2.0 support - Implement ufshcd-dwc which Joao> contains all DWC HW specific code - Unipro attributes were added Joao> and new registers were added to the driver - Implement a Joao> tc-dwc-g210 containing G210 MPHY specific code - Implement a Joao> tc-dwc-g210 glue platform driver - Implement a tc-dwc-g210 glue Joao> pci driver - Documentation update

You really need to keep track of which Acked-by: and Reviewed-by: tags you have gotten from people and apply them to patches that you haven't changed. Otherwise we start from scratch every time you resubmit.

Quoted 8 lines
Quoted 2 lines

Thanks!

It's ok to submit the same v13 with the ACK tags?

You can add my Ack on the core patches, not DWC specific, I didn't really look at those properly. Thanks
Tomas

Nice! Going to send a new v13 with your acks.

Quoted 1 line

Thanks.
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Reviewed-by on the v12 series
#24 lore raw
In reply to Joao Pinto
Quoted 12 lines · Joao Pinto

As requested, I am sending v14 to be included in the SCSI patchwork.

The work consisted of:
- Fixed typo in ufshcd-pltfrm.c
- Tweak ufshcd.c for UFS 2.0 support
- Implement ufshcd-dwc which contains all DWC HW specific code
- Unipro attributes were added and new registers were added to the driver
- Implement a tc-dwc-g210 containing G210 MPHY specific code
- Implement a tc-dwc-g210 glue platform driver
- Implement a tc-dwc-g210 glue pci driver
- Documentation update

Quoted 11 lines

Joao Pinto (9):
fixed typo in ufshcd-pltfrm
add UFS 2.0 to ufshcd-pltfrm bindings
added UFS 2.0 capabilities
added unipro attributes
added link status to ufshci
added support for DesignWare Controller
added support for Synopsys G210 Test Chip
add TC G210 platform driver
add TC G210 pci driver

For this series:

Cheers,

Hannes

Signature · 9 lines
Dr. Hannes Reinecke		   Teamlead Storage & Networking
[email protected]			               +49 911 74053 688
SUSE LINUX GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: F. Imendörffer, J. Smithard, J. Guild, D. Upmanyu, G. Norton
HRB 21284 (AG Nürnberg)
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