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Ingenic DRM bridge_atomic_enable proposal

PATCH Applied Christophe Branchereau 4 participants 13 messages Mar 11, 2022 – Mar 21, 2022

Subsystems (6)
Device tree bindings DRM drivers DRM misc MIPS +2 more subsystems

v4 of 5 Applied Latest is v5 →

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Christophe Branchereau

author
#0 lore raw

v4 cover Ingenic DRM bridge_atomic_enable proposal

v4: fix the bindings license

KR
Christophe

-----------------------

Hello, v3 :

Drop -spi in the compatible string, adjust bindings doc accordingly

KR
Christophe

------------------------

Hello, this is the v2 for my set of patches :

- use dev_err_probe() instead of dev_err() in the newvision panel driver probe function

- add bindings documentation for the Leadtek ltk035c5444t

Cheers - Christophe

------------------------

Hello, this is a set of patches to allow the upstreaming of the NV3052C panel found in the Anbernic RG350M mips gaming handheld.

It was never upstreamed so far due to a longstanding graphical bug, which I propose to solve by introducing ingenic_drm_bridge_atomic_enable in the drm driver so the CRTC can be enabled after the panel itself slept out, and not before as it used to.

After the drm change, 2 of the existing panels have to be modified accordingly to introduce missing .enable and .disable in their code.

Christophe Branchereau (4):
drm/ingenic : add ingenic_drm_bridge_atomic_enable drm/panel: Add panel driver for NewVision NV3052C based LCDs drm/panel : innolux-ej030na and abt-y030xx067a : add .enable and
.disable
dt-bindings: display/panel: Add Leadtek ltk035c5444t

 .../display/panel/leadtek,ltk035c5444t.yaml   |  59 +++
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c     |  19 +-
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 drivers/gpu/drm/panel/panel-abt-y030xx067a.c  |  23 +-
 drivers/gpu/drm/panel/panel-innolux-ej030na.c |  31 +-
 .../gpu/drm/panel/panel-newvision-nv3052c.c   | 497 ++++++++++++++++++
 7 files changed, 627 insertions(+), 12 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-newvision-nv3052c.c
Signature · 1 line
2.35.1
author
#1 lore raw

PATCH v4 1/4 drm/ingenic : add ingenic_drm_bridge_atomic_enable

This allows the CRTC to be enabled after panels have slept out, and before their display is turned on, solving a graphical bug on the newvision nv3502c

Signed-off-by Christophe Branchereau <[email protected]>
---
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)
drivers/gpu/drm/ingenic/ingenic-drm-drv.c +13 -6
index dcf44cb00821..51512f41263e 100644
@@ -226,6 +226,18 @@ static int ingenic_drm_update_pixclk(struct notifier_block *nb,
 	}
 }
 
+static void ingenic_drm_bridge_atomic_enable(struct drm_bridge *bridge,
+					     struct drm_bridge_state *old_bridge_state)
+{
+	struct ingenic_drm *priv = drm_device_get_priv(bridge->dev);
+
+	regmap_write(priv->map, JZ_REG_LCD_STATE, 0);
+
+	regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
+			   JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE,
+			   JZ_LCD_CTRL_ENABLE);
+}
+
 static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc,
 					   struct drm_atomic_state *state)
 {

@@ -237,17 +249,11 @@ static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc,
 	if (WARN_ON(IS_ERR(priv_state)))
 		return;
 
-	regmap_write(priv->map, JZ_REG_LCD_STATE, 0);
-
 	/* Set addresses of our DMA descriptor chains */
 	next_id = priv_state->use_palette ? HWDESC_PALETTE : 0;
 	regmap_write(priv->map, JZ_REG_LCD_DA0, dma_hwdesc_addr(priv, next_id));
 	regmap_write(priv->map, JZ_REG_LCD_DA1, dma_hwdesc_addr(priv, 1));
 
-	regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
-			   JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE,
-			   JZ_LCD_CTRL_ENABLE);
-
 	drm_crtc_vblank_on(crtc);
 }
 

@@ -968,6 +974,7 @@ static const struct drm_encoder_helper_funcs ingenic_drm_encoder_helper_funcs =
 
 static const struct drm_bridge_funcs ingenic_drm_bridge_funcs = {
 	.attach			= ingenic_drm_bridge_attach,
+	.atomic_enable		= ingenic_drm_bridge_atomic_enable,
 	.atomic_check		= ingenic_drm_bridge_atomic_check,
 	.atomic_reset		= drm_atomic_helper_bridge_reset,
 	.atomic_duplicate_state	= drm_atomic_helper_bridge_duplicate_state,
Signature · 1 line
2.35.1
maintainer
#2 lore raw

Re: [PATCH v4 1/4] drm/ingenic : add ingenic_drm_bridge_atomic_enable

Hi Christophe,

Quoted 58 lines · Christophe Branchereau

This allows the CRTC to be enabled after panels have slept out, and before their display is turned on, solving a graphical bug on the newvision nv3502c

Signed-off-by Christophe Branchereau <[email protected]>
---
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)
drivers/gpu/drm/ingenic/ingenic-drm-drv.c +12 -0
index dcf44cb00821..51512f41263e 100644
@@ -226,6 +226,18 @@ static int ingenic_drm_update_pixclk(struct 
 notifier_block *nb,
 	}
 }
 
+static void ingenic_drm_bridge_atomic_enable(struct drm_bridge 
 *bridge,
+					     struct drm_bridge_state *old_bridge_state)
+{
+	struct ingenic_drm *priv = drm_device_get_priv(bridge->dev);
+
+	regmap_write(priv->map, JZ_REG_LCD_STATE, 0);
+
+	regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
+			   JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE,
+			   JZ_LCD_CTRL_ENABLE);
+}
+
 static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc,
drivers/gpu/drm/ingenic/ingenic-drm-drv.c +0 -6
 					   struct drm_atomic_state *state)
 {

@@ -237,17 +249,11 @@ static void 
 ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc,
 	if (WARN_ON(IS_ERR(priv_state)))
 		return;
 
-	regmap_write(priv->map, JZ_REG_LCD_STATE, 0);
-
 	/* Set addresses of our DMA descriptor chains */
 	next_id = priv_state->use_palette ? HWDESC_PALETTE : 0;
 	regmap_write(priv->map, JZ_REG_LCD_DA0, dma_hwdesc_addr(priv, 
 next_id));
 	regmap_write(priv->map, JZ_REG_LCD_DA1, dma_hwdesc_addr(priv, 1));
 
-	regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
-			   JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE,
-			   JZ_LCD_CTRL_ENABLE);
-
 	drm_crtc_vblank_on(crtc);

}

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +0 -0
@@ -968,6 +974,7 @@ static const struct drm_encoder_helper_funcs

ingenic_drm_encoder_helper_funcs =

static const struct drm_bridge_funcs ingenic_drm_bridge_funcs = {

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static const struct drm_encoder_helper_funcs ingenic_drm_encoder_helper_funcs = · line 977

Quoted 2 lines
drivers/gpu/drm/ingenic/ingenic-drm-drv.c +1 -0
 	.attach			= ingenic_drm_bridge_attach,
+	.atomic_enable		= ingenic_drm_bridge_atomic_enable,

Shouldn't we have a .atomic_disable() as well? If the CRTC is now enabled in the bridge's .atomic_enable, it would make sense to have it disabled in the .atomic_disable().

Cheers,
-Paul

Quoted 6 lines
drivers/gpu/drm/ingenic/ingenic-drm-drv.c +0 -1
 	.atomic_check		= ingenic_drm_bridge_atomic_check,
 	.atomic_reset		= drm_atomic_helper_bridge_reset,
 	.atomic_duplicate_state	= drm_atomic_helper_bridge_duplicate_state,
--

2.35.1

author
#3 lore raw

PATCH v4 2/4 drm/panel: Add panel driver for NewVision NV3052C based LCDs

In reply to Christophe Branchereau

This driver supports the NewVision NV3052C based LCDs. Right now, it only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which can be found in the Anbernic RG-350M handheld console.

Signed-off-by Christophe Branchereau <[email protected]>
---
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 .../gpu/drm/panel/panel-newvision-nv3052c.c   | 497 ++++++++++++++++++
 3 files changed, 507 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-newvision-nv3052c.c
drivers/gpu/drm/panel/Kconfig +9 -0
index bb2e47229c68..40084f709789 100644
@@ -283,6 +283,15 @@ config DRM_PANEL_NEC_NL8048HL11
 	  panel (found on the Zoom2/3/3630 SDP boards). To compile this driver
 	  as a module, choose M here.
 
+config DRM_PANEL_NEWVISION_NV3052C
+	tristate "NewVision NV3052C RGB/SPI panel"
+	depends on OF && SPI
+	depends on BACKLIGHT_CLASS_DEVICE
+	select DRM_MIPI_DBI
+	help
+	  Say Y here if you want to enable support for the panels built
+	  around the NewVision NV3052C display controller.
+
 config DRM_PANEL_NOVATEK_NT35510
 	tristate "Novatek NT35510 RGB panel driver"
 	depends on OF
drivers/gpu/drm/panel/Makefile +1 -0
index 5740911f637c..42a7ab54234b 100644
@@ -26,6 +26,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o
 obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o
 obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o
 obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
+obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +497 -0

497 lines not on this page · raw message

Signature · 1 line
2.35.1
maintainer
#4 lore raw

Re: [PATCH v4 2/4] drm/panel: Add panel driver for NewVision NV3052C based LCDs

Hi Christophe,

Quoted 54 lines · Christophe Branchereau

This driver supports the NewVision NV3052C based LCDs. Right now, it only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which can be found in the Anbernic RG-350M handheld console.

Signed-off-by Christophe Branchereau <[email protected]>
---
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 .../gpu/drm/panel/panel-newvision-nv3052c.c   | 497 
++++++++++++++++++
 3 files changed, 507 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-newvision-nv3052c.c
drivers/gpu/drm/panel/Kconfig +0 -0
index bb2e47229c68..40084f709789 100644
@@ -283,6 +283,15 @@ config DRM_PANEL_NEC_NL8048HL11
 	  panel (found on the Zoom2/3/3630 SDP boards). To compile this

driver

drivers/gpu/drm/panel/Kconfig +9 -0
 	  as a module, choose M here.
 
+config DRM_PANEL_NEWVISION_NV3052C
+	tristate "NewVision NV3052C RGB/SPI panel"
+	depends on OF && SPI
+	depends on BACKLIGHT_CLASS_DEVICE
+	select DRM_MIPI_DBI
+	help
+	  Say Y here if you want to enable support for the panels built
+	  around the NewVision NV3052C display controller.
+
 config DRM_PANEL_NOVATEK_NT35510
 	tristate "Novatek NT35510 RGB panel driver"
 	depends on OF
drivers/gpu/drm/panel/Makefile +0 -0
index 5740911f637c..42a7ab54234b 100644
@@ -26,6 +26,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) +=

panel-leadtek-ltk500hd1829.o
obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
+obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +0 -0
new file mode 100644
index 000000000000..fc31df0dee12

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 3

Quoted 3 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +3 -0
@@ -0,0 +1,497 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * NevVision NV3052C IPS LCD panel driver

NewVision*

Quoted 313 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +3 -0
+ *
+ * Copyright (C) 2020, Paul Cercueil <[email protected]>
+ * Copyright (C) 2022, Christophe Branchereau

<[email protected]>
+ */

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +308 -0
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/media-bus-format.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/spi/spi.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dbi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+struct nv3052c_panel_info {
+	const struct drm_display_mode *display_modes;
+	unsigned int num_modes;
+	u16 width_mm, height_mm;
+	u32 bus_format, bus_flags;
+};
+
+struct nv3052c {
+	struct device *dev;
+	struct drm_panel panel;
+	struct mipi_dbi dbi;
+
+	const struct nv3052c_panel_info *panel_info;
+
+	struct regulator *supply;
+	struct gpio_desc *reset_gpio;
+};
+
+struct nv3052c_reg {
+	u8 cmd;
+	u8 val;
+};
+
+static const struct nv3052c_reg nv3052c_panel_regs[] = {
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x01 },
+	{ 0xe3, 0x00 },
+	{ 0x40, 0x00 },
+	{ 0x03, 0x40 },
+	{ 0x04, 0x00 },
+	{ 0x05, 0x03 },
+	{ 0x08, 0x00 },
+	{ 0x09, 0x07 },
+	{ 0x0a, 0x01 },
+	{ 0x0b, 0x32 },
+	{ 0x0c, 0x32 },
+	{ 0x0d, 0x0b },
+	{ 0x0e, 0x00 },
+	{ 0x23, 0xa0 },
+
+	{ 0x24, 0x0c },
+	{ 0x25, 0x06 },
+	{ 0x26, 0x14 },
+	{ 0x27, 0x14 },
+
+	{ 0x38, 0xcc },
+	{ 0x39, 0xd7 },
+	{ 0x3a, 0x4a },
+
+	{ 0x28, 0x40 },
+	{ 0x29, 0x01 },
+	{ 0x2a, 0xdf },
+	{ 0x49, 0x3c },
+	{ 0x91, 0x77 },
+	{ 0x92, 0x77 },
+	{ 0xa0, 0x55 },
+	{ 0xa1, 0x50 },
+	{ 0xa4, 0x9c },
+	{ 0xa7, 0x02 },
+	{ 0xa8, 0x01 },
+	{ 0xa9, 0x01 },
+	{ 0xaa, 0xfc },
+	{ 0xab, 0x28 },
+	{ 0xac, 0x06 },
+	{ 0xad, 0x06 },
+	{ 0xae, 0x06 },
+	{ 0xaf, 0x03 },
+	{ 0xb0, 0x08 },
+	{ 0xb1, 0x26 },
+	{ 0xb2, 0x28 },
+	{ 0xb3, 0x28 },
+	{ 0xb4, 0x33 },
+	{ 0xb5, 0x08 },
+	{ 0xb6, 0x26 },
+	{ 0xb7, 0x08 },
+	{ 0xb8, 0x26 },
+	{ 0xf0, 0x00 },
+	{ 0xf6, 0xc0 },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x02 },
+	{ 0xb0, 0x0b },
+	{ 0xb1, 0x16 },
+	{ 0xb2, 0x17 },
+	{ 0xb3, 0x2c },
+	{ 0xb4, 0x32 },
+	{ 0xb5, 0x3b },
+	{ 0xb6, 0x29 },
+	{ 0xb7, 0x40 },
+	{ 0xb8, 0x0d },
+	{ 0xb9, 0x05 },
+	{ 0xba, 0x12 },
+	{ 0xbb, 0x10 },
+	{ 0xbc, 0x12 },
+	{ 0xbd, 0x15 },
+	{ 0xbe, 0x19 },
+	{ 0xbf, 0x0e },
+	{ 0xc0, 0x16 },
+	{ 0xc1, 0x0a },
+	{ 0xd0, 0x0c },
+	{ 0xd1, 0x17 },
+	{ 0xd2, 0x14 },
+	{ 0xd3, 0x2e },
+	{ 0xd4, 0x32 },
+	{ 0xd5, 0x3c },
+	{ 0xd6, 0x22 },
+	{ 0xd7, 0x3d },
+	{ 0xd8, 0x0d },
+	{ 0xd9, 0x07 },
+	{ 0xda, 0x13 },
+	{ 0xdb, 0x13 },
+	{ 0xdc, 0x11 },
+	{ 0xdd, 0x15 },
+	{ 0xde, 0x19 },
+	{ 0xdf, 0x10 },
+	{ 0xe0, 0x17 },
+	{ 0xe1, 0x0a },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x03 },
+	{ 0x00, 0x2a },
+	{ 0x01, 0x2a },
+	{ 0x02, 0x2a },
+	{ 0x03, 0x2a },
+	{ 0x04, 0x61 },
+	{ 0x05, 0x80 },
+	{ 0x06, 0xc7 },
+	{ 0x07, 0x01 },
+	{ 0x08, 0x03 },
+	{ 0x09, 0x04 },
+	{ 0x70, 0x22 },
+	{ 0x71, 0x80 },
+	{ 0x30, 0x2a },
+	{ 0x31, 0x2a },
+	{ 0x32, 0x2a },
+	{ 0x33, 0x2a },
+	{ 0x34, 0x61 },
+	{ 0x35, 0xc5 },
+	{ 0x36, 0x80 },
+	{ 0x37, 0x23 },
+	{ 0x40, 0x03 },
+	{ 0x41, 0x04 },
+	{ 0x42, 0x05 },
+	{ 0x43, 0x06 },
+	{ 0x44, 0x11 },
+	{ 0x45, 0xe8 },
+	{ 0x46, 0xe9 },
+	{ 0x47, 0x11 },
+	{ 0x48, 0xea },
+	{ 0x49, 0xeb },
+	{ 0x50, 0x07 },
+	{ 0x51, 0x08 },
+	{ 0x52, 0x09 },
+	{ 0x53, 0x0a },
+	{ 0x54, 0x11 },
+	{ 0x55, 0xec },
+	{ 0x56, 0xed },
+	{ 0x57, 0x11 },
+	{ 0x58, 0xef },
+	{ 0x59, 0xf0 },
+	{ 0xb1, 0x01 },
+	{ 0xb4, 0x15 },
+	{ 0xb5, 0x16 },
+	{ 0xb6, 0x09 },
+	{ 0xb7, 0x0f },
+	{ 0xb8, 0x0d },
+	{ 0xb9, 0x0b },
+	{ 0xba, 0x00 },
+	{ 0xc7, 0x02 },
+	{ 0xca, 0x17 },
+	{ 0xcb, 0x18 },
+	{ 0xcc, 0x0a },
+	{ 0xcd, 0x10 },
+	{ 0xce, 0x0e },
+	{ 0xcf, 0x0c },
+	{ 0xd0, 0x00 },
+	{ 0x81, 0x00 },
+	{ 0x84, 0x15 },
+	{ 0x85, 0x16 },
+	{ 0x86, 0x10 },
+	{ 0x87, 0x0a },
+	{ 0x88, 0x0c },
+	{ 0x89, 0x0e },
+	{ 0x8a, 0x02 },
+	{ 0x97, 0x00 },
+	{ 0x9a, 0x17 },
+	{ 0x9b, 0x18 },
+	{ 0x9c, 0x0f },
+	{ 0x9d, 0x09 },
+	{ 0x9e, 0x0b },
+	{ 0x9f, 0x0d },
+	{ 0xa0, 0x01 },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x02 },
+	{ 0x01, 0x01 },
+	{ 0x02, 0xda },
+	{ 0x03, 0xba },
+	{ 0x04, 0xa8 },
+	{ 0x05, 0x9a },
+	{ 0x06, 0x70 },
+	{ 0x07, 0xff },
+	{ 0x08, 0x91 },
+	{ 0x09, 0x90 },
+	{ 0x0a, 0xff },
+	{ 0x0b, 0x8f },
+	{ 0x0c, 0x60 },
+	{ 0x0d, 0x58 },
+	{ 0x0e, 0x48 },
+	{ 0x0f, 0x38 },
+	{ 0x10, 0x2b },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x00 },
+	{ 0x36, 0x0a },
+};
+
+static inline struct nv3052c *to_nv3052c(struct drm_panel *panel)
+{
+	return container_of(panel, struct nv3052c, panel);
+}
+
+static int nv3052c_prepare(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	unsigned int i;
+	int err;
+
+	err = regulator_enable(priv->supply);
+	if (err) {
+		dev_err(priv->dev, "Failed to enable power supply: %d\n", err);
+		return err;
+	}
+
+	/* Reset the chip */
+	gpiod_set_value_cansleep(priv->reset_gpio, 1);
+	usleep_range(10, 1000);
+	gpiod_set_value_cansleep(priv->reset_gpio, 0);
+	msleep(5);
+
+	for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {
+		err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
+				       nv3052c_panel_regs[i].val);
+
+		if (err) {
+			dev_err(priv->dev, "Unable to set register: %d\n", err);
+			goto err_disable_regulator;
+		}
+	}
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
+	if (err) {
+		dev_err(priv->dev, "Unable to exit sleep mode: %d\n", err);
+		goto err_disable_regulator;
+	}
+
+	return 0;
+
+err_disable_regulator:
+	regulator_disable(priv->supply);
+	return err;
+}
+
+static int nv3052c_unprepare(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	int err;
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE);
+	if (err) {
+		dev_err(priv->dev, "Unable to enter sleep mode: %d\n", err);
+		return err;
+	}
+
+	gpiod_set_value_cansleep(priv->reset_gpio, 1);
+	regulator_disable(priv->supply);
+
+	return 0;
+}
+
+static int nv3052c_enable(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	int err;

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 325

Quoted 10 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +10 -0
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
+	if (err) {
+		dev_err(priv->dev, "Unable to enable display: %d\n", err);
+		return err;
+	}
+
+	if (panel->backlight) {
+		/* Wait for the picture to be ready before enabling backlight */
+		msleep(120);

From my own test this msleep can go. Modesets don't seem to cause any graphical glitches.

The driver looks fine to me overall, I just need somebody else (Sam?) to ack it before I can merge it.

Cheers,
-Paul

Quoted 179 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +81 -0
+	}
+
+	return 0;
+}
+
+static int nv3052c_disable(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	int err;
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
+	if (err) {
+		dev_err(priv->dev, "Unable to disable display: %d\n", err);
+		return err;
+	}
+
+	return 0;
+}
+
+static int nv3052c_get_modes(struct drm_panel *panel,
+			     struct drm_connector *connector)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	const struct nv3052c_panel_info *panel_info = priv->panel_info;
+	struct drm_display_mode *mode;
+	unsigned int i;
+
+	for (i = 0; i < panel_info->num_modes; i++) {
+		mode = drm_mode_duplicate(connector->dev,
+					  &panel_info->display_modes[i]);
+		if (!mode)
+			return -ENOMEM;
+
+		drm_mode_set_name(mode);
+
+		mode->type = DRM_MODE_TYPE_DRIVER;
+		if (panel_info->num_modes == 1)
+			mode->type |= DRM_MODE_TYPE_PREFERRED;
+
+		drm_mode_probed_add(connector, mode);
+	}
+
+	connector->display_info.bpc = 8;
+	connector->display_info.width_mm = panel_info->width_mm;
+	connector->display_info.height_mm = panel_info->height_mm;
+
+	drm_display_info_set_bus_formats(&connector->display_info,
+					 &panel_info->bus_format, 1);
+	connector->display_info.bus_flags = panel_info->bus_flags;
+
+	return panel_info->num_modes;
+}
+
+static const struct drm_panel_funcs nv3052c_funcs = {
+	.prepare	= nv3052c_prepare,
+	.unprepare	= nv3052c_unprepare,
+	.enable		= nv3052c_enable,
+	.disable	= nv3052c_disable,
+	.get_modes	= nv3052c_get_modes,
+};
+
+static int nv3052c_probe(struct spi_device *spi)
+{
+	struct device *dev = &spi->dev;
+	struct nv3052c *priv;
+	int err;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = dev;
+
+	priv->panel_info = of_device_get_match_data(dev);
+	if (!priv->panel_info)
+		return -EINVAL;
+
+	priv->supply = devm_regulator_get(dev, "power");
+	if (IS_ERR(priv->supply))
+		return dev_err_probe(dev, PTR_ERR(priv->supply), "Failed to get

power supply\n");

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +4 -0
+
+	priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(priv->reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(priv->reset_gpio), "Failed to

get reset GPIO\n");

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +66 -0
+
+	err = mipi_dbi_spi_init(spi, &priv->dbi, NULL);
+	if (err)
+		return dev_err_probe(dev, err, "MIPI DBI init failed\n");
+
+	priv->dbi.read_commands = NULL;
+
+	spi_set_drvdata(spi, priv);
+
+	drm_panel_init(&priv->panel, dev, &nv3052c_funcs,
+		       DRM_MODE_CONNECTOR_DPI);
+
+	err = drm_panel_of_backlight(&priv->panel);
+	if (err)
+		return dev_err_probe(dev, err, "Failed to attach backlight\n");
+
+	drm_panel_add(&priv->panel);
+
+	return 0;
+}
+
+static int nv3052c_remove(struct spi_device *spi)
+{
+	struct nv3052c *priv = spi_get_drvdata(spi);
+
+	drm_panel_remove(&priv->panel);
+	drm_panel_disable(&priv->panel);
+	drm_panel_unprepare(&priv->panel);
+
+	return 0;
+}
+
+static const struct drm_display_mode ltk035c5444t_modes[] = {
+	{ /* 60 Hz */
+		.clock = 24000,
+		.hdisplay = 640,
+		.hsync_start = 640 + 96,
+		.hsync_end = 640 + 96 + 16,
+		.htotal = 640 + 96 + 16 + 48,
+		.vdisplay = 480,
+		.vsync_start = 480 + 5,
+		.vsync_end = 480 + 5 + 2,
+		.vtotal = 480 + 5 + 2 + 13,
+		.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+	},
+	{ /* 50 Hz */
+		.clock = 18000,
+		.hdisplay = 640,
+		.hsync_start = 640 + 39,
+		.hsync_end = 640 + 39 + 2,
+		.htotal = 640 + 39 + 2 + 39,
+		.vdisplay = 480,
+		.vsync_start = 480 + 5,
+		.vsync_end = 480 + 5 + 2,
+		.vtotal = 480 + 5 + 2 + 13,
+		.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+	},
+};
+
+static const struct nv3052c_panel_info ltk035c5444t_panel_info = {
+	.display_modes = ltk035c5444t_modes,
+	.num_modes = ARRAY_SIZE(ltk035c5444t_modes),
+	.width_mm = 77,
+	.height_mm = 64,
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+	.bus_flags = DRM_BUS_FLAG_DE_HIGH |

DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +4 -0
+};
+
+static const struct of_device_id nv3052c_of_match[] = {
+	{ .compatible = "leadtek,ltk035c5444t", .data =

&ltk035c5444t_panel_info },

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +17 -1
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, nv3052c_of_match);
+
+static struct spi_driver nv3052c_driver = {
+	.driver = {
+		.name = "nv3052c",
+		.of_match_table = nv3052c_of_match,
+	},
+	.probe = nv3052c_probe,
+	.remove = nv3052c_remove,
+};
+module_spi_driver(nv3052c_driver);
+
+MODULE_AUTHOR("Paul Cercueil <[email protected]>");
+MODULE_AUTHOR("Christophe Branchereau <[email protected]>");
+MODULE_LICENSE("GPL v2");
--

2.35.1

author
#5 lore raw

Re: [PATCH v4 2/4] drm/panel: Add panel driver for NewVision NV3052C based LCDs

Hi Paul

Quoted 387 lines · Paul Cercueil

Hi Christophe,

Quoted 58 lines · Christophe Branchereau

This driver supports the NewVision NV3052C based LCDs. Right now, it only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which
can be found in the Anbernic RG-350M handheld console.

Signed-off-by Christophe Branchereau <[email protected]>
---
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 .../gpu/drm/panel/panel-newvision-nv3052c.c   | 497
++++++++++++++++++
 3 files changed, 507 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-newvision-nv3052c.c
drivers/gpu/drm/panel/Kconfig +0 -0
index bb2e47229c68..40084f709789 100644
@@ -283,6 +283,15 @@ config DRM_PANEL_NEC_NL8048HL11
        panel (found on the Zoom2/3/3630 SDP boards). To compile this

driver
as a module, choose M here.

drivers/gpu/drm/panel/Kconfig +9 -0
+config DRM_PANEL_NEWVISION_NV3052C
+     tristate "NewVision NV3052C RGB/SPI panel"
+     depends on OF && SPI
+     depends on BACKLIGHT_CLASS_DEVICE
+     select DRM_MIPI_DBI
+     help
+       Say Y here if you want to enable support for the panels built
+       around the NewVision NV3052C display controller.
+
 config DRM_PANEL_NOVATEK_NT35510
      tristate "Novatek NT35510 RGB panel driver"
      depends on OF
drivers/gpu/drm/panel/Makefile +0 -0
index 5740911f637c..42a7ab54234b 100644
@@ -26,6 +26,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) +=

panel-leadtek-ltk500hd1829.o
obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
+obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +0 -0
new file mode 100644
index 000000000000..fc31df0dee12

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 3

Quoted 3 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +3 -0
@@ -0,0 +1,497 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * NevVision NV3052C IPS LCD panel driver

NewVision*

Quoted 318 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +3 -0
+ *
+ * Copyright (C) 2020, Paul Cercueil <[email protected]>
+ * Copyright (C) 2022, Christophe Branchereau

<[email protected]>
+ */

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +313 -0
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/media-bus-format.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/spi/spi.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dbi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+struct nv3052c_panel_info {
+     const struct drm_display_mode *display_modes;
+     unsigned int num_modes;
+     u16 width_mm, height_mm;
+     u32 bus_format, bus_flags;
+};
+
+struct nv3052c {
+     struct device *dev;
+     struct drm_panel panel;
+     struct mipi_dbi dbi;
+
+     const struct nv3052c_panel_info *panel_info;
+
+     struct regulator *supply;
+     struct gpio_desc *reset_gpio;
+};
+
+struct nv3052c_reg {
+     u8 cmd;
+     u8 val;
+};
+
+static const struct nv3052c_reg nv3052c_panel_regs[] = {
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x01 },
+     { 0xe3, 0x00 },
+     { 0x40, 0x00 },
+     { 0x03, 0x40 },
+     { 0x04, 0x00 },
+     { 0x05, 0x03 },
+     { 0x08, 0x00 },
+     { 0x09, 0x07 },
+     { 0x0a, 0x01 },
+     { 0x0b, 0x32 },
+     { 0x0c, 0x32 },
+     { 0x0d, 0x0b },
+     { 0x0e, 0x00 },
+     { 0x23, 0xa0 },
+
+     { 0x24, 0x0c },
+     { 0x25, 0x06 },
+     { 0x26, 0x14 },
+     { 0x27, 0x14 },
+
+     { 0x38, 0xcc },
+     { 0x39, 0xd7 },
+     { 0x3a, 0x4a },
+
+     { 0x28, 0x40 },
+     { 0x29, 0x01 },
+     { 0x2a, 0xdf },
+     { 0x49, 0x3c },
+     { 0x91, 0x77 },
+     { 0x92, 0x77 },
+     { 0xa0, 0x55 },
+     { 0xa1, 0x50 },
+     { 0xa4, 0x9c },
+     { 0xa7, 0x02 },
+     { 0xa8, 0x01 },
+     { 0xa9, 0x01 },
+     { 0xaa, 0xfc },
+     { 0xab, 0x28 },
+     { 0xac, 0x06 },
+     { 0xad, 0x06 },
+     { 0xae, 0x06 },
+     { 0xaf, 0x03 },
+     { 0xb0, 0x08 },
+     { 0xb1, 0x26 },
+     { 0xb2, 0x28 },
+     { 0xb3, 0x28 },
+     { 0xb4, 0x33 },
+     { 0xb5, 0x08 },
+     { 0xb6, 0x26 },
+     { 0xb7, 0x08 },
+     { 0xb8, 0x26 },
+     { 0xf0, 0x00 },
+     { 0xf6, 0xc0 },
+
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x02 },
+     { 0xb0, 0x0b },
+     { 0xb1, 0x16 },
+     { 0xb2, 0x17 },
+     { 0xb3, 0x2c },
+     { 0xb4, 0x32 },
+     { 0xb5, 0x3b },
+     { 0xb6, 0x29 },
+     { 0xb7, 0x40 },
+     { 0xb8, 0x0d },
+     { 0xb9, 0x05 },
+     { 0xba, 0x12 },
+     { 0xbb, 0x10 },
+     { 0xbc, 0x12 },
+     { 0xbd, 0x15 },
+     { 0xbe, 0x19 },
+     { 0xbf, 0x0e },
+     { 0xc0, 0x16 },
+     { 0xc1, 0x0a },
+     { 0xd0, 0x0c },
+     { 0xd1, 0x17 },
+     { 0xd2, 0x14 },
+     { 0xd3, 0x2e },
+     { 0xd4, 0x32 },
+     { 0xd5, 0x3c },
+     { 0xd6, 0x22 },
+     { 0xd7, 0x3d },
+     { 0xd8, 0x0d },
+     { 0xd9, 0x07 },
+     { 0xda, 0x13 },
+     { 0xdb, 0x13 },
+     { 0xdc, 0x11 },
+     { 0xdd, 0x15 },
+     { 0xde, 0x19 },
+     { 0xdf, 0x10 },
+     { 0xe0, 0x17 },
+     { 0xe1, 0x0a },
+
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x03 },
+     { 0x00, 0x2a },
+     { 0x01, 0x2a },
+     { 0x02, 0x2a },
+     { 0x03, 0x2a },
+     { 0x04, 0x61 },
+     { 0x05, 0x80 },
+     { 0x06, 0xc7 },
+     { 0x07, 0x01 },
+     { 0x08, 0x03 },
+     { 0x09, 0x04 },
+     { 0x70, 0x22 },
+     { 0x71, 0x80 },
+     { 0x30, 0x2a },
+     { 0x31, 0x2a },
+     { 0x32, 0x2a },
+     { 0x33, 0x2a },
+     { 0x34, 0x61 },
+     { 0x35, 0xc5 },
+     { 0x36, 0x80 },
+     { 0x37, 0x23 },
+     { 0x40, 0x03 },
+     { 0x41, 0x04 },
+     { 0x42, 0x05 },
+     { 0x43, 0x06 },
+     { 0x44, 0x11 },
+     { 0x45, 0xe8 },
+     { 0x46, 0xe9 },
+     { 0x47, 0x11 },
+     { 0x48, 0xea },
+     { 0x49, 0xeb },
+     { 0x50, 0x07 },
+     { 0x51, 0x08 },
+     { 0x52, 0x09 },
+     { 0x53, 0x0a },
+     { 0x54, 0x11 },
+     { 0x55, 0xec },
+     { 0x56, 0xed },
+     { 0x57, 0x11 },
+     { 0x58, 0xef },
+     { 0x59, 0xf0 },
+     { 0xb1, 0x01 },
+     { 0xb4, 0x15 },
+     { 0xb5, 0x16 },
+     { 0xb6, 0x09 },
+     { 0xb7, 0x0f },
+     { 0xb8, 0x0d },
+     { 0xb9, 0x0b },
+     { 0xba, 0x00 },
+     { 0xc7, 0x02 },
+     { 0xca, 0x17 },
+     { 0xcb, 0x18 },
+     { 0xcc, 0x0a },
+     { 0xcd, 0x10 },
+     { 0xce, 0x0e },
+     { 0xcf, 0x0c },
+     { 0xd0, 0x00 },
+     { 0x81, 0x00 },
+     { 0x84, 0x15 },
+     { 0x85, 0x16 },
+     { 0x86, 0x10 },
+     { 0x87, 0x0a },
+     { 0x88, 0x0c },
+     { 0x89, 0x0e },
+     { 0x8a, 0x02 },
+     { 0x97, 0x00 },
+     { 0x9a, 0x17 },
+     { 0x9b, 0x18 },
+     { 0x9c, 0x0f },
+     { 0x9d, 0x09 },
+     { 0x9e, 0x0b },
+     { 0x9f, 0x0d },
+     { 0xa0, 0x01 },
+
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x02 },
+     { 0x01, 0x01 },
+     { 0x02, 0xda },
+     { 0x03, 0xba },
+     { 0x04, 0xa8 },
+     { 0x05, 0x9a },
+     { 0x06, 0x70 },
+     { 0x07, 0xff },
+     { 0x08, 0x91 },
+     { 0x09, 0x90 },
+     { 0x0a, 0xff },
+     { 0x0b, 0x8f },
+     { 0x0c, 0x60 },
+     { 0x0d, 0x58 },
+     { 0x0e, 0x48 },
+     { 0x0f, 0x38 },
+     { 0x10, 0x2b },
+
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x00 },
+     { 0x36, 0x0a },
+};
+
+static inline struct nv3052c *to_nv3052c(struct drm_panel *panel)
+{
+     return container_of(panel, struct nv3052c, panel);
+}
+
+static int nv3052c_prepare(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     unsigned int i;
+     int err;
+
+     err = regulator_enable(priv->supply);
+     if (err) {
+             dev_err(priv->dev, "Failed to enable power supply: %d\n", err);
+             return err;
+     }
+
+     /* Reset the chip */
+     gpiod_set_value_cansleep(priv->reset_gpio, 1);
+     usleep_range(10, 1000);
+     gpiod_set_value_cansleep(priv->reset_gpio, 0);
+     msleep(5);
+
+     for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {
+             err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
+                                    nv3052c_panel_regs[i].val);
+
+             if (err) {
+                     dev_err(priv->dev, "Unable to set register: %d\n", err);
+                     goto err_disable_regulator;
+             }
+     }
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
+     if (err) {
+             dev_err(priv->dev, "Unable to exit sleep mode: %d\n", err);
+             goto err_disable_regulator;
+     }
+
+     return 0;
+
+err_disable_regulator:
+     regulator_disable(priv->supply);
+     return err;
+}
+
+static int nv3052c_unprepare(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     int err;
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE);
+     if (err) {
+             dev_err(priv->dev, "Unable to enter sleep mode: %d\n", err);
+             return err;
+     }
+
+     gpiod_set_value_cansleep(priv->reset_gpio, 1);
+     regulator_disable(priv->supply);
+
+     return 0;
+}
+
+static int nv3052c_enable(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     int err;
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
+     if (err) {
+             dev_err(priv->dev, "Unable to enable display: %d\n", err);
+             return err;
Quoted 9 lines

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 325

Quoted 5 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +5 -0
+     }
+
+     if (panel->backlight) {
+             /* Wait for the picture to be ready before enabling backlight */
+             msleep(120);

From my own test this msleep can go. Modesets don't seem to cause any
graphical glitches.

Not in my own testing, maybe some panel variance there? 30ms is not enough to get rid of artefacts when starting apps, but 120ms is. So I suggest to just leave it there, it's not like such a short delay is really noticeable anyway.

KR
CB

Quoted 187 lines

The driver looks fine to me overall, I just need somebody else (Sam?) to ack it before I can merge it.

Cheers,
-Paul

Quoted 179 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +81 -0
+     }
+
+     return 0;
+}
+
+static int nv3052c_disable(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     int err;
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
+     if (err) {
+             dev_err(priv->dev, "Unable to disable display: %d\n", err);
+             return err;
+     }
+
+     return 0;
+}
+
+static int nv3052c_get_modes(struct drm_panel *panel,
+                          struct drm_connector *connector)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     const struct nv3052c_panel_info *panel_info = priv->panel_info;
+     struct drm_display_mode *mode;
+     unsigned int i;
+
+     for (i = 0; i < panel_info->num_modes; i++) {
+             mode = drm_mode_duplicate(connector->dev,
+                                       &panel_info->display_modes[i]);
+             if (!mode)
+                     return -ENOMEM;
+
+             drm_mode_set_name(mode);
+
+             mode->type = DRM_MODE_TYPE_DRIVER;
+             if (panel_info->num_modes == 1)
+                     mode->type |= DRM_MODE_TYPE_PREFERRED;
+
+             drm_mode_probed_add(connector, mode);
+     }
+
+     connector->display_info.bpc = 8;
+     connector->display_info.width_mm = panel_info->width_mm;
+     connector->display_info.height_mm = panel_info->height_mm;
+
+     drm_display_info_set_bus_formats(&connector->display_info,
+                                      &panel_info->bus_format, 1);
+     connector->display_info.bus_flags = panel_info->bus_flags;
+
+     return panel_info->num_modes;
+}
+
+static const struct drm_panel_funcs nv3052c_funcs = {
+     .prepare        = nv3052c_prepare,
+     .unprepare      = nv3052c_unprepare,
+     .enable         = nv3052c_enable,
+     .disable        = nv3052c_disable,
+     .get_modes      = nv3052c_get_modes,
+};
+
+static int nv3052c_probe(struct spi_device *spi)
+{
+     struct device *dev = &spi->dev;
+     struct nv3052c *priv;
+     int err;
+
+     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+     if (!priv)
+             return -ENOMEM;
+
+     priv->dev = dev;
+
+     priv->panel_info = of_device_get_match_data(dev);
+     if (!priv->panel_info)
+             return -EINVAL;
+
+     priv->supply = devm_regulator_get(dev, "power");
+     if (IS_ERR(priv->supply))
+             return dev_err_probe(dev, PTR_ERR(priv->supply), "Failed to get

power supply\n");

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +4 -0
+
+     priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+     if (IS_ERR(priv->reset_gpio))
+             return dev_err_probe(dev, PTR_ERR(priv->reset_gpio), "Failed to

get reset GPIO\n");

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +66 -0
+
+     err = mipi_dbi_spi_init(spi, &priv->dbi, NULL);
+     if (err)
+             return dev_err_probe(dev, err, "MIPI DBI init failed\n");
+
+     priv->dbi.read_commands = NULL;
+
+     spi_set_drvdata(spi, priv);
+
+     drm_panel_init(&priv->panel, dev, &nv3052c_funcs,
+                    DRM_MODE_CONNECTOR_DPI);
+
+     err = drm_panel_of_backlight(&priv->panel);
+     if (err)
+             return dev_err_probe(dev, err, "Failed to attach backlight\n");
+
+     drm_panel_add(&priv->panel);
+
+     return 0;
+}
+
+static int nv3052c_remove(struct spi_device *spi)
+{
+     struct nv3052c *priv = spi_get_drvdata(spi);
+
+     drm_panel_remove(&priv->panel);
+     drm_panel_disable(&priv->panel);
+     drm_panel_unprepare(&priv->panel);
+
+     return 0;
+}
+
+static const struct drm_display_mode ltk035c5444t_modes[] = {
+     { /* 60 Hz */
+             .clock = 24000,
+             .hdisplay = 640,
+             .hsync_start = 640 + 96,
+             .hsync_end = 640 + 96 + 16,
+             .htotal = 640 + 96 + 16 + 48,
+             .vdisplay = 480,
+             .vsync_start = 480 + 5,
+             .vsync_end = 480 + 5 + 2,
+             .vtotal = 480 + 5 + 2 + 13,
+             .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+     },
+     { /* 50 Hz */
+             .clock = 18000,
+             .hdisplay = 640,
+             .hsync_start = 640 + 39,
+             .hsync_end = 640 + 39 + 2,
+             .htotal = 640 + 39 + 2 + 39,
+             .vdisplay = 480,
+             .vsync_start = 480 + 5,
+             .vsync_end = 480 + 5 + 2,
+             .vtotal = 480 + 5 + 2 + 13,
+             .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+     },
+};
+
+static const struct nv3052c_panel_info ltk035c5444t_panel_info = {
+     .display_modes = ltk035c5444t_modes,
+     .num_modes = ARRAY_SIZE(ltk035c5444t_modes),
+     .width_mm = 77,
+     .height_mm = 64,
+     .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+     .bus_flags = DRM_BUS_FLAG_DE_HIGH |

DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +4 -0
+};
+
+static const struct of_device_id nv3052c_of_match[] = {
+     { .compatible = "leadtek,ltk035c5444t", .data =

&ltk035c5444t_panel_info },

drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +17 -1
+     { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, nv3052c_of_match);
+
+static struct spi_driver nv3052c_driver = {
+     .driver = {
+             .name = "nv3052c",
+             .of_match_table = nv3052c_of_match,
+     },
+     .probe = nv3052c_probe,
+     .remove = nv3052c_remove,
+};
+module_spi_driver(nv3052c_driver);
+
+MODULE_AUTHOR("Paul Cercueil <[email protected]>");
+MODULE_AUTHOR("Christophe Branchereau <[email protected]>");
+MODULE_LICENSE("GPL v2");
--

2.35.1

Reviewed-by on v4 2/4
#6 lore raw

Re: [PATCH v4 2/4] drm/panel: Add panel driver for NewVision NV3052C based LCDs

In reply to Christophe Branchereau

Hi Christophe,

Quoted 3 lines · Christophe Branchereau

This driver supports the NewVision NV3052C based LCDs. Right now, it only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which can be found in the Anbernic RG-350M handheld console.

I had to get away from my day-time job and you were the lucky winner. A couple of comments in the following that you can address now or later.

Quoted 2 lines
Signed-off-by Christophe Branchereau <[email protected]>
Reviewed-by Sam Ravnborg <[email protected]>
Quoted 279 lines
---
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 .../gpu/drm/panel/panel-newvision-nv3052c.c   | 497 ++++++++++++++++++
 3 files changed, 507 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-newvision-nv3052c.c
drivers/gpu/drm/panel/Kconfig +9 -0
index bb2e47229c68..40084f709789 100644
@@ -283,6 +283,15 @@ config DRM_PANEL_NEC_NL8048HL11
 	  panel (found on the Zoom2/3/3630 SDP boards). To compile this driver
 	  as a module, choose M here.
 
+config DRM_PANEL_NEWVISION_NV3052C
+	tristate "NewVision NV3052C RGB/SPI panel"
+	depends on OF && SPI
+	depends on BACKLIGHT_CLASS_DEVICE
+	select DRM_MIPI_DBI
+	help
+	  Say Y here if you want to enable support for the panels built
+	  around the NewVision NV3052C display controller.
+
 config DRM_PANEL_NOVATEK_NT35510
 	tristate "Novatek NT35510 RGB panel driver"
 	depends on OF
drivers/gpu/drm/panel/Makefile +1 -0
index 5740911f637c..42a7ab54234b 100644
@@ -26,6 +26,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o
 obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o
 obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o
 obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
+obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +234 -0
new file mode 100644
index 000000000000..fc31df0dee12
@@ -0,0 +1,497 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * NevVision NV3052C IPS LCD panel driver
+ *
+ * Copyright (C) 2020, Paul Cercueil <[email protected]>
+ * Copyright (C) 2022, Christophe Branchereau <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/media-bus-format.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/spi/spi.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dbi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+struct nv3052c_panel_info {
+	const struct drm_display_mode *display_modes;
+	unsigned int num_modes;
+	u16 width_mm, height_mm;
+	u32 bus_format, bus_flags;
+};
+
+struct nv3052c {
+	struct device *dev;
+	struct drm_panel panel;
+	struct mipi_dbi dbi;
+
+	const struct nv3052c_panel_info *panel_info;
+
+	struct regulator *supply;
+	struct gpio_desc *reset_gpio;
+};
+
+struct nv3052c_reg {
+	u8 cmd;
+	u8 val;
+};
+
+static const struct nv3052c_reg nv3052c_panel_regs[] = {
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x01 },
+	{ 0xe3, 0x00 },
+	{ 0x40, 0x00 },
+	{ 0x03, 0x40 },
+	{ 0x04, 0x00 },
+	{ 0x05, 0x03 },
+	{ 0x08, 0x00 },
+	{ 0x09, 0x07 },
+	{ 0x0a, 0x01 },
+	{ 0x0b, 0x32 },
+	{ 0x0c, 0x32 },
+	{ 0x0d, 0x0b },
+	{ 0x0e, 0x00 },
+	{ 0x23, 0xa0 },
+
+	{ 0x24, 0x0c },
+	{ 0x25, 0x06 },
+	{ 0x26, 0x14 },
+	{ 0x27, 0x14 },
+
+	{ 0x38, 0xcc },
+	{ 0x39, 0xd7 },
+	{ 0x3a, 0x4a },
+
+	{ 0x28, 0x40 },
+	{ 0x29, 0x01 },
+	{ 0x2a, 0xdf },
+	{ 0x49, 0x3c },
+	{ 0x91, 0x77 },
+	{ 0x92, 0x77 },
+	{ 0xa0, 0x55 },
+	{ 0xa1, 0x50 },
+	{ 0xa4, 0x9c },
+	{ 0xa7, 0x02 },
+	{ 0xa8, 0x01 },
+	{ 0xa9, 0x01 },
+	{ 0xaa, 0xfc },
+	{ 0xab, 0x28 },
+	{ 0xac, 0x06 },
+	{ 0xad, 0x06 },
+	{ 0xae, 0x06 },
+	{ 0xaf, 0x03 },
+	{ 0xb0, 0x08 },
+	{ 0xb1, 0x26 },
+	{ 0xb2, 0x28 },
+	{ 0xb3, 0x28 },
+	{ 0xb4, 0x33 },
+	{ 0xb5, 0x08 },
+	{ 0xb6, 0x26 },
+	{ 0xb7, 0x08 },
+	{ 0xb8, 0x26 },
+	{ 0xf0, 0x00 },
+	{ 0xf6, 0xc0 },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x02 },
+	{ 0xb0, 0x0b },
+	{ 0xb1, 0x16 },
+	{ 0xb2, 0x17 },
+	{ 0xb3, 0x2c },
+	{ 0xb4, 0x32 },
+	{ 0xb5, 0x3b },
+	{ 0xb6, 0x29 },
+	{ 0xb7, 0x40 },
+	{ 0xb8, 0x0d },
+	{ 0xb9, 0x05 },
+	{ 0xba, 0x12 },
+	{ 0xbb, 0x10 },
+	{ 0xbc, 0x12 },
+	{ 0xbd, 0x15 },
+	{ 0xbe, 0x19 },
+	{ 0xbf, 0x0e },
+	{ 0xc0, 0x16 },
+	{ 0xc1, 0x0a },
+	{ 0xd0, 0x0c },
+	{ 0xd1, 0x17 },
+	{ 0xd2, 0x14 },
+	{ 0xd3, 0x2e },
+	{ 0xd4, 0x32 },
+	{ 0xd5, 0x3c },
+	{ 0xd6, 0x22 },
+	{ 0xd7, 0x3d },
+	{ 0xd8, 0x0d },
+	{ 0xd9, 0x07 },
+	{ 0xda, 0x13 },
+	{ 0xdb, 0x13 },
+	{ 0xdc, 0x11 },
+	{ 0xdd, 0x15 },
+	{ 0xde, 0x19 },
+	{ 0xdf, 0x10 },
+	{ 0xe0, 0x17 },
+	{ 0xe1, 0x0a },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x03 },
+	{ 0x00, 0x2a },
+	{ 0x01, 0x2a },
+	{ 0x02, 0x2a },
+	{ 0x03, 0x2a },
+	{ 0x04, 0x61 },
+	{ 0x05, 0x80 },
+	{ 0x06, 0xc7 },
+	{ 0x07, 0x01 },
+	{ 0x08, 0x03 },
+	{ 0x09, 0x04 },
+	{ 0x70, 0x22 },
+	{ 0x71, 0x80 },
+	{ 0x30, 0x2a },
+	{ 0x31, 0x2a },
+	{ 0x32, 0x2a },
+	{ 0x33, 0x2a },
+	{ 0x34, 0x61 },
+	{ 0x35, 0xc5 },
+	{ 0x36, 0x80 },
+	{ 0x37, 0x23 },
+	{ 0x40, 0x03 },
+	{ 0x41, 0x04 },
+	{ 0x42, 0x05 },
+	{ 0x43, 0x06 },
+	{ 0x44, 0x11 },
+	{ 0x45, 0xe8 },
+	{ 0x46, 0xe9 },
+	{ 0x47, 0x11 },
+	{ 0x48, 0xea },
+	{ 0x49, 0xeb },
+	{ 0x50, 0x07 },
+	{ 0x51, 0x08 },
+	{ 0x52, 0x09 },
+	{ 0x53, 0x0a },
+	{ 0x54, 0x11 },
+	{ 0x55, 0xec },
+	{ 0x56, 0xed },
+	{ 0x57, 0x11 },
+	{ 0x58, 0xef },
+	{ 0x59, 0xf0 },
+	{ 0xb1, 0x01 },
+	{ 0xb4, 0x15 },
+	{ 0xb5, 0x16 },
+	{ 0xb6, 0x09 },
+	{ 0xb7, 0x0f },
+	{ 0xb8, 0x0d },
+	{ 0xb9, 0x0b },
+	{ 0xba, 0x00 },
+	{ 0xc7, 0x02 },
+	{ 0xca, 0x17 },
+	{ 0xcb, 0x18 },
+	{ 0xcc, 0x0a },
+	{ 0xcd, 0x10 },
+	{ 0xce, 0x0e },
+	{ 0xcf, 0x0c },
+	{ 0xd0, 0x00 },
+	{ 0x81, 0x00 },
+	{ 0x84, 0x15 },
+	{ 0x85, 0x16 },
+	{ 0x86, 0x10 },
+	{ 0x87, 0x0a },
+	{ 0x88, 0x0c },
+	{ 0x89, 0x0e },
+	{ 0x8a, 0x02 },
+	{ 0x97, 0x00 },
+	{ 0x9a, 0x17 },
+	{ 0x9b, 0x18 },
+	{ 0x9c, 0x0f },
+	{ 0x9d, 0x09 },
+	{ 0x9e, 0x0b },
+	{ 0x9f, 0x0d },
+	{ 0xa0, 0x01 },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x02 },
+	{ 0x01, 0x01 },
+	{ 0x02, 0xda },
+	{ 0x03, 0xba },
+	{ 0x04, 0xa8 },
+	{ 0x05, 0x9a },
+	{ 0x06, 0x70 },
+	{ 0x07, 0xff },
+	{ 0x08, 0x91 },
+	{ 0x09, 0x90 },
+	{ 0x0a, 0xff },
+	{ 0x0b, 0x8f },
+	{ 0x0c, 0x60 },

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 244

Quoted 10 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +10 -0
+	{ 0x0d, 0x58 },
+	{ 0x0e, 0x48 },
+	{ 0x0f, 0x38 },
+	{ 0x10, 0x2b },
+
+	{ 0xff, 0x30 },
+	{ 0xff, 0x52 },
+	{ 0xff, 0x00 },
+	{ 0x36, 0x0a },
+};

There are some random (?) empty lines.
If they have any significance then a short comment would be nice. If not, then drop the empty lines.

Quoted 48 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +48 -0
+
+static inline struct nv3052c *to_nv3052c(struct drm_panel *panel)
+{
+	return container_of(panel, struct nv3052c, panel);
+}
+
+static int nv3052c_prepare(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	unsigned int i;
+	int err;
+
+	err = regulator_enable(priv->supply);
+	if (err) {
+		dev_err(priv->dev, "Failed to enable power supply: %d\n", err);
+		return err;
+	}
+
+	/* Reset the chip */
+	gpiod_set_value_cansleep(priv->reset_gpio, 1);
+	usleep_range(10, 1000);
+	gpiod_set_value_cansleep(priv->reset_gpio, 0);
+	msleep(5);
+
+	for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {
+		err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
+				       nv3052c_panel_regs[i].val);
+
+		if (err) {
+			dev_err(priv->dev, "Unable to set register: %d\n", err);
+			goto err_disable_regulator;
+		}
+	}
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
+	if (err) {
+		dev_err(priv->dev, "Unable to exit sleep mode: %d\n", err);
+		goto err_disable_regulator;
+	}
+
+	return 0;
+
+err_disable_regulator:
+	regulator_disable(priv->supply);
+	return err;
+}
+

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 302

Quoted 10 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +10 -0
+static int nv3052c_unprepare(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	int err;
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE);
+	if (err) {
+		dev_err(priv->dev, "Unable to enter sleep mode: %d\n", err);
+		return err;

Consider to just continue here. In case we fail to enter sleep mode we will anyway reset the panel and disable the supply voltage. So things will likely work anyway and we avoid a display with power where it was supposed to be disabled.
I bet many panels uses the same pattern as this driver, but I think that continue is the right thing to do here.

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 309

Quoted 7 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +7 -0
+	}
+
+	gpiod_set_value_cansleep(priv->reset_gpio, 1);
+	regulator_disable(priv->supply);
+
+	return 0;
+}

Everything else looked good - nicely written driver.

Sam

Quoted 190 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +188 -0
+
+static int nv3052c_enable(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	int err;
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
+	if (err) {
+		dev_err(priv->dev, "Unable to enable display: %d\n", err);
+		return err;
+	}
+
+	if (panel->backlight) {
+		/* Wait for the picture to be ready before enabling backlight */
+		msleep(120);
+	}
+
+	return 0;
+}
+
+static int nv3052c_disable(struct drm_panel *panel)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	struct mipi_dbi *dbi = &priv->dbi;
+	int err;
+
+	err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
+	if (err) {
+		dev_err(priv->dev, "Unable to disable display: %d\n", err);
+		return err;
+	}
+
+	return 0;
+}
+
+static int nv3052c_get_modes(struct drm_panel *panel,
+			     struct drm_connector *connector)
+{
+	struct nv3052c *priv = to_nv3052c(panel);
+	const struct nv3052c_panel_info *panel_info = priv->panel_info;
+	struct drm_display_mode *mode;
+	unsigned int i;
+
+	for (i = 0; i < panel_info->num_modes; i++) {
+		mode = drm_mode_duplicate(connector->dev,
+					  &panel_info->display_modes[i]);
+		if (!mode)
+			return -ENOMEM;
+
+		drm_mode_set_name(mode);
+
+		mode->type = DRM_MODE_TYPE_DRIVER;
+		if (panel_info->num_modes == 1)
+			mode->type |= DRM_MODE_TYPE_PREFERRED;
+
+		drm_mode_probed_add(connector, mode);
+	}
+
+	connector->display_info.bpc = 8;
+	connector->display_info.width_mm = panel_info->width_mm;
+	connector->display_info.height_mm = panel_info->height_mm;
+
+	drm_display_info_set_bus_formats(&connector->display_info,
+					 &panel_info->bus_format, 1);
+	connector->display_info.bus_flags = panel_info->bus_flags;
+
+	return panel_info->num_modes;
+}
+
+static const struct drm_panel_funcs nv3052c_funcs = {
+	.prepare	= nv3052c_prepare,
+	.unprepare	= nv3052c_unprepare,
+	.enable		= nv3052c_enable,
+	.disable	= nv3052c_disable,
+	.get_modes	= nv3052c_get_modes,
+};
+
+static int nv3052c_probe(struct spi_device *spi)
+{
+	struct device *dev = &spi->dev;
+	struct nv3052c *priv;
+	int err;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = dev;
+
+	priv->panel_info = of_device_get_match_data(dev);
+	if (!priv->panel_info)
+		return -EINVAL;
+
+	priv->supply = devm_regulator_get(dev, "power");
+	if (IS_ERR(priv->supply))
+		return dev_err_probe(dev, PTR_ERR(priv->supply), "Failed to get power supply\n");
+
+	priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(priv->reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(priv->reset_gpio), "Failed to get reset GPIO\n");
+
+	err = mipi_dbi_spi_init(spi, &priv->dbi, NULL);
+	if (err)
+		return dev_err_probe(dev, err, "MIPI DBI init failed\n");
+
+	priv->dbi.read_commands = NULL;
+
+	spi_set_drvdata(spi, priv);
+
+	drm_panel_init(&priv->panel, dev, &nv3052c_funcs,
+		       DRM_MODE_CONNECTOR_DPI);
+
+	err = drm_panel_of_backlight(&priv->panel);
+	if (err)
+		return dev_err_probe(dev, err, "Failed to attach backlight\n");
+
+	drm_panel_add(&priv->panel);
+
+	return 0;
+}
+
+static int nv3052c_remove(struct spi_device *spi)
+{
+	struct nv3052c *priv = spi_get_drvdata(spi);
+
+	drm_panel_remove(&priv->panel);
+	drm_panel_disable(&priv->panel);
+	drm_panel_unprepare(&priv->panel);
+
+	return 0;
+}
+
+static const struct drm_display_mode ltk035c5444t_modes[] = {
+	{ /* 60 Hz */
+		.clock = 24000,
+		.hdisplay = 640,
+		.hsync_start = 640 + 96,
+		.hsync_end = 640 + 96 + 16,
+		.htotal = 640 + 96 + 16 + 48,
+		.vdisplay = 480,
+		.vsync_start = 480 + 5,
+		.vsync_end = 480 + 5 + 2,
+		.vtotal = 480 + 5 + 2 + 13,
+		.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+	},
+	{ /* 50 Hz */
+		.clock = 18000,
+		.hdisplay = 640,
+		.hsync_start = 640 + 39,
+		.hsync_end = 640 + 39 + 2,
+		.htotal = 640 + 39 + 2 + 39,
+		.vdisplay = 480,
+		.vsync_start = 480 + 5,
+		.vsync_end = 480 + 5 + 2,
+		.vtotal = 480 + 5 + 2 + 13,
+		.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+	},
+};
+
+static const struct nv3052c_panel_info ltk035c5444t_panel_info = {
+	.display_modes = ltk035c5444t_modes,
+	.num_modes = ARRAY_SIZE(ltk035c5444t_modes),
+	.width_mm = 77,
+	.height_mm = 64,
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+	.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
+};
+
+static const struct of_device_id nv3052c_of_match[] = {
+	{ .compatible = "leadtek,ltk035c5444t", .data = &ltk035c5444t_panel_info },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, nv3052c_of_match);
+
+static struct spi_driver nv3052c_driver = {
+	.driver = {
+		.name = "nv3052c",
+		.of_match_table = nv3052c_of_match,
+	},
+	.probe = nv3052c_probe,
+	.remove = nv3052c_remove,
+};
+module_spi_driver(nv3052c_driver);
+
+MODULE_AUTHOR("Paul Cercueil <[email protected]>");
+MODULE_AUTHOR("Christophe Branchereau <[email protected]>");
+MODULE_LICENSE("GPL v2");
Signature · 1 line
2.35.1
author
#7 lore raw

Re: [PATCH v4 2/4] drm/panel: Add panel driver for NewVision NV3052C based LCDs

Hello Sam

Quoted 297 lines · Sam Ravnborg

Hi Christophe,

Quoted 3 lines · Christophe Branchereau

This driver supports the NewVision NV3052C based LCDs. Right now, it only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which can be found in the Anbernic RG-350M handheld console.

I had to get away from my day-time job and you were the lucky winner. A couple of comments in the following that you can address now or later.

Quoted 2 lines
Signed-off-by Christophe Branchereau <[email protected]>
Reviewed-by Sam Ravnborg <[email protected]>
Quoted 284 lines
---
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 .../gpu/drm/panel/panel-newvision-nv3052c.c   | 497 ++++++++++++++++++
 3 files changed, 507 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-newvision-nv3052c.c
drivers/gpu/drm/panel/Kconfig +9 -0
index bb2e47229c68..40084f709789 100644
@@ -283,6 +283,15 @@ config DRM_PANEL_NEC_NL8048HL11
        panel (found on the Zoom2/3/3630 SDP boards). To compile this driver
        as a module, choose M here.
 
+config DRM_PANEL_NEWVISION_NV3052C
+     tristate "NewVision NV3052C RGB/SPI panel"
+     depends on OF && SPI
+     depends on BACKLIGHT_CLASS_DEVICE
+     select DRM_MIPI_DBI
+     help
+       Say Y here if you want to enable support for the panels built
+       around the NewVision NV3052C display controller.
+
 config DRM_PANEL_NOVATEK_NT35510
      tristate "Novatek NT35510 RGB panel driver"
      depends on OF
drivers/gpu/drm/panel/Makefile +1 -0
index 5740911f637c..42a7ab54234b 100644
@@ -26,6 +26,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o
 obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o
 obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o
 obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
+obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +239 -0
new file mode 100644
index 000000000000..fc31df0dee12
@@ -0,0 +1,497 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * NevVision NV3052C IPS LCD panel driver
+ *
+ * Copyright (C) 2020, Paul Cercueil <[email protected]>
+ * Copyright (C) 2022, Christophe Branchereau <[email protected]>
+ */
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/media-bus-format.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/spi/spi.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dbi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+struct nv3052c_panel_info {
+     const struct drm_display_mode *display_modes;
+     unsigned int num_modes;
+     u16 width_mm, height_mm;
+     u32 bus_format, bus_flags;
+};
+
+struct nv3052c {
+     struct device *dev;
+     struct drm_panel panel;
+     struct mipi_dbi dbi;
+
+     const struct nv3052c_panel_info *panel_info;
+
+     struct regulator *supply;
+     struct gpio_desc *reset_gpio;
+};
+
+struct nv3052c_reg {
+     u8 cmd;
+     u8 val;
+};
+
+static const struct nv3052c_reg nv3052c_panel_regs[] = {
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x01 },
+     { 0xe3, 0x00 },
+     { 0x40, 0x00 },
+     { 0x03, 0x40 },
+     { 0x04, 0x00 },
+     { 0x05, 0x03 },
+     { 0x08, 0x00 },
+     { 0x09, 0x07 },
+     { 0x0a, 0x01 },
+     { 0x0b, 0x32 },
+     { 0x0c, 0x32 },
+     { 0x0d, 0x0b },
+     { 0x0e, 0x00 },
+     { 0x23, 0xa0 },
+
+     { 0x24, 0x0c },
+     { 0x25, 0x06 },
+     { 0x26, 0x14 },
+     { 0x27, 0x14 },
+
+     { 0x38, 0xcc },
+     { 0x39, 0xd7 },
+     { 0x3a, 0x4a },
+
+     { 0x28, 0x40 },
+     { 0x29, 0x01 },
+     { 0x2a, 0xdf },
+     { 0x49, 0x3c },
+     { 0x91, 0x77 },
+     { 0x92, 0x77 },
+     { 0xa0, 0x55 },
+     { 0xa1, 0x50 },
+     { 0xa4, 0x9c },
+     { 0xa7, 0x02 },
+     { 0xa8, 0x01 },
+     { 0xa9, 0x01 },
+     { 0xaa, 0xfc },
+     { 0xab, 0x28 },
+     { 0xac, 0x06 },
+     { 0xad, 0x06 },
+     { 0xae, 0x06 },
+     { 0xaf, 0x03 },
+     { 0xb0, 0x08 },
+     { 0xb1, 0x26 },
+     { 0xb2, 0x28 },
+     { 0xb3, 0x28 },
+     { 0xb4, 0x33 },
+     { 0xb5, 0x08 },
+     { 0xb6, 0x26 },
+     { 0xb7, 0x08 },
+     { 0xb8, 0x26 },
+     { 0xf0, 0x00 },
+     { 0xf6, 0xc0 },
+
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x02 },
+     { 0xb0, 0x0b },
+     { 0xb1, 0x16 },
+     { 0xb2, 0x17 },
+     { 0xb3, 0x2c },
+     { 0xb4, 0x32 },
+     { 0xb5, 0x3b },
+     { 0xb6, 0x29 },
+     { 0xb7, 0x40 },
+     { 0xb8, 0x0d },
+     { 0xb9, 0x05 },
+     { 0xba, 0x12 },
+     { 0xbb, 0x10 },
+     { 0xbc, 0x12 },
+     { 0xbd, 0x15 },
+     { 0xbe, 0x19 },
+     { 0xbf, 0x0e },
+     { 0xc0, 0x16 },
+     { 0xc1, 0x0a },
+     { 0xd0, 0x0c },
+     { 0xd1, 0x17 },
+     { 0xd2, 0x14 },
+     { 0xd3, 0x2e },
+     { 0xd4, 0x32 },
+     { 0xd5, 0x3c },
+     { 0xd6, 0x22 },
+     { 0xd7, 0x3d },
+     { 0xd8, 0x0d },
+     { 0xd9, 0x07 },
+     { 0xda, 0x13 },
+     { 0xdb, 0x13 },
+     { 0xdc, 0x11 },
+     { 0xdd, 0x15 },
+     { 0xde, 0x19 },
+     { 0xdf, 0x10 },
+     { 0xe0, 0x17 },
+     { 0xe1, 0x0a },
+
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x03 },
+     { 0x00, 0x2a },
+     { 0x01, 0x2a },
+     { 0x02, 0x2a },
+     { 0x03, 0x2a },
+     { 0x04, 0x61 },
+     { 0x05, 0x80 },
+     { 0x06, 0xc7 },
+     { 0x07, 0x01 },
+     { 0x08, 0x03 },
+     { 0x09, 0x04 },
+     { 0x70, 0x22 },
+     { 0x71, 0x80 },
+     { 0x30, 0x2a },
+     { 0x31, 0x2a },
+     { 0x32, 0x2a },
+     { 0x33, 0x2a },
+     { 0x34, 0x61 },
+     { 0x35, 0xc5 },
+     { 0x36, 0x80 },
+     { 0x37, 0x23 },
+     { 0x40, 0x03 },
+     { 0x41, 0x04 },
+     { 0x42, 0x05 },
+     { 0x43, 0x06 },
+     { 0x44, 0x11 },
+     { 0x45, 0xe8 },
+     { 0x46, 0xe9 },
+     { 0x47, 0x11 },
+     { 0x48, 0xea },
+     { 0x49, 0xeb },
+     { 0x50, 0x07 },
+     { 0x51, 0x08 },
+     { 0x52, 0x09 },
+     { 0x53, 0x0a },
+     { 0x54, 0x11 },
+     { 0x55, 0xec },
+     { 0x56, 0xed },
+     { 0x57, 0x11 },
+     { 0x58, 0xef },
+     { 0x59, 0xf0 },
+     { 0xb1, 0x01 },
+     { 0xb4, 0x15 },
+     { 0xb5, 0x16 },
+     { 0xb6, 0x09 },
+     { 0xb7, 0x0f },
+     { 0xb8, 0x0d },
+     { 0xb9, 0x0b },
+     { 0xba, 0x00 },
+     { 0xc7, 0x02 },
+     { 0xca, 0x17 },
+     { 0xcb, 0x18 },
+     { 0xcc, 0x0a },
+     { 0xcd, 0x10 },
+     { 0xce, 0x0e },
+     { 0xcf, 0x0c },
+     { 0xd0, 0x00 },
+     { 0x81, 0x00 },
+     { 0x84, 0x15 },
+     { 0x85, 0x16 },
+     { 0x86, 0x10 },
+     { 0x87, 0x0a },
+     { 0x88, 0x0c },
+     { 0x89, 0x0e },
+     { 0x8a, 0x02 },
+     { 0x97, 0x00 },
+     { 0x9a, 0x17 },
+     { 0x9b, 0x18 },
+     { 0x9c, 0x0f },
+     { 0x9d, 0x09 },
+     { 0x9e, 0x0b },
+     { 0x9f, 0x0d },
+     { 0xa0, 0x01 },
+
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x02 },
+     { 0x01, 0x01 },
+     { 0x02, 0xda },
+     { 0x03, 0xba },
+     { 0x04, 0xa8 },
+     { 0x05, 0x9a },
+     { 0x06, 0x70 },
+     { 0x07, 0xff },
+     { 0x08, 0x91 },
+     { 0x09, 0x90 },
+     { 0x0a, 0xff },
+     { 0x0b, 0x8f },
+     { 0x0c, 0x60 },
+     { 0x0d, 0x58 },
+     { 0x0e, 0x48 },
+     { 0x0f, 0x38 },
+     { 0x10, 0x2b },
+
Quoted 9 lines

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 244

Quoted 5 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +5 -0
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x00 },
+     { 0x36, 0x0a },
+};

There are some random (?) empty lines.
If they have any significance then a short comment would be nice. If not, then drop the empty lines.

The empty lines are not random no, to access a different page in the
init, one must write i.e. { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff,
0x02 }, to access page 2, so they add a little bit of readability.

But I can drop them indeed. as well as for the includes and struct on top, to make it more compact.

Quoted 56 lines
Quoted 56 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +56 -0
+
+static inline struct nv3052c *to_nv3052c(struct drm_panel *panel)
+{
+     return container_of(panel, struct nv3052c, panel);
+}
+
+static int nv3052c_prepare(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     unsigned int i;
+     int err;
+
+     err = regulator_enable(priv->supply);
+     if (err) {
+             dev_err(priv->dev, "Failed to enable power supply: %d\n", err);
+             return err;
+     }
+
+     /* Reset the chip */
+     gpiod_set_value_cansleep(priv->reset_gpio, 1);
+     usleep_range(10, 1000);
+     gpiod_set_value_cansleep(priv->reset_gpio, 0);
+     msleep(5);
+
+     for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {
+             err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
+                                    nv3052c_panel_regs[i].val);
+
+             if (err) {
+                     dev_err(priv->dev, "Unable to set register: %d\n", err);
+                     goto err_disable_regulator;
+             }
+     }
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
+     if (err) {
+             dev_err(priv->dev, "Unable to exit sleep mode: %d\n", err);
+             goto err_disable_regulator;
+     }
+
+     return 0;
+
+err_disable_regulator:
+     regulator_disable(priv->supply);
+     return err;
+}
+
+static int nv3052c_unprepare(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     int err;
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE);
+     if (err) {
Quoted 9 lines

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 302

Quoted 2 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +2 -0
+             dev_err(priv->dev, "Unable to enter sleep mode: %d\n", err);
+             return err;

Consider to just continue here. In case we fail to enter sleep mode we will anyway reset the panel and disable the supply voltage. So things will likely work anyway and we avoid a display with power where it was supposed to be disabled.
I bet many panels uses the same pattern as this driver, but I think that continue is the right thing to do here.

Yes, you're right.

Quoted 11 lines

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 309

Quoted 8 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +7 -0
+     }
+
+     gpiod_set_value_cansleep(priv->reset_gpio, 1);
+     regulator_disable(priv->supply);
+
+     return 0;
+}

Everything else looked good - nicely written driver.

Quoted 1 line

Sam

Thank you

Quoted 191 lines
Quoted 191 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +188 -1
+
+static int nv3052c_enable(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     int err;
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
+     if (err) {
+             dev_err(priv->dev, "Unable to enable display: %d\n", err);
+             return err;
+     }
+
+     if (panel->backlight) {
+             /* Wait for the picture to be ready before enabling backlight */
+             msleep(120);
+     }
+
+     return 0;
+}
+
+static int nv3052c_disable(struct drm_panel *panel)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     struct mipi_dbi *dbi = &priv->dbi;
+     int err;
+
+     err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
+     if (err) {
+             dev_err(priv->dev, "Unable to disable display: %d\n", err);
+             return err;
+     }
+
+     return 0;
+}
+
+static int nv3052c_get_modes(struct drm_panel *panel,
+                          struct drm_connector *connector)
+{
+     struct nv3052c *priv = to_nv3052c(panel);
+     const struct nv3052c_panel_info *panel_info = priv->panel_info;
+     struct drm_display_mode *mode;
+     unsigned int i;
+
+     for (i = 0; i < panel_info->num_modes; i++) {
+             mode = drm_mode_duplicate(connector->dev,
+                                       &panel_info->display_modes[i]);
+             if (!mode)
+                     return -ENOMEM;
+
+             drm_mode_set_name(mode);
+
+             mode->type = DRM_MODE_TYPE_DRIVER;
+             if (panel_info->num_modes == 1)
+                     mode->type |= DRM_MODE_TYPE_PREFERRED;
+
+             drm_mode_probed_add(connector, mode);
+     }
+
+     connector->display_info.bpc = 8;
+     connector->display_info.width_mm = panel_info->width_mm;
+     connector->display_info.height_mm = panel_info->height_mm;
+
+     drm_display_info_set_bus_formats(&connector->display_info,
+                                      &panel_info->bus_format, 1);
+     connector->display_info.bus_flags = panel_info->bus_flags;
+
+     return panel_info->num_modes;
+}
+
+static const struct drm_panel_funcs nv3052c_funcs = {
+     .prepare        = nv3052c_prepare,
+     .unprepare      = nv3052c_unprepare,
+     .enable         = nv3052c_enable,
+     .disable        = nv3052c_disable,
+     .get_modes      = nv3052c_get_modes,
+};
+
+static int nv3052c_probe(struct spi_device *spi)
+{
+     struct device *dev = &spi->dev;
+     struct nv3052c *priv;
+     int err;
+
+     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+     if (!priv)
+             return -ENOMEM;
+
+     priv->dev = dev;
+
+     priv->panel_info = of_device_get_match_data(dev);
+     if (!priv->panel_info)
+             return -EINVAL;
+
+     priv->supply = devm_regulator_get(dev, "power");
+     if (IS_ERR(priv->supply))
+             return dev_err_probe(dev, PTR_ERR(priv->supply), "Failed to get power supply\n");
+
+     priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+     if (IS_ERR(priv->reset_gpio))
+             return dev_err_probe(dev, PTR_ERR(priv->reset_gpio), "Failed to get reset GPIO\n");
+
+     err = mipi_dbi_spi_init(spi, &priv->dbi, NULL);
+     if (err)
+             return dev_err_probe(dev, err, "MIPI DBI init failed\n");
+
+     priv->dbi.read_commands = NULL;
+
+     spi_set_drvdata(spi, priv);
+
+     drm_panel_init(&priv->panel, dev, &nv3052c_funcs,
+                    DRM_MODE_CONNECTOR_DPI);
+
+     err = drm_panel_of_backlight(&priv->panel);
+     if (err)
+             return dev_err_probe(dev, err, "Failed to attach backlight\n");
+
+     drm_panel_add(&priv->panel);
+
+     return 0;
+}
+
+static int nv3052c_remove(struct spi_device *spi)
+{
+     struct nv3052c *priv = spi_get_drvdata(spi);
+
+     drm_panel_remove(&priv->panel);
+     drm_panel_disable(&priv->panel);
+     drm_panel_unprepare(&priv->panel);
+
+     return 0;
+}
+
+static const struct drm_display_mode ltk035c5444t_modes[] = {
+     { /* 60 Hz */
+             .clock = 24000,
+             .hdisplay = 640,
+             .hsync_start = 640 + 96,
+             .hsync_end = 640 + 96 + 16,
+             .htotal = 640 + 96 + 16 + 48,
+             .vdisplay = 480,
+             .vsync_start = 480 + 5,
+             .vsync_end = 480 + 5 + 2,
+             .vtotal = 480 + 5 + 2 + 13,
+             .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+     },
+     { /* 50 Hz */
+             .clock = 18000,
+             .hdisplay = 640,
+             .hsync_start = 640 + 39,
+             .hsync_end = 640 + 39 + 2,
+             .htotal = 640 + 39 + 2 + 39,
+             .vdisplay = 480,
+             .vsync_start = 480 + 5,
+             .vsync_end = 480 + 5 + 2,
+             .vtotal = 480 + 5 + 2 + 13,
+             .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
+     },
+};
+
+static const struct nv3052c_panel_info ltk035c5444t_panel_info = {
+     .display_modes = ltk035c5444t_modes,
+     .num_modes = ARRAY_SIZE(ltk035c5444t_modes),
+     .width_mm = 77,
+     .height_mm = 64,
+     .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+     .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
+};
+
+static const struct of_device_id nv3052c_of_match[] = {
+     { .compatible = "leadtek,ltk035c5444t", .data = &ltk035c5444t_panel_info },
+     { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, nv3052c_of_match);
+
+static struct spi_driver nv3052c_driver = {
+     .driver = {
+             .name = "nv3052c",
+             .of_match_table = nv3052c_of_match,
+     },
+     .probe = nv3052c_probe,
+     .remove = nv3052c_remove,
+};
+module_spi_driver(nv3052c_driver);
+
+MODULE_AUTHOR("Paul Cercueil <[email protected]>");
+MODULE_AUTHOR("Christophe Branchereau <[email protected]>");
+MODULE_LICENSE("GPL v2");
--

2.35.1

#8 lore raw

Re: [PATCH v4 2/4] drm/panel: Add panel driver for NewVision NV3052C based LCDs

Hi Christophe,

Quoted 15 lines
Quoted 5 lines
Quoted 5 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +5 -0
+     { 0x0d, 0x58 },
+     { 0x0e, 0x48 },
+     { 0x0f, 0x38 },
+     { 0x10, 0x2b },
+
Quoted 9 lines

drivers/gpu/drm/panel/panel-newvision-nv3052c.c line 244

Quoted 5 lines
drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file +5 -0
+     { 0xff, 0x30 },
+     { 0xff, 0x52 },
+     { 0xff, 0x00 },
+     { 0x36, 0x0a },
+};

There are some random (?) empty lines.
If they have any significance then a short comment would be nice. If not, then drop the empty lines.

Quoted 3 lines

The empty lines are not random no, to access a different page in the
init, one must write i.e. { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff,
0x02 }, to access page 2, so they add a little bit of readability.

Then I suggest to just say what page is is like:

	/* Page 1 */
	{ 0xff, 0x30 },
	...

Etc. then it is obvious this is page boundaries.

Sam

author
#9 lore raw

PATCH v4 3/4 drm/panel : innolux-ej030na and abt-y030xx067a : add .enable and .disable

In reply to Christophe Branchereau

Following the introduction of bridge_atomic_enable in the ingenic drm driver, the crtc is enabled between .prepare and .enable, if it exists.

Add it so the backlight is only enabled after the crtc is, to avoid graphical issues.

Signed-off-by Christophe Branchereau <[email protected]>
---
 drivers/gpu/drm/panel/panel-abt-y030xx067a.c  | 23 ++++++++++++--
 drivers/gpu/drm/panel/panel-innolux-ej030na.c | 31 ++++++++++++++++---
 2 files changed, 48 insertions(+), 6 deletions(-)
drivers/gpu/drm/panel/panel-abt-y030xx067a.c +21 -2
index f043b484055b..b5736344e3ec 100644
@@ -183,8 +183,6 @@ static int y030xx067a_prepare(struct drm_panel *panel)
 		goto err_disable_regulator;
 	}
 
-	msleep(120);
-
 	return 0;
 
 err_disable_regulator:

@@ -202,6 +200,25 @@ static int y030xx067a_unprepare(struct drm_panel *panel)
 	return 0;
 }
 
+static int y030xx067a_enable(struct drm_panel *panel)
+{
+	if (panel->backlight) {
+		/* Wait for the picture to be ready before enabling backlight */
+		msleep(120);
+	}
+
+	return 0;
+}
+
+static int y030xx067a_disable(struct drm_panel *panel)
+{
+	struct y030xx067a *priv = to_y030xx067a(panel);
+
+	regmap_clear_bits(priv->map, 0x06, REG06_XPSAVE);
+
+	return 0;
+}
+
 static int y030xx067a_get_modes(struct drm_panel *panel,
 				struct drm_connector *connector)
 {

@@ -239,6 +256,8 @@ static int y030xx067a_get_modes(struct drm_panel *panel,
 static const struct drm_panel_funcs y030xx067a_funcs = {
 	.prepare	= y030xx067a_prepare,
 	.unprepare	= y030xx067a_unprepare,
+	.enable		= y030xx067a_enable,
+	.disable	= y030xx067a_disable,
 	.get_modes	= y030xx067a_get_modes,
 };
drivers/gpu/drm/panel/panel-innolux-ej030na.c +27 -4
index c558de3f99be..6de7370185cd 100644
@@ -80,8 +80,6 @@ static const struct reg_sequence ej030na_init_sequence[] = {
 	{ 0x47, 0x08 },
 	{ 0x48, 0x0f },
 	{ 0x49, 0x0f },
-
-	{ 0x2b, 0x01 },
 };
 
 static int ej030na_prepare(struct drm_panel *panel)

@@ -109,8 +107,6 @@ static int ej030na_prepare(struct drm_panel *panel)
 		goto err_disable_regulator;
 	}
 
-	msleep(120);
-
 	return 0;
 
 err_disable_regulator:

@@ -128,6 +124,31 @@ static int ej030na_unprepare(struct drm_panel *panel)
 	return 0;
 }
 
+static int ej030na_enable(struct drm_panel *panel)
+{
+	struct ej030na *priv = to_ej030na(panel);
+
+	/* standby off */
+	regmap_write(priv->map, 0x2b, 0x01);
+
+	if (panel->backlight) {
+		/* Wait for the picture to be ready before enabling backlight */
+		msleep(120);
+	}
+
+	return 0;
+}
+
+static int ej030na_disable(struct drm_panel *panel)
+{
+	struct ej030na *priv = to_ej030na(panel);
+
+	/* standby on */
+	regmap_write(priv->map, 0x2b, 0x00);
+
+	return 0;
+}
+
 static int ej030na_get_modes(struct drm_panel *panel,
 			     struct drm_connector *connector)
 {

@@ -165,6 +186,8 @@ static int ej030na_get_modes(struct drm_panel *panel,
 static const struct drm_panel_funcs ej030na_funcs = {
 	.prepare	= ej030na_prepare,
 	.unprepare	= ej030na_unprepare,
+	.enable		= ej030na_enable,
+	.disable	= ej030na_disable,
 	.get_modes	= ej030na_get_modes,
 };
Signature · 1 line
2.35.1
author
#10 lore raw

PATCH v4 4/4 dt-bindings: display/panel: Add Leadtek ltk035c5444t

In reply to Christophe Branchereau

Add binding for the leadtek ltk035c5444t, which is a 640x480 mipi-dbi over spi / 24-bit RGB panel based on the newvision NV03052C chipset.

It is found in the Anbernic RG350M mips handheld.

Signed-off-by Christophe Branchereau <[email protected]>
---
 .../display/panel/leadtek,ltk035c5444t.yaml   | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml
Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml new file +59 -0
new file mode 100644
index 000000000000..817a9bed7d5a
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/leadtek,ltk035c5444t.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Leadtek ltk035c5444t 3.5" (640x480 pixels) 24-bit IPS LCD panel
+
+maintainers:
+  - Paul Cercueil <[email protected]>
+  - Christophe Branchereau <[email protected]>
+
+allOf:
+  - $ref: panel-common.yaml#
+  - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+properties:
+  compatible:
+    const: leadtek,ltk035c5444t
+
+  backlight: true
+  port: true
+  power-supply: true
+  reg: true
+  reset-gpios: true
+
+required:
+  - compatible
+  - power-supply
+  - reset-gpios
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        panel@0 {
+            compatible = "leadtek,ltk035c5444t";
+            reg = <0>;
+
+            spi-3wire;
+            spi-max-frequency = <3125000>;
+
+            reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
+
+            backlight = <&backlight>;
+            power-supply = <&vcc>;
+
+            port {
+                panel_input: endpoint {
+                    remote-endpoint = <&panel_output>;
+                };
+            };
+        };
+    };
Signature · 1 line
2.35.1
maintainer Reviewed-by on v4 4/4
#11 lore raw

Re: [PATCH v4 4/4] dt-bindings: display/panel: Add Leadtek ltk035c5444t

Quoted 4 lines · Christophe Branchereau

Add binding for the leadtek ltk035c5444t, which is a 640x480 mipi-dbi over spi / 24-bit RGB panel based on the newvision NV03052C chipset.

Quoted 8 lines

It is found in the Anbernic RG350M mips handheld.

Signed-off-by Christophe Branchereau <[email protected]>
---
 .../display/panel/leadtek,ltk035c5444t.yaml   | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml
Reviewed-by Rob Herring <[email protected]>
maintainer Applied
#12 lore raw

Re: [PATCH v4 4/4] dt-bindings: display/panel: Add Leadtek ltk035c5444t

In reply to Christophe Branchereau

Hi,

Quoted 7 lines · Christophe Branchereau

Add binding for the leadtek ltk035c5444t, which is a 640x480 mipi-dbi over spi / 24-bit RGB panel based on the newvision NV03052C chipset.

It is found in the Anbernic RG350M mips handheld.

Signed-off-by Christophe Branchereau <[email protected]>

Applied to drm-misc-next.

Thanks,
-Paul

Quoted 78 lines
---
 .../display/panel/leadtek,ltk035c5444t.yaml   | 59 
+++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644

Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml

(quoted diff) +0 -0
new file mode 100644
index 000000000000..817a9bed7d5a

b/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml

Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml new file +4 -0
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id:

http://devicetree.org/schemas/display/panel/leadtek,ltk035c5444t.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#

(quoted diff) +2 -0
+
+title: Leadtek ltk035c5444t 3.5" (640x480 pixels) 24-bit IPS LCD

panel

Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml new file +52 -1
+
+maintainers:
+  - Paul Cercueil <[email protected]>
+  - Christophe Branchereau <[email protected]>
+
+allOf:
+  - $ref: panel-common.yaml#
+  - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+properties:
+  compatible:
+    const: leadtek,ltk035c5444t
+
+  backlight: true
+  port: true
+  power-supply: true
+  reg: true
+  reset-gpios: true
+
+required:
+  - compatible
+  - power-supply
+  - reset-gpios
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        panel@0 {
+            compatible = "leadtek,ltk035c5444t";
+            reg = <0>;
+
+            spi-3wire;
+            spi-max-frequency = <3125000>;
+
+            reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>;
+
+            backlight = <&backlight>;
+            power-supply = <&vcc>;
+
+            port {
+                panel_input: endpoint {
+                    remote-endpoint = <&panel_output>;
+                };
+            };
+        };
+    };
--

2.35.1