pcal6524 extensions and fixes for pca953x driver
Subsystems (2)
v3 cover pcal6524 extensions and fixes for pca953x driver
V3:
* add Reported-by: and Reviewed-by:
* fix working for bindings description and example
* convert all register offsets to hex
* omit the LEVEL-IRQ RFC/hack commit
2018-04-04 21:00:27: V2:
* added PCA_PCAL flags if matched through of-table
* fix address calculation for extended PCAL6524 registers
* hack to map LEVEL_LOW to EDGE_FALLING to be able to test in combination with ts3a227e driver
* improve description of bindings for optional vcc-supply and interrupt-controller;
2018-03-10 09:32:53: no initial description
H. Nikolaus Schaller (4):
gpio: pca953x: set the PCA_PCAL flag also when matching by DT
gpio: pca953x: add register definitions for pcal6524 and fix address
calculation
DTS: Bindings: pca953x add an optional vcc-supply property
DTS: Bindings: pca953x: add example how to use interrupt-controller
and gpio-controller
.../devicetree/bindings/gpio/gpio-pca953x.txt | 34 +++++++++++++ drivers/gpio/gpio-pca953x.c | 56 +++++++++++++++------- 2 files changed, 72 insertions(+), 18 deletions(-)
Signature · 1 line
2.12.2
PATCH v3 1/4 gpio: pca953x: set the PCA_PCAL flag also when matching by DT
The of_device_table is missing the PCA_PCAL flag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers.
--- drivers/gpio/gpio-pca953x.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/gpio/gpio-pca953x.c +4 -2
@@ -936,8 +936,10 @@ static const struct of_device_id pca953x_dt_ids[] = { { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, - { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT), }, - { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT), }, + { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT | + PCA_PCAL), }, + { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT | + PCA_PCAL), }, { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
Signature · 1 line
2.12.2
Re: [PATCH v3 1/4] gpio: pca953x: set the PCA_PCAL flag also when matching by DT
drivers/gpio/gpio-pca953x.c static const struct of_device_id pca953x_dt_ids[] = { · line 942
Quoted 9 lines · H. Nikolaus Schaller
The
of_device_tableis missing thePCA_PCALflag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers.drivers/gpio/gpio-pca953x.c +4
-0+ { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT | + PCA_PCAL), }, + { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT | + PCA_PCAL), },
Sorry didn't comment this earlier, though I think one line still better to read disregard of 80 char limit.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [PATCH v3 1/4] gpio: pca953x: set the PCA_PCAL flag also when matching by DT
Quoted 6 lines · Andy Shevchenko
Quoted 3 lines · H. Nikolaus Schaller
The
of_device_tableis missing thePCA_PCALflag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers.
Quoted 7 lines
drivers/gpio/gpio-pca953x.c static const struct of_device_id pca953x_dt_ids[] = { · line 942
Quoted 4 lines
drivers/gpio/gpio-pca953x.c +4
-0+ { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT | + PCA_PCAL), }, + { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT | + PCA_PCAL), },Sorry didn't comment this earlier, though I think one line still better to read disregard of 80 char limit.
Another possible solution:
#define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
or alike
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [PATCH v3 1/4] gpio: pca953x: set the PCA_PCAL flag also when matching by DT
Quoted 4 lines
Am 10.04.2018 um 20:10 schrieb Andy Shevchenko <[email protected]>:
#define
PCA_LATCH_INT(PCA_PCAL|PCA_INT)
Looks the best.
I have queued it for v4.
BR and thanks,
Nikolaus
PATCH v3 2/4 gpio: pca953x: add register definitions for pcal6524 and fix address calculation
In reply to H. Nikolaus SchallerPCAL chips ("L" seems to stand for "latched") have additional registers starting at address 0x40 to control the latches, interrupt mask, pull-up and pull down etc.
The constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. multiplied by 2.
Now the pcal6524 has 3 banks which means the relative offset must be multiplied by 4 which gives a wrong result if not done carefully, since the base offset is already included in the offset.
For the basic registers shared with all pca93xx/tca64xx chips there is no such offset.
Therefore, we add code to adjust the register number for exended registers to the 24 bit accessor functions.
And we add additional register offset constants (not yet used by the driver code) which are specific to the pcal6524.
--- drivers/gpio/gpio-pca953x.c | 50 ++++++++++++++++++++++++++++++--------------- 1 file changed, 34 insertions(+), 16 deletions(-)
drivers/gpio/gpio-pca953x.c +34 -16
@@ -25,25 +25,35 @@#include <asm/unaligned.h> -#define PCA953X_INPUT 0 -#define PCA953X_OUTPUT 1 -#define PCA953X_INVERT 2 -#define PCA953X_DIRECTION 3 +#define PCA953X_INPUT 0x0 +#define PCA953X_OUTPUT 0x1 +#define PCA953X_INVERT 0x2 +#define PCA953X_DIRECTION 0x3#define REG_ADDR_AI 0x80 -#define PCA957X_IN 0 -#define PCA957X_INVRT 1 -#define PCA957X_BKEN 2 -#define PCA957X_PUPD 3 -#define PCA957X_CFG 4 -#define PCA957X_OUT 5 -#define PCA957X_MSK 6 -#define PCA957X_INTS 7 - -#define PCAL953X_IN_LATCH 34 -#define PCAL953X_INT_MASK 37 -#define PCAL953X_INT_STAT 38 +#define PCA957X_IN 0x00 +#define PCA957X_INVRT 0x01 +#define PCA957X_BKEN 0x02 +#define PCA957X_PUPD 0x03 +#define PCA957X_CFG 0x04 +#define PCA957X_OUT 0x05 +#define PCA957X_MSK 0x06 +#define PCA957X_INTS 0x07 + +#define PCAL953X_OUT_STRENGTH 0x20 +#define PCAL953X_IN_LATCH 0x22 +#define PCAL953X_PULL_EN 0x23 +#define PCAL953X_PULL_SEL 0x24 +#define PCAL953X_INT_MASK 0x25 +#define PCAL953X_INT_STAT 0x26 +#define PCAL953X_OUT_CONF 0x27 + +#define PCAL6524_INT_EDGE 0x28 +#define PCAL6524_INT_CLR 0x2a +#define PCAL6524_IN_STATUS 0x2b +#define PCAL6524_OUT_INDCONF 0x2c +#define PCAL6524_DEBOUNCE 0x2d#define PCA_GPIO_MASK 0x00FF#define PCA_INT 0x0100
@@ -208,6 +218,10 @@ static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) {int bank_shift =fls ((chip->gpio_chip.ngpio -1 ) /BANK_SZ ); +/* adjust register address for pcal6524 */ +if (reg >=PCAL953X_OUT_STRENGTH ) + reg -=PCAL953X_OUT_STRENGTH >>1 ; +return i2c_smbus_write_i2c_block_data (chip->client, (reg << bank_shift) |REG_ADDR_AI ,NBANK (chip), val);
@@ -250,6 +264,10 @@ static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) {int bank_shift =fls ((chip->gpio_chip.ngpio -1 ) /BANK_SZ ); +/* adjust register address for pcal6524 */ +if (reg >=PCAL953X_OUT_STRENGTH ) + reg -=PCAL953X_OUT_STRENGTH >>1 ; +return i2c_smbus_read_i2c_block_data (chip->client, (reg << bank_shift) |REG_ADDR_AI ,NBANK (chip), val);
Signature · 1 line
2.12.2
Re: [PATCH v3 2/4] gpio: pca953x: add register definitions for pcal6524 and fix address calculation
Quoted 12 lines · H. Nikolaus Schaller
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address
0x40to control the latches, interrupt mask, pull-up and pull down etc.The constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. multiplied by 2.
Now the pcal6524 has 3 banks which means the relative offset must be multiplied by 4 which gives a wrong result if not done carefully, since the base offset is already included in the offset.
Quoted 9 lines
For the basic registers shared with all pca93xx/tca64xx chips there is no such offset.
Therefore, we add code to adjust the register number for exended registers to the 24 bit accessor functions.
And we add additional register offset constants (not yet used by the driver code) which are specific to the pcal6524.
First of all, as I said, please split this to two patches. Don't mix the things.
drivers/gpio/gpio-pca953x.c static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) · line 224
Quoted 4 lines
drivers/gpio/gpio-pca953x.c +4
-0+/* adjust register address for pcal6524 */ +if (reg >=PCAL953X_OUT_STRENGTH ) + reg -=PCAL953X_OUT_STRENGTH >>1 ; +
Give me some days to think about it.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [PATCH v3 2/4] gpio: pca953x: add register definitions for pcal6524 and fix address calculation
Hi Andy,
Quoted 18 lines
Am 10.04.2018 um 20:06 schrieb Andy Shevchenko <[email protected]>:
Quoted 15 lines · H. Nikolaus Schaller
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address
0x40to control the latches, interrupt mask, pull-up and pull down etc.The constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. multiplied by 2.
Now the pcal6524 has 3 banks which means the relative offset must be multiplied by 4 which gives a wrong result if not done carefully, since the base offset is already included in the offset.
For the basic registers shared with all pca93xx/tca64xx chips there is no such offset.
Quoted 8 lines
Quoted 6 lines
Therefore, we add code to adjust the register number for exended registers to the 24 bit accessor functions.
And we add additional register offset constants (not yet used by the driver code) which are specific to the pcal6524.
First of all, as I said, please split this to two patches. Don't mix the things.
Ok. Queued for v4.
Quoted 8 lines
drivers/gpio/gpio-pca953x.c static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) · line 224
Quoted 6 lines
drivers/gpio/gpio-pca953x.c +4
-0+/* adjust register address for pcal6524 */ +if (reg >=PCAL953X_OUT_STRENGTH ) + reg -=PCAL953X_OUT_STRENGTH >>1 ; +Give me some days to think about it.
No problem. I'll wait with v4.
The only alternative I would see is to add new accessor function pointers for the extended registers and have 0x00 based offsets, but that is IMHO more ugly.
BR and thanks,
Nikolaus
Re: [Letux-kernel] [PATCH v3 2/4] gpio: pca953x: add register definitions for pcal6524 and fix address calculation
Hi Andy,
Quoted 25 lines
Am 11.04.2018 um 07:00 schrieb H. Nikolaus Schaller <[email protected]>:
Hi Andy,
Quoted 21 lines
Am 10.04.2018 um 20:06 schrieb Andy Shevchenko <[email protected]>:
Quoted 18 lines · H. Nikolaus Schaller
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address
0x40to control the latches, interrupt mask, pull-up and pull down etc.The constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. multiplied by 2.
Now the pcal6524 has 3 banks which means the relative offset must be multiplied by 4 which gives a wrong result if not done carefully, since the base offset is already included in the offset.
For the basic registers shared with all pca93xx/tca64xx chips there is no such offset.
Therefore, we add code to adjust the register number for exended registers to the 24 bit accessor functions.
Quoted 16 lines
Quoted 5 lines
Quoted 3 lines
And we add additional register offset constants (not yet used by the driver code) which are specific to the pcal6524.
First of all, as I said, please split this to two patches. Don't mix the things.
Ok. Queued for v4.
Quoted 8 lines
drivers/gpio/gpio-pca953x.c static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) · line 224
Quoted 6 lines
drivers/gpio/gpio-pca953x.c +4
-0+/* adjust register address for pcal6524 */ +if (reg >=PCAL953X_OUT_STRENGTH ) + reg -=PCAL953X_OUT_STRENGTH >>1 ; +Give me some days to think about it.
Any news on this?
I am waiting for your advice before submitting v4 (with pending updates for the other patches).
Quoted 8 lines
No problem. I'll wait with v4.
The only alternative I would see is to add new accessor function pointers for the extended registers and have
0x00based offsets, but that is IMHO more ugly.BR and thanks,
Nikolaus
BR and thanks,
Nikolaus
Re: [Letux-kernel] [PATCH v3 2/4] gpio: pca953x: add register definitions for pcal6524 and fix address calculation
Quoted 19 lines · H. Nikolaus Schaller
Quoted 19 lines
Am 11.04.2018 um 07:00 schrieb H. Nikolaus Schaller <[email protected]>:
Quoted 18 lines
Am 10.04.2018 um 20:06 schrieb Andy Shevchenko <[email protected]>:
Quoted 15 lines · H. Nikolaus Schaller
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address
0x40to control the latches, interrupt mask, pull-up and pull down etc.The constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. multiplied by 2.
Now the pcal6524 has 3 banks which means the relative offset must be multiplied by 4 which gives a wrong result if not done carefully, since the base offset is already included in the offset.
For the basic registers shared with all pca93xx/tca64xx chips there is no such offset.
Quoted 8 lines
Quoted 8 lines
Quoted 7 lines
Quoted 5 lines
Therefore, we add code to adjust the register number for exended registers to the 24 bit accessor functions.
And we add additional register offset constants (not yet used by the driver code) which are specific to the pcal6524.
First of all, as I said, please split this to two patches. Don't mix the things.
Ok. Queued for v4.
I actually think it would be even more patches:
- move to hex from dec
- add new definitions for PCAL953x
- append new code for registers (see below)
- add definitions for PCAL6524
Quoted 6 lines
Quoted 6 lines
Quoted 6 lines
drivers/gpio/gpio-pca953x.c static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) · line 224
Quoted 4 lines
drivers/gpio/gpio-pca953x.c +4
-0+/* adjust register address for pcal6524 */ +if (reg >=PCAL953X_OUT_STRENGTH ) + reg -=PCAL953X_OUT_STRENGTH >>1 ; +Give me some days to think about it.
So, what about something like:
--- 8< --- 8< ---
#define PCAL953X_GPIO_MASK GENMASK(5,0) // this makes sense even for your initial solution
int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); int addr = (reg & PCAL953X_GPIO_MASK) << bank_shift; int pinctrl = (reg & ~PCAL953X_GPIO_MASK) << 1;
return i2c_smbus_write_i2c_block_data(chip->client,
pinctrl | addr | REG_ADDR_AI, NBANK(chip), val);
// similar for read.
--- 8< --- 8< ---
Keep in mind your solution has a bug for registers starting from 0x30.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Re: [Letux-kernel] [PATCH v3 2/4] gpio: pca953x: add register definitions for pcal6524 and fix address calculation
Hi Andy,
Quoted 28 lines
Am 26.04.2018 um 12:06 schrieb Andy Shevchenko <[email protected]>:
Quoted 24 lines · H. Nikolaus Schaller
Quoted 24 lines
Am 11.04.2018 um 07:00 schrieb H. Nikolaus Schaller <[email protected]>:
Quoted 23 lines
Am 10.04.2018 um 20:06 schrieb Andy Shevchenko <[email protected]>:
Quoted 20 lines · H. Nikolaus Schaller
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address
0x40to control the latches, interrupt mask, pull-up and pull down etc.The constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. multiplied by 2.
Now the pcal6524 has 3 banks which means the relative offset must be multiplied by 4 which gives a wrong result if not done carefully, since the base offset is already included in the offset.
For the basic registers shared with all pca93xx/tca64xx chips there is no such offset.
Therefore, we add code to adjust the register number for exended registers to the 24 bit accessor functions.
And we add additional register offset constants (not yet used by the driver code) which are specific to the pcal6524.
Quoted 8 lines
Quoted 2 lines
Quoted 2 lines
Quoted 1 line
First of all, as I said, please split this to two patches. Don't mix the things.
Ok. Queued for v4.
I actually think it would be even more patches:
- move to hex from dec
- add new definitions for PCAL953x
- append new code for registers (see below)
- add definitions for PCAL6524
It is already done in my local git,
just waiting for the address thing...
Quoted 10 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
drivers/gpio/gpio-pca953x.c static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) · line 224
Quoted 5 lines
drivers/gpio/gpio-pca953x.c +4
-0+/* adjust register address for pcal6524 */ +if (reg >=PCAL953X_OUT_STRENGTH ) + reg -=PCAL953X_OUT_STRENGTH >>1 ; +Give me some days to think about it.
So, what about something like:
Quoted 7 lines
--- 8< --- 8< ---
#definePCAL953X_GPIO_MASKGENMASK(5,0)// this makes sense even for your initial solutionint
bank_shift=fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); int addr = (reg &PCAL953X_GPIO_MASK) <<bank_shift; int pinctrl = (reg & ~PCAL953X_GPIO_MASK) << 1;
Ok! Intersting idea.
Basically decomposes register bank number (pinctrl) and register offset (addr) and shifts them differently.
Quoted 6 lines
return i2c_smbus_write_i2c_block_data(chip->client,
pinctrl | addr |REG_ADDR_AI, NBANK(chip), val);// similar for read.
Looks good. I'll test asap.
BR and thanks,
Nikolaus
Quoted 8 lines
--- 8< --- 8< ---
Keep in mind your solution has a bug for registers starting from
0x30.Signature · 2 lines
With Best Regards, Andy Shevchenko
PATCH v3 3/4 DTS: Bindings: pca953x add an optional vcc-supply property
In reply to H. Nikolaus SchallerHardware can have a switchable Vcc supply, so let's add it to the bindings (the current Linux driver code already supports it).
--- Documentation/devicetree/bindings/gpio/gpio-pca953x.txt | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/gpio/gpio-pca953x.txt +1 -0
@@ -35,6 +35,7 @@ Required properties: Optional properties: - reset-gpios: GPIO specification for the RESET input. This is an active low signal to the PCA953x. + - vcc-supply: power supply regulator. Example:
Signature · 1 line
2.12.2
PATCH v3 4/4 DTS: Bindings: pca953x: add example how to use interrupt-controller and gpio-controller
In reply to H. Nikolaus SchallerIt is not completely obvious that these are required and how to use them. So we provide a tested example.
--- .../devicetree/bindings/gpio/gpio-pca953x.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+)
Documentation/devicetree/bindings/gpio/gpio-pca953x.txt +33 -0
@@ -31,6 +31,10 @@ Required properties: ti,tca9554 onnn,pca9654 exar,xra1202 + - gpio-controller: if used as gpio expander. + - #gpio-cells: if used as gpio expander. + - interrupt-controller: if to be used as interrupt expander. + - #interrupt-cells: if to be used as interrupt expander. Optional properties: - reset-gpios: GPIO specification for the RESET input. This is an
@@ -48,3 +52,32 @@ Example: interrupt-parent = <&gpio3>; interrupts = <23 IRQ_TYPE_LEVEL_LOW>; }; + + +Example with Interrupts: + + + gpio99: gpio@22 { + compatible = "nxp,pcal6524"; + reg = <0x22>; + interrupt-parent = <&gpio6>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* gpio6_161 */ + interrupt-controller; + #interrupt-cells = <2>; + vcc-supply = <&vdds_1v8_main>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "hdmi-ct-hpd", "hdmi.ls-oe", "p02", "p03", "vibra", "fault2", "p06", "p07", + "en-usb", "en-host1", "en-host2", "chg-int", "p14", "p15", "mic-int", "en-modem", + "shdn-hs-amp", "chg-status+red", "green", "blue", "en-esata", "fault1", "p26", "p27"; + }; + + ts3a227@3b { + compatible = "ti,ts3a227e"; + reg = <0x3b>; + interrupt-parent = <&gpio99>; + interrupts = <14 IRQ_TYPE_EDGE_RISING>; + ti,micbias = <0>; /* 2.1V */ + }; +
Signature · 1 line
2.12.2
Re: [PATCH v3 4/4] DTS: Bindings: pca953x: add example how to use interrupt-controller and gpio-controller
Quoted 7 lines · H. Nikolaus Schaller
It is not completely obvious that these are required and how to use them. So we provide a tested example.
Signed-off-by H. Nikolaus Schaller <[email protected]>--- .../devicetree/bindings/gpio/gpio-pca953x.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+)