pcal6524 extensions and fixes for pca953x driver

PATCH Superseded H. Nikolaus Schaller 2 participants 7 messages May 16, 2018 GPIO

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H. Nikolaus Schaller

author

2018-05-16 17:01 UTC #0 lore raw

v6 cover pcal6524 extensions and fixes for pca953x driver

V6:
* added proper attribution to the formula used for fixing the pcal6524 register address (changes commit message only)
* add back missing first patch from V2 that defines the PCA_LATCH_INT constant
* removed patches already merged

2018-04-28 18:33:42: V5:

* fix wrong split up between patches 1/7 and 2/7.

2018-04-26 19:35:07: V4:

* introduced PCA_LATCH_INT constant to make of_table more readable (suggested by Andy Shevchenko)
* converted all register constants to hex in a separate patch (suggested by Andy Shevchenko)
* separated additional pcal953x and pcal6524 register definitions into separate patches (suggested by Andy Shevchenko)
* made special pcal6524 address adjustment more readable (suggested by Andy Shevchenko)
* moved gpio-controller and interrupt-controller to the "required" section (reviewed by Rob Herring)

2018-04-10 18:07:07: V3:

* add Reported-by: and Reviewed-by:
* fix wording for bindings description and example
* convert all register offsets to hex
* omit the LEVEL-IRQ RFC/hack commit

2018-04-04 21:00:27: V2:

* added PCA_PCAL flags if matched through of-table
* fix address calculation for extended PCAL6524 registers
* hack to map LEVEL_LOW to EDGE_FALLING to be able to test in combination with ts3a227e driver
* improve description of bindings for optional vcc-supply and interrupt-controller;

2018-03-10 09:32:53: no initial description

H. Nikolaus Schaller (3):
gpio: pca953x: set the PCA_PCAL flag also when matching by DT
gpio: pca953x: define masks for addressing common and extended
registers
gpio: pca953x: fix address calculation for pcal6524

 drivers/gpio/gpio-pca953x.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

Signature · 1 line

2.12.2

H. Nikolaus Schaller

author

2018-05-16 17:01 UTC #1 lore raw

PATCH v6 1/3 gpio: pca953x: set the PCA_PCAL flag also when matching by DT

The of_device_table is missing the PCA_PCAL flag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers.

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 drivers/gpio/gpio-pca953x.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

drivers/gpio/gpio-pca953x.c +3 -2

index 7d37692d672e..2b667166e855 100644
@@ -58,6 +58,7 @@
 #define PCA_GPIO_MASK		0x00FF
 #define PCA_INT			0x0100
 #define PCA_PCAL		0x0200
+#define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
 #define PCA953X_TYPE		0x1000
 #define PCA957X_TYPE		0x2000
 #define PCA_TYPE_MASK		0xF000

@@ -946,8 +947,8 @@ static const struct of_device_id pca953x_dt_ids[] = {
 	{ .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
 	{ .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
 
-	{ .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT), },
-	{ .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT), },
+	{ .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
+	{ .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
 
 	{ .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
 	{ .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },

Signature · 1 line

2.12.2

H. Nikolaus Schaller

author

2018-05-16 17:01 UTC #2 lore raw

PATCH v6 2/3 gpio: pca953x: define masks for addressing common and extended registers

In reply to H. Nikolaus Schaller

These mask bits are to be used to map the extended register addreseses (which are defined for an unsupported 8-bit pcal chip) to 16 and 24 bit chips (pcal6524).

Reviewed-by Andy Shevchenko <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 drivers/gpio/gpio-pca953x.c | 4 ++++
 1 file changed, 4 insertions(+)

drivers/gpio/gpio-pca953x.c +4 -0

index 2b667166e855..c0eb679e60d4 100644
@@ -56,6 +56,10 @@
 #define PCAL6524_DEBOUNCE	0x2d
 
 #define PCA_GPIO_MASK		0x00FF
+
+#define PCAL_GPIO_MASK		GENMASK(4, 0)
+#define PCAL_PINCTRL_MASK	(~PCAL_GPIO_MASK)
+
 #define PCA_INT			0x0100
 #define PCA_PCAL		0x0200
 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)

Signature · 1 line

2.12.2

Andy Shevchenko

2018-05-16 19:50 UTC #3 lore raw

Re: [PATCH v6 2/3] gpio: pca953x: define masks for addressing common and extended registers

Quoted 15 lines · H. Nikolaus Schaller

These mask bits are to be used to map the extended register addreseses (which are defined for an unsupported 8-bit pcal chip) to 16 and 24 bit chips (pcal6524).
Reviewed-by Andy Shevchenko <[email protected]>
Signed-off-by H. Nikolaus Schaller <[email protected]>
---
 drivers/gpio/gpio-pca953x.c | 4 ++++
 1 file changed, 4 insertions(+)
drivers/gpio/gpio-pca953x.c +0 -0
index 2b667166e855..c0eb679e60d4 100644

drivers/gpio/gpio-pca953x.c line 62

Quoted 7 lines

drivers/gpio/gpio-pca953x.c +4 -0

@@ -56,6 +56,10 @@
 #define PCAL6524_DEBOUNCE      0x2d
 
 #define PCA_GPIO_MASK          0x00FF
+
+#define PCAL_GPIO_MASK         GENMASK(4, 0)
+#define PCAL_PINCTRL_MASK      (~PCAL_GPIO_MASK)
+

I give second thought about it, and think
either plain values, or second converted to its own explicit GENMASK would be better.

(most confusing part to me is unknowness of the side of PINCTRL part in the mask)

Quoted 6 lines

drivers/gpio/gpio-pca953x.c +0 -1

 #define PCA_INT                        0x0100
 #define PCA_PCAL               0x0200
 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
--

2.12.2

Signature · 2 lines

With Best Regards,
Andy Shevchenko

H. Nikolaus Schaller

author

2018-05-16 19:57 UTC #4 lore raw

Re: [PATCH v6 2/3] gpio: pca953x: define masks for addressing common and extended registers

Quoted 31 lines

Am 16.05.2018 um 21:50 schrieb Andy Shevchenko <[email protected]>:
Quoted 15 lines · H. Nikolaus Schaller
These mask bits are to be used to map the extended register addreseses (which are defined for an unsupported 8-bit pcal chip) to 16 and 24 bit chips (pcal6524).
Reviewed-by Andy Shevchenko <[email protected]>
Signed-off-by H. Nikolaus Schaller <[email protected]>
---
drivers/gpio/gpio-pca953x.c | 4 ++++
1 file changed, 4 insertions(+)
drivers/gpio/gpio-pca953x.c +0 -0
index 2b667166e855..c0eb679e60d4 100644
drivers/gpio/gpio-pca953x.c line 62
Quoted 7 lines
drivers/gpio/gpio-pca953x.c +4 -0
@@ -56,6 +56,10 @@
 #define PCAL6524_DEBOUNCE      0x2d
 
 #define PCA_GPIO_MASK          0x00FF
+
+#define PCAL_GPIO_MASK         GENMASK(4, 0)
+#define PCAL_PINCTRL_MASK      (~PCAL_GPIO_MASK)
+
I give second thought about it, and think
either plain values, or second converted to its own explicit GENMASK would be better.

Quoted 2 lines

(most confusing part to me is unknowness of the side of PINCTRL part in the mask)

I see.

Then, I'd also prefer plain values.

If ok, I can send a v7 tomorrow.

BR,
Nikolaus

H. Nikolaus Schaller

author

2018-05-16 17:01 UTC #5 lore raw

PATCH v6 3/3 gpio: pca953x: fix address calculation for pcal6524

In reply to H. Nikolaus Schaller

The register constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. are multiplied by 2 in the accessor function.

Now, the pcal6524 has 3 banks which means the relative offset is multiplied by 4 for the standard registers.

Simply applying the bit shift to the extended registers gives a wrong result, since the base offset is already included in the offset.

Therefore, we have to add code to the 24 bit accessor functions that adjusts the register number for these exended registers.

The formula finally used was developed and proposed by Andy Shevchenko <[email protected]>.

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 drivers/gpio/gpio-pca953x.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

drivers/gpio/gpio-pca953x.c +6 -2

index c0eb679e60d4..8c63664d0e74 100644
@@ -222,9 +222,11 @@ static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
 {
 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
+	int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
+	int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 
 	return i2c_smbus_write_i2c_block_data(chip->client,
-					      (reg << bank_shift) | REG_ADDR_AI,
+					      pinctrl | addr | REG_ADDR_AI,
 					      NBANK(chip), val);
 }

@@ -264,9 +266,11 @@ static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
 {
 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
+	int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
+	int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 
 	return i2c_smbus_read_i2c_block_data(chip->client,
-					     (reg << bank_shift) | REG_ADDR_AI,
+					     pinctrl | addr | REG_ADDR_AI,
 					     NBANK(chip), val);
 }

Signature · 1 line

2.12.2

Andy Shevchenko

Reviewed-by on the v6 series

2018-05-16 19:53 UTC #6 lore raw

In reply to H. Nikolaus Schaller

Quoted 7 lines · H. Nikolaus Schaller

V6:
* added proper attribution to the formula used for fixing the pcal6524 register address (changes commit message only)
* add back missing first patch from V2 that defines the PCA_LATCH_INT constant
* removed patches already merged

Thanks for an update.
I think we still need to address the constant representation in patch 2.

For the rest take my

Reviewed-by Andy Shevchenko <[email protected]>

Quoted 43 lines

2018-04-28 18:33:42: V5:
* fix wrong split up between patches 1/7 and 2/7.
2018-04-26 19:35:07: V4:
* introduced PCA_LATCH_INT constant to make of_table more readable (suggested by Andy Shevchenko)
* converted all register constants to hex in a separate patch (suggested by Andy Shevchenko)
* separated additional pcal953x and pcal6524 register definitions into separate patches (suggested by Andy Shevchenko)
* made special pcal6524 address adjustment more readable (suggested by Andy Shevchenko)
* moved gpio-controller and interrupt-controller to the "required" section (reviewed by Rob Herring)
2018-04-10 18:07:07: V3:
* add Reported-by: and Reviewed-by:
* fix wording for bindings description and example
* convert all register offsets to hex
* omit the LEVEL-IRQ RFC/hack commit
2018-04-04 21:00:27: V2:
* added PCA_PCAL flags if matched through of-table
* fix address calculation for extended PCAL6524 registers
* hack to map LEVEL_LOW to EDGE_FALLING to be able to test in combination with ts3a227e driver
* improve description of bindings for optional vcc-supply and interrupt-controller;
2018-03-10 09:32:53: no initial description
H. Nikolaus Schaller (3):
gpio: pca953x: set the PCA_PCAL flag also when matching by DT
gpio: pca953x: define masks for addressing common and extended
registers
gpio: pca953x: fix address calculation for pcal6524
 drivers/gpio/gpio-pca953x.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)
--
2.12.2

Signature · 2 lines

With Best Regards,
Andy Shevchenko