irqchip: add C-SKY APB bus interrupt controller
Subsystems (3)
v8 cover irqchip: add C-SKY APB bus interrupt controller
- Dt-bindings documentation
- irq-csky-apb-intc driver
Guo Ren (2):
irqchip: add C-SKY APB bus interrupt controller
dt-bindings: interrupt-controller: C-SKY APB intc
.../interrupt-controller/csky,apb-intc.txt | 62 +++++ drivers/irqchip/Kconfig | 8 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-csky-apb-intc.c | 260 +++++++++++++++++++++ 4 files changed, 331 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt create mode 100644 drivers/irqchip/irq-csky-apb-intc.c
Signature · 1 line
2.7.4
PATCH v8 1/2 irqchip: add C-SKY APB bus interrupt controller
- irq-csky-apb-intc is a simple SOC interrupt controller which is used in a lot of C-SKY CPU SOC products.
Changelog:
- use "bool ret" instead of "int ret"
- add support-pulse-signal in irq-csky-apb-intc.c
- change name with upstream feed-back
- add INTC_IFR to clear irq-pending
- remove CSKY_VECIRQ_LEGENCY
- change to generic irq chip framework
- add License and Copyright
- use irq_domain_add_linear instead of leagcy
Signed-off-by Guo Ren <[email protected]>
--- drivers/irqchip/Kconfig | 8 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-csky-apb-intc.c | 260 ++++++++++++++++++++++++++++++++++++ 3 files changed, 269 insertions(+) create mode 100644 drivers/irqchip/irq-csky-apb-intc.c
drivers/irqchip/Kconfig +8 -0
@@ -371,6 +371,14 @@ config QCOM_PDC Power Domain Controller driver to manage and configure wakeup IRQs for Qualcomm Technologies Inc (QTI) mobile chips. +config CSKY_APB_INTC + bool "C-SKY APB Interrupt Controller" + depends on CSKY + help + Say yes here to enable C-SKY APB interrupt controller driver used + by C-SKY single core SOC system. It use mmio map apb-bus to visit + the controller's register. + endmenu config SIFIVE_PLIC
drivers/irqchip/Makefile +1 -0
@@ -87,4 +87,5 @@ obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o obj-$(CONFIG_NDS32) += irq-ativic32.o obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o +obj-$(CONFIG_CSKY_APB_INTC) += irq-csky-apb-intc.o obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
drivers/irqchip/irq-csky-apb-intc.c new file +260 -0
260 lines not on this page · raw message
Signature · 1 line
2.7.4
PATCH v8 2/2 dt-bindings: interrupt-controller: C-SKY APB intc
In reply to Guo Ren- Dt-bindings doc about C-SKY apb bus interrupt controller.
Signed-off-by Guo Ren <[email protected]>
--- .../interrupt-controller/csky,apb-intc.txt | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt
Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt new file +62 -0
@@ -0,0 +1,62 @@ +============================== +C-SKY APB Interrupt Controller +============================== + +C-SKY APB Interrupt Controller is a simple soc interrupt controller +on the apb bus and we only use it as root irq controller. + + - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums. + - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported. + - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums. + +============================= +intc node bindings definition +============================= + + Description: Describes APB interrupt controller + + PROPERTIES + + - compatible + Usage: required + Value type: <string> + Definition: must be "csky,apb-intc" + "csky,dual-apb-intc" + "csky,gx6605s-intc" + - #interrupt-cells + Usage: required + Value type: <u32> + Definition: must be <1> + - reg + Usage: required + Value type: <u32 u32> + Definition: <phyaddr size> in soc from cpu view + - interrupt-controller: + Usage: required + - csky,support-pulse-signal: + Usage: select + Description: to support pulse signal flag + +Examples: +--------- + + intc: interrupt-controller@500000 { + compatible = "csky,apb-intc"; + #interrupt-cells = <1>; + reg = <0x00500000 0x400>; + interrupt-controller; + }; + + intc: interrupt-controller@500000 { + compatible = "csky,dual-apb-intc"; + #interrupt-cells = <1>; + reg = <0x00500000 0x400>; + interrupt-controller; + }; + + intc: interrupt-controller@500000 { + compatible = "csky,gx6605s-intc"; + #interrupt-cells = <1>; + reg = <0x00500000 0x400>; + interrupt-controller; + };
Signature · 1 line
2.7.4