Skip to contentSkip to conversation

C-SKY(csky) Linux Kernel Drivers

PATCH Superseded Guo Ren 2 participants 13 messages Oct 1, 2018 – Oct 4, 2018

Subsystems (5)

v9 of 13 Superseded Latest is v13 →

lore
Share & tools
lore

Guo Ren

author
#0 lore raw

v9 cover C-SKY(csky) Linux Kernel Drivers

Quoted 1 line

From "PATCH V5 00/30] C-SKY(csky) Linux Kernel Port" I seperated the

drivers from the patchset. I've sent driver patches with "V5 V6 V7 V8".

Now is V9. The changelog is in every patch.

Perhaps I should seperate driver patchset earlier and the csky port patchset is too big now.

Any feedback is welcome, thx for all people review my patchset.

Best Regards

Guo Ren (8):
irqchip: add C-SKY SMP interrupt controller
dt-bindings: interrupt-controller: C-SKY SMP intc
clocksource: add C-SKY SMP timer
dt-bindings: timer: C-SKY Multi-processor timer
dt-bindings: interrupt-controller: C-SKY APB intc
irqchip: add C-SKY APB bus interrupt controller
dt-bindings: timer: gx6605s SOC timer
clocksource: add gx6605s SOC system timer

 .../interrupt-controller/csky,apb-intc.txt         |  62 +++++
 .../bindings/interrupt-controller/csky,mpintc.txt  |  40 ++++
 .../bindings/timer/csky,gx6605s-timer.txt          |  42 ++++
 .../devicetree/bindings/timer/csky,mptimer.txt     |  42 ++++
 drivers/clocksource/Kconfig                        |  16 ++
 drivers/clocksource/Makefile                       |   2 +
 drivers/clocksource/csky_mptimer.c                 | 176 ++++++++++++++
 drivers/clocksource/timer-gx6605s.c                | 150 ++++++++++++
 drivers/irqchip/Kconfig                            |  16 ++
 drivers/irqchip/Makefile                           |   2 +
 drivers/irqchip/irq-csky-apb-intc.c                | 260 +++++++++++++++++++++
 drivers/irqchip/irq-csky-mpintc.c                  | 195 ++++++++++++++++
 include/linux/cpuhotplug.h                         |   1 +
 13 files changed, 1004 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
 create mode 100644 Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
 create mode 100644 Documentation/devicetree/bindings/timer/csky,mptimer.txt
 create mode 100644 drivers/clocksource/csky_mptimer.c
 create mode 100644 drivers/clocksource/timer-gx6605s.c
 create mode 100644 drivers/irqchip/irq-csky-apb-intc.c
 create mode 100644 drivers/irqchip/irq-csky-mpintc.c
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH v9 1/8 irqchip: add C-SKY SMP interrupt controller

- Irq-csky-mpintc is C-SKY smp system interrupt controller and it could support 16 soft irqs, 16 private irqs, and 992 max common irqs.

Changelog:
- Move IPI_IRQ into the driver
- Remove irq_set_default_host() and use set_ipi_irq_mapping()
- Change name with upstream feed-back
- Change irq map, reserve soft_irq & private_irq space
- Add License and Copyright
- Support set_affinity for irq balance in SMP

---
 drivers/irqchip/Kconfig           |   8 ++
 drivers/irqchip/Makefile          |   1 +
 drivers/irqchip/irq-csky-mpintc.c | 195 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 204 insertions(+)
 create mode 100644 drivers/irqchip/irq-csky-mpintc.c
drivers/irqchip/Kconfig +8 -0
index 383e7b7..92e1c20 100644
@@ -371,6 +371,14 @@ config QCOM_PDC
 	  Power Domain Controller driver to manage and configure wakeup
 	  IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
 
+config CSKY_MPINTC
+	bool "C-SKY Multi Processor Interrupt Controller"
+	depends on CSKY
+	help
+	  Say yes here to enable C-SKY SMP interrupt controller driver used
+	  for C-SKY SMP system. In fact it's not mmio map and it use ld/st
+	  to visit the controller's register inside CPU.
+
 endmenu
 
 config SIFIVE_PLIC
drivers/irqchip/Makefile +1 -0
index fbd1ec8..6b739ea 100644
@@ -87,4 +87,5 @@ obj-$(CONFIG_MESON_IRQ_GPIO)		+= irq-meson-gpio.o
 obj-$(CONFIG_GOLDFISH_PIC) 		+= irq-goldfish-pic.o
 obj-$(CONFIG_NDS32)			+= irq-ativic32.o
 obj-$(CONFIG_QCOM_PDC)			+= qcom-pdc.o
+obj-$(CONFIG_CSKY_MPINTC)		+= irq-csky-mpintc.o
 obj-$(CONFIG_SIFIVE_PLIC)		+= irq-sifive-plic.o
drivers/irqchip/irq-csky-mpintc.c new file +195 -0

195 lines not on this page · raw message

Signature · 1 line
2.7.4
author
#2 lore raw

PATCH v9 2/8 dt-bindings: interrupt-controller: C-SKY SMP intc

In reply to Guo Ren

Dt-bindings doc about C-SKY Multi-processors interrupt controller.

Changelog:
- Should be: '#interrupt-cells' not 'interrupt-cells'

---
 .../bindings/interrupt-controller/csky,mpintc.txt  | 40 ++++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt new file +40 -0
new file mode 100644
index 0000000..ab921f1
@@ -0,0 +1,40 @@
+===========================================
+C-SKY Multi-processors Interrupt Controller
+===========================================
+
+C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
+SMP soc, and it also could be used in non-SMP system.
+
+Interrupt number definition:
+
+  0-15  : software irq, and we use 15 as our IPI_IRQ.
+ 16-31  : private  irq, and we use 16 as the co-processor timer.
+ 31-1024: common irq for soc ip.
+
+=============================
+intc node bindings definition
+=============================
+
+	Description: Describes SMP interrupt controller
+
+	PROPERTIES
+
+	- compatible
+		Usage: required
+		Value type: <string>
+		Definition: must be "csky,mpintc"
+	- #interrupt-cells
+		Usage: required
+		Value type: <u32>
+		Definition: must be <1>
+	- interrupt-controller:
+		Usage: required
+
+Examples:
+---------
+
+	intc: interrupt-controller {
+		compatible = "csky,mpintc";
+		#interrupt-cells = <1>;
+		interrupt-controller;
+	};
Signature · 1 line
2.7.4
author
#3 lore raw

PATCH v9 3/8 clocksource: add C-SKY SMP timer

In reply to Guo Ren

This timer is used by SMP system and use mfcr/mtcr instruction to access the regs.

Changelog:
- Remove #define CPUHP_AP_CSKY_TIMER_STARTING
- Add CPUHP_AP_CSKY_TIMER_STARTING in cpuhotplug.h
- Support csky mp timer alpha version.
- Just use low-counter with 32bit width as clocksource.
- Coding convention with upstream feed-back.

---
 drivers/clocksource/Kconfig        |   8 ++
 drivers/clocksource/Makefile       |   1 +
 drivers/clocksource/csky_mptimer.c | 176 +++++++++++++++++++++++++++++++++++++
 include/linux/cpuhotplug.h         |   1 +
 4 files changed, 186 insertions(+)
 create mode 100644 drivers/clocksource/csky_mptimer.c
drivers/clocksource/Kconfig +8 -0
index a11f4ba..a28043f 100644
@@ -620,4 +620,12 @@ config RISCV_TIMER
 	  is accessed via both the SBI and the rdcycle instruction.  This is
 	  required for all RISC-V systems.
 
+config CSKY_MPTIMER
+	bool "C-SKY Multi Processor Timer"
+	depends on CSKY
+	select TIMER_OF
+	help
+	  Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
+	  system.
+
 endmenu
drivers/clocksource/Makefile +1 -0
index db51b24..848c676 100644
@@ -79,3 +79,4 @@ obj-$(CONFIG_CLKSRC_ST_LPC)		+= clksrc_st_lpc.o
 obj-$(CONFIG_X86_NUMACHIP)		+= numachip.o
 obj-$(CONFIG_ATCPIT100_TIMER)		+= timer-atcpit100.o
 obj-$(CONFIG_RISCV_TIMER)		+= riscv_timer.o
+obj-$(CONFIG_CSKY_MPTIMER)		+= csky_mptimer.o
drivers/clocksource/csky_mptimer.c new file +176 -0

176 lines not on this page · raw message

include/linux/cpuhotplug.h +1 -0
index caf40ad..e0cd2ba 100644
@@ -126,6 +126,7 @@ enum cpuhp_state {
 	CPUHP_AP_MIPS_GIC_TIMER_STARTING,
 	CPUHP_AP_ARC_TIMER_STARTING,
 	CPUHP_AP_RISCV_TIMER_STARTING,
+	CPUHP_AP_CSKY_TIMER_STARTING,
 	CPUHP_AP_KVM_STARTING,
 	CPUHP_AP_KVM_ARM_VGIC_INIT_STARTING,
 	CPUHP_AP_KVM_ARM_VGIC_STARTING,
Signature · 1 line
2.7.4
#4 lore raw

Re: [PATCH V9 3/8] clocksource: add C-SKY SMP timer

Quoted 26 lines · Guo Ren

This timer is used by SMP system and use mfcr/mtcr instruction to access the regs.

Changelog:
- Remove #define CPUHP_AP_CSKY_TIMER_STARTING
- Add CPUHP_AP_CSKY_TIMER_STARTING in cpuhotplug.h
- Support csky mp timer alpha version.
- Just use low-counter with 32bit width as clocksource.
- Coding convention with upstream feed-back.

---
 drivers/clocksource/Kconfig        |   8 ++
 drivers/clocksource/Makefile       |   1 +
 drivers/clocksource/csky_mptimer.c | 176 +++++++++++++++++++++++++++++++++++++
 include/linux/cpuhotplug.h         |   1 +
 4 files changed, 186 insertions(+)
 create mode 100644 drivers/clocksource/csky_mptimer.c
drivers/clocksource/Kconfig +0 -0
index a11f4ba..a28043f 100644
@@ -620,4 +620,12 @@ config RISCV_TIMER
 	  is accessed via both the SBI and the rdcycle instruction.  This is
 	  required for all RISC-V systems.

drivers/clocksource/Kconfig config RISCV_TIMER · line 631

Quoted 10 lines
drivers/clocksource/Kconfig +8 -0
 
+config CSKY_MPTIMER
+	bool "C-SKY Multi Processor Timer"
+	depends on CSKY
+	select TIMER_OF
+	help
+	  Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
+	  system.
+
 endmenu

The same rule applies here for COMPILE_TEST.

And please rename the file: timer-mp-csky.c

Quoted 64 lines
drivers/clocksource/Makefile +1 -0
index db51b24..848c676 100644
@@ -79,3 +79,4 @@ obj-$(CONFIG_CLKSRC_ST_LPC)		+= clksrc_st_lpc.o
 obj-$(CONFIG_X86_NUMACHIP)		+= numachip.o
 obj-$(CONFIG_ATCPIT100_TIMER)		+= timer-atcpit100.o
 obj-$(CONFIG_RISCV_TIMER)		+= riscv_timer.o
+obj-$(CONFIG_CSKY_MPTIMER)		+= csky_mptimer.o
drivers/clocksource/csky_mptimer.c new file +49 -0
new file mode 100644
index 0000000..9dc3cfb
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/sched_clock.h>
+#include <linux/cpu.h>
+#include <asm/reg_ops.h>
+
+#include "timer-of.h"
+
+#define PTIM_CCVR	"cr<3, 14>"
+#define PTIM_CTLR	"cr<0, 14>"
+#define PTIM_LVR	"cr<6, 14>"
+#define PTIM_TSR	"cr<1, 14>"
+
+static int csky_mptimer_set_next_event(unsigned long delta, struct clock_event_device *ce)
+{
+	mtcr(PTIM_LVR, delta);
+
+	return 0;
+}
+
+static int csky_mptimer_shutdown(struct clock_event_device *ce)
+{
+	mtcr(PTIM_CTLR, 0);
+
+	return 0;
+}
+
+static int csky_mptimer_oneshot(struct clock_event_device *ce)
+{
+	mtcr(PTIM_CTLR, 1);
+
+	return 0;
+}
+
+static int csky_mptimer_oneshot_stopped(struct clock_event_device *ce)
+{
+	mtcr(PTIM_CTLR, 0);
+
+	return 0;
+}
+
+static DEFINE_PER_CPU(struct timer_of, csky_to) = {
+	.flags					= TIMER_OF_CLOCK,
+	.clkevt = {
+		.rating				= 300,
+		.features			= CLOCK_EVT_FEAT_PERCPU |

drivers/clocksource/csky_mptimer.c line 59

Quoted 10 lines
drivers/clocksource/csky_mptimer.c new file +10 -0
+						  CLOCK_EVT_FEAT_ONESHOT,
+		.set_state_shutdown		= csky_mptimer_shutdown,
+		.set_state_oneshot		= csky_mptimer_oneshot,
+		.set_state_oneshot_stopped	= csky_mptimer_oneshot_stopped,
+		.set_next_event			= csky_mptimer_set_next_event,
+	},
+	.of_irq = {
+		.flags				= IRQF_TIMER,
+		.percpu				= 1,
+	},

See comment in the init function.

Quoted 34 lines
drivers/clocksource/csky_mptimer.c new file +34 -0
+};
+
+static irqreturn_t timer_interrupt(int irq, void *dev)
+{
+	struct timer_of *to = this_cpu_ptr(&csky_to);
+
+	mtcr(PTIM_TSR, 0);
+
+	to->clkevt.event_handler(&to->clkevt);
+
+	return IRQ_HANDLED;
+}
+
+/*
+ * clock event for percpu
+ */
+static int csky_mptimer_starting_cpu(unsigned int cpu)
+{
+	struct timer_of *to = per_cpu_ptr(&csky_to, cpu);
+
+	to->clkevt.cpumask = cpumask_of(cpu);
+
+	clockevents_config_and_register(&to->clkevt, timer_of_rate(to), 2, ULONG_MAX);
+
+	enable_percpu_irq(timer_of_irq(to), 0);
+
+	return 0;
+}
+
+static int csky_mptimer_dying_cpu(unsigned int cpu)
+{
+	struct timer_of *to = per_cpu_ptr(&csky_to, cpu);
+
+	disable_percpu_irq(timer_of_irq(to));

drivers/clocksource/csky_mptimer.c line 103

Quoted 10 lines
drivers/clocksource/csky_mptimer.c new file +10 -0
+
+	return 0;
+}
+
+/*
+ * clock source
+ */
+static u64 sched_clock_read(void)
+{
+	return (u64) mfcr(PTIM_CCVR);

extra space

drivers/clocksource/csky_mptimer.c line 108

Quoted 5 lines
drivers/clocksource/csky_mptimer.c new file +5 -0
+}
+
+static u64 clksrc_read(struct clocksource *c)
+{
+	return (u64) mfcr(PTIM_CCVR);

extra space

Quoted 20 lines
drivers/clocksource/csky_mptimer.c new file +20 -0
+}
+
+struct clocksource csky_clocksource = {
+	.name	= "csky",
+	.rating	= 400,
+	.mask	= CLOCKSOURCE_MASK(32),
+	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
+	.read	= clksrc_read,
+};
+
+static int __init csky_mptimer_init(struct device_node *np)
+{
+	int ret, cpu;
+	struct timer_of *to;
+	int rate = 0;
+	int irq	 = 0;
+
+	/*
+	 * Csky_mptimer is designed for C-SKY SMP multi-processors and
+	 * every core has it's own private irq and regs for clkevt and

drivers/clocksource/csky_mptimer.c line 138

Quoted 10 lines
drivers/clocksource/csky_mptimer.c new file +10 -0
+	 * clksrc.
+	 *
+	 * The regs is accessed by cpu instruction: mfcr/mtcr instead of
+	 * mmio map style. So we needn't mmio-address in dts, but we still
+	 * need to give clk and irq number.
+	 *
+	 * We use private irq for the mptimer and irq number is the same
+	 * for every core. So we use request_percpu_irq() in timer_of_init.
+	 */
+

extra line

Quoted 12 lines
drivers/clocksource/csky_mptimer.c new file +12 -0
+	for_each_possible_cpu(cpu) {
+		to = per_cpu_ptr(&csky_to, cpu);
+
+		if (cpu == 0) {
+			to->flags	  |= TIMER_OF_IRQ;
+			to->of_irq.handler = timer_interrupt;
+
+			ret = timer_of_init(np, to);
+			if (ret)
+				return ret;
+
+			rate	= timer_of_rate(to);

drivers/clocksource/csky_mptimer.c line 160

Quoted 10 lines
drivers/clocksource/csky_mptimer.c new file +10 -0
+			irq	= to->of_irq.irq;
+		} else {
+			ret = timer_of_init(np, to);
+			if (ret)
+				return ret;
+
+			to->of_clk.rate	= rate;
+			to->of_irq.irq	= irq;
+		}
+	}

Isn't possible to replace this loop which is a bit confusing by:

- no irq flag specified for timer-of
- request irq before

So we end up with:

	irq = irq_of_parse_and_map(np, 0);
	if (irq <= 0)
		return -EINVAL;

	ret = request_irq(irq, csky_timer_interrupt,
			IRQF_TIMER | IRQF_PERCPU,
                        "csky_mp_timer", &csky_to));
	if (ret)
		return ret;

	for_each_possible_cpu(cpu) {
		to = per_cpu_ptr(&csky_to, cpu);
		ret = timer_of_init(np, to);
		if (ret)
			goto rollback;
	}

Alternatively, you can remove the timer_of struct and instantiate the percpu stuff in cpuhp callbacks (cf. jcore_pit).

Quoted 28 lines
drivers/clocksource/csky_mptimer.c new file +15 -0
+	ret = cpuhp_setup_state(CPUHP_AP_CSKY_TIMER_STARTING,
+				"clockevents/csky/timer:starting",
+				csky_mptimer_starting_cpu,
+				csky_mptimer_dying_cpu);
+	if (ret) {
+		pr_err("%s: Failed to cpuhp_setup_state.\n", __func__);
+		return ret;
+	}
+
+	clocksource_register_hz(&csky_clocksource, rate);
+	sched_clock_register(sched_clock_read, 32, rate);
+
+	return 0;
+}
+TIMER_OF_DECLARE(csky_mptimer, "csky,mptimer", csky_mptimer_init);
include/linux/cpuhotplug.h +1 -0
index caf40ad..e0cd2ba 100644
@@ -126,6 +126,7 @@ enum cpuhp_state {
 	CPUHP_AP_MIPS_GIC_TIMER_STARTING,
 	CPUHP_AP_ARC_TIMER_STARTING,
 	CPUHP_AP_RISCV_TIMER_STARTING,
+	CPUHP_AP_CSKY_TIMER_STARTING,
 	CPUHP_AP_KVM_STARTING,
 	CPUHP_AP_KVM_ARM_VGIC_INIT_STARTING,
 	CPUHP_AP_KVM_ARM_VGIC_STARTING,
Signature · 5 lines
 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
author
#5 lore raw

Re: [PATCH V9 3/8] clocksource: add C-SKY SMP timer

Quoted 28 lines · Daniel Lezcano
Quoted 27 lines · Guo Ren

This timer is used by SMP system and use mfcr/mtcr instruction to access the regs.

Changelog:
- Remove #define CPUHP_AP_CSKY_TIMER_STARTING
- Add CPUHP_AP_CSKY_TIMER_STARTING in cpuhotplug.h
- Support csky mp timer alpha version.
- Just use low-counter with 32bit width as clocksource.
- Coding convention with upstream feed-back.

---
 drivers/clocksource/Kconfig        |   8 ++
 drivers/clocksource/Makefile       |   1 +
 drivers/clocksource/csky_mptimer.c | 176 +++++++++++++++++++++++++++++++++++++
 include/linux/cpuhotplug.h         |   1 +
 4 files changed, 186 insertions(+)
 create mode 100644 drivers/clocksource/csky_mptimer.c
drivers/clocksource/Kconfig +0 -0
index a11f4ba..a28043f 100644
@@ -620,4 +620,12 @@ config RISCV_TIMER
 	  is accessed via both the SBI and the rdcycle instruction.  This is
 	  required for all RISC-V systems.
 
Quoted 11 lines

drivers/clocksource/Kconfig config RISCV_TIMER · line 631

Quoted 9 lines
drivers/clocksource/Kconfig +8 -0
+config CSKY_MPTIMER
+	bool "C-SKY Multi Processor Timer"
+	depends on CSKY
+	select TIMER_OF
+	help
+	  Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
+	  system.
+
 endmenu

The same rule applies here for COMPILE_TEST.

Ok

Quoted 1 line

And please rename the file: timer-mp-csky.c

Ok

Quoted 3 lines

drivers/clocksource/Kconfig

Quoted 1 line
drivers/clocksource/Kconfig +1 -0
+	return (u64) mfcr(PTIM_CCVR);

extra space

Ok

Quoted 8 lines

drivers/clocksource/Kconfig

Quoted 6 lines
drivers/clocksource/Kconfig +5 -0
+}
+
+static u64 clksrc_read(struct clocksource *c)
+{
+	return (u64) mfcr(PTIM_CCVR);

extra space

Ok

Quoted 4 lines

drivers/clocksource/Kconfig

Quoted 2 lines
drivers/clocksource/Kconfig +2 -0
+	 */
+

extra line

Ok

Quoted 27 lines
Quoted 13 lines
drivers/clocksource/Kconfig +12 -0
+	for_each_possible_cpu(cpu) {
+		to = per_cpu_ptr(&csky_to, cpu);
+
+		if (cpu == 0) {
+			to->flags	  |= TIMER_OF_IRQ;
+			to->of_irq.handler = timer_interrupt;
+
+			ret = timer_of_init(np, to);
+			if (ret)
+				return ret;
+
+			rate	= timer_of_rate(to);

drivers/clocksource/Kconfig

Quoted 10 lines
drivers/clocksource/Kconfig +10 -0
+			irq	= to->of_irq.irq;
+		} else {
+			ret = timer_of_init(np, to);
+			if (ret)
+				return ret;
+
+			to->of_clk.rate	= rate;
+			to->of_irq.irq	= irq;
+		}
+	}

Isn't possible to replace this loop which is a bit confusing by:

Quoted 2 lines

- no irq flag specified for timer-of
- request irq before

Ok, but I've a bit different :)

Quoted 5 lines

So we end up with:

	irq = irq_of_parse_and_map(np, 0);
	if (irq <= 0)
		return -EINVAL;
		panic();

I want a panic here. Return will make debug confused and directly tell the people where is wrong. It's root-timer for us and it must bootup.

If it's a co-timer, I also think return is good.

Quoted 4 lines

ret = request_irq(irq, csky_timer_interrupt,
IRQF_TIMER | IRQF_PERCPU, "csky_mp_timer", &csky_to));

	ret = request_percpu_irq(irq, csky_timer_interrupt,
			"csky_mp_timer", &csky_to);

I'll use request_percpu_irq the same as in timer_of and I've tested it's Ok.

Quoted 2 lines
	if (ret)
		return ret;

Pls let me panic here.

Quoted 6 lines
	for_each_possible_cpu(cpu) {
		to = per_cpu_ptr(&csky_to, cpu);
		ret = timer_of_init(np, to);
		if (ret)
			goto rollback;

Pls let me panic here.

Quoted 1 line
	}

Best Regards
Guo Ren

#6 lore raw

Re: [PATCH V9 3/8] clocksource: add C-SKY SMP timer

On 02/10/2018 07:40, Guo Ren wrote:
[ ... ]

Quoted 9 lines
Quoted 4 lines
	irq = irq_of_parse_and_map(np, 0);
	if (irq <= 0)
		return -EINVAL;
		panic();

I want a panic here. Return will make debug confused and directly tell the people where is wrong. It's root-timer for us and it must bootup.

If it's a co-timer, I also think return is good.

We don't need a panic in case of failure. If the board as an alternate timer it should be able to boot, that is the general rule of thumb for these drivers in this directory.

The init timer functions will be called via the timer_probe() which browse the timer_of_table (the one with all entries for the TIMER_OF_DECLARE macros).

You can see in the code below (from timer_probe.c), there is an error message emitted if the driver fails to initialize and another one much stronger if no timer was initialize.

This is enough trace IMO.

void __init timer_probe(void)

{
        struct device_node *np;
        const struct of_device_id *match;
        of_init_fn_1_ret init_func_ret;
        unsigned timers = 0;
        int ret;

        for_each_matching_node_and_match(np, __timer_of_table, &match) {
                if (!of_device_is_available(np))
                        continue;

                init_func_ret = match->data;

                ret = init_func_ret(np);
                if (ret) {
                        pr_err("Failed to initialize '%pOF': %d\n", np,
ret);
                        continue;
                }

                timers++;
        }

        timers += acpi_probe_device_table(timer);

        if (!timers)
                pr_crit("%s: no matching timers found\n", __func__);
}
Signature · 5 lines
 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
author
#7 lore raw

Re: [PATCH V9 3/8] clocksource: add C-SKY SMP timer

Quoted 41 lines · Daniel Lezcano

On 02/10/2018 07:40, Guo Ren wrote:
[ ... ]

Quoted 9 lines
Quoted 4 lines
	irq = irq_of_parse_and_map(np, 0);
	if (irq <= 0)
		return -EINVAL;
		panic();

I want a panic here. Return will make debug confused and directly tell the people where is wrong. It's root-timer for us and it must bootup.

If it's a co-timer, I also think return is good.

We don't need a panic in case of failure. If the board as an alternate timer it should be able to boot, that is the general rule of thumb for these drivers in this directory.

The init timer functions will be called via the timer_probe() which browse the timer_of_table (the one with all entries for the TIMER_OF_DECLARE macros).

You can see in the code below (from timer_probe.c), there is an error message emitted if the driver fails to initialize and another one much stronger if no timer was initialize.

This is enough trace IMO.

void __init timer_probe(void)

{
        struct device_node *np;
        const struct of_device_id *match;
        of_init_fn_1_ret init_func_ret;
        unsigned timers = 0;
        int ret;

        for_each_matching_node_and_match(np, __timer_of_table, &match) {
                if (!of_device_is_available(np))
                        continue;

                init_func_ret = match->data;
Quoted 8 lines
                ret = init_func_ret(np);
                if (ret) {
                        pr_err("Failed to initialize '%pOF': %d\n", np,
ret);
                        continue;
                }

                timers++;

Ok, let other timers boot up as possible and no panic for csky timer.

Guo Ren

author
#8 lore raw

PATCH v9 4/8 dt-bindings: timer: C-SKY Multi-processor timer

In reply to Guo Ren

Dt-bingdings doc for C-SKY SMP system setting.

Changelog:
- Drop the interrupt-parent.

---
 .../devicetree/bindings/timer/csky,mptimer.txt     | 42 ++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/csky,mptimer.txt
Documentation/devicetree/bindings/timer/csky,mptimer.txt new file +42 -0
new file mode 100644
index 0000000..15cfec0
@@ -0,0 +1,42 @@
+============================
+C-SKY Multi-processors Timer
+============================
+
+C-SKY multi-processors timer is designed for C-SKY SMP system and the
+regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
+
+ - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
+ - PTIM_TSR  "cr<1, 14>" Interrupt cleanup status reg.
+ - PTIM_CCVR "cr<3, 14>" Current counter value reg.
+ - PTIM_LVR  "cr<6, 14>" Window value reg to triger next event.
+
+==============================
+timer node bindings definition
+==============================
+
+	Description: Describes SMP timer
+
+	PROPERTIES
+
+	- compatible
+		Usage: required
+		Value type: <string>
+		Definition: must be "csky,mptimer"
+	- clocks
+		Usage: required
+		Value type: <node>
+		Definition: must be input clk node
+	- interrupts
+		Usage: required
+		Value type: <u32>
+		Definition: must be timer irq num defined by soc
+
+Examples:
+---------
+
+	timer: timer {
+		compatible = "csky,mptimer";
+		clocks = <&dummy_apb_clk>;
+		interrupts = <16>;
+		interrupt-parent = <&intc>;
+	};
Signature · 1 line
2.7.4
author
#9 lore raw

PATCH v9 5/8 dt-bindings: interrupt-controller: C-SKY APB intc

In reply to Guo Ren

- Dt-bindings doc about C-SKY apb bus interrupt controller.

---
 .../interrupt-controller/csky,apb-intc.txt         | 62 ++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt
Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt new file +62 -0
new file mode 100644
index 0000000..44286dc
@@ -0,0 +1,62 @@
+==============================
+C-SKY APB Interrupt Controller
+==============================
+
+C-SKY APB Interrupt Controller is a simple soc interrupt controller
+on the apb bus and we only use it as root irq controller.
+
+ - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums.
+ - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.
+ - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums.
+
+=============================
+intc node bindings definition
+=============================
+
+	Description: Describes APB interrupt controller
+
+	PROPERTIES
+
+	- compatible
+		Usage: required
+		Value type: <string>
+		Definition: must be "csky,apb-intc"
+				    "csky,dual-apb-intc"
+				    "csky,gx6605s-intc"
+	- #interrupt-cells
+		Usage: required
+		Value type: <u32>
+		Definition: must be <1>
+	- reg
+		Usage: required
+		Value type: <u32 u32>
+		Definition: <phyaddr size> in soc from cpu view
+	- interrupt-controller:
+		Usage: required
+	- csky,support-pulse-signal:
+		Usage: select
+		Description: to support pulse signal flag
+
+Examples:
+---------
+
+	intc: interrupt-controller@500000 {
+		compatible = "csky,apb-intc";
+		#interrupt-cells = <1>;
+		reg = <0x00500000 0x400>;
+		interrupt-controller;
+	};
+
+	intc: interrupt-controller@500000 {
+		compatible = "csky,dual-apb-intc";
+		#interrupt-cells = <1>;
+		reg = <0x00500000 0x400>;
+		interrupt-controller;
+	};
+
+	intc: interrupt-controller@500000 {
+		compatible = "csky,gx6605s-intc";
+		#interrupt-cells = <1>;
+		reg = <0x00500000 0x400>;
+		interrupt-controller;
+	};
Signature · 1 line
2.7.4
author
#10 lore raw

PATCH v9 6/8 irqchip: add C-SKY APB bus interrupt controller

In reply to Guo Ren

- irq-csky-apb-intc is a simple SOC interrupt controller which is used in a lot of C-SKY CPU SOC products.

Changelog:
- use "bool ret" instead of "int ret"
- add support-pulse-signal in irq-csky-apb-intc.c
- change name with upstream feed-back
- add INTC_IFR to clear irq-pending
- remove CSKY_VECIRQ_LEGENCY
- change to generic irq chip framework
- add License and Copyright
- use irq_domain_add_linear instead of leagcy

---
 drivers/irqchip/Kconfig             |   8 ++
 drivers/irqchip/Makefile            |   1 +
 drivers/irqchip/irq-csky-apb-intc.c | 260 ++++++++++++++++++++++++++++++++++++
 3 files changed, 269 insertions(+)
 create mode 100644 drivers/irqchip/irq-csky-apb-intc.c
drivers/irqchip/Kconfig +8 -0
index 92e1c20..bf12549 100644
@@ -379,6 +379,14 @@ config CSKY_MPINTC
 	  for C-SKY SMP system. In fact it's not mmio map and it use ld/st
 	  to visit the controller's register inside CPU.
 
+config CSKY_APB_INTC
+	bool "C-SKY APB Interrupt Controller"
+	depends on CSKY
+	help
+	  Say yes here to enable C-SKY APB interrupt controller driver used
+	  by C-SKY single core SOC system. It use mmio map apb-bus to visit
+	  the controller's register.
+
 endmenu
 
 config SIFIVE_PLIC
drivers/irqchip/Makefile +1 -0
index 6b739ea..72eaf53 100644
@@ -88,4 +88,5 @@ obj-$(CONFIG_GOLDFISH_PIC) 		+= irq-goldfish-pic.o
 obj-$(CONFIG_NDS32)			+= irq-ativic32.o
 obj-$(CONFIG_QCOM_PDC)			+= qcom-pdc.o
 obj-$(CONFIG_CSKY_MPINTC)		+= irq-csky-mpintc.o
+obj-$(CONFIG_CSKY_APB_INTC)		+= irq-csky-apb-intc.o
 obj-$(CONFIG_SIFIVE_PLIC)		+= irq-sifive-plic.o
drivers/irqchip/irq-csky-apb-intc.c new file +260 -0

260 lines not on this page · raw message

Signature · 1 line
2.7.4
author
#11 lore raw

PATCH v9 7/8 dt-bindings: timer: gx6605s SOC timer

In reply to Guo Ren

- Dt-bindings doc for gx6605s SOC's system timer.

---
 .../bindings/timer/csky,gx6605s-timer.txt          | 42 ++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt new file +42 -0
new file mode 100644
index 0000000..6b04344
@@ -0,0 +1,42 @@
+=================
+gx6605s SOC Timer
+=================
+
+The timer is used in gx6605s soc as system timer and the driver
+contain clk event and clk source.
+
+==============================
+timer node bindings definition
+==============================
+
+	Description: Describes gx6605s SOC timer
+
+	PROPERTIES
+
+	- compatible
+		Usage: required
+		Value type: <string>
+		Definition: must be "csky,gx6605s-timer"
+	- reg
+		Usage: required
+		Value type: <u32 u32>
+		Definition: <phyaddr size> in soc from cpu view
+	- clocks
+		Usage: required
+		Value type: phandle + clock specifier cells
+		Definition: must be input clk node
+	- interrupt
+		Usage: required
+		Value type: <u32>
+		Definition: must be timer irq num defined by soc
+
+Examples:
+---------
+
+	timer0: timer@20a000 {
+		compatible = "csky,gx6605s-timer";
+		reg = <0x0020a000 0x400>;
+		clocks = <&dummy_apb_clk>;
+		interrupts = <10>;
+		interrupt-parent = <&intc>;
+	};
Signature · 1 line
2.7.4
author
#12 lore raw

PATCH v9 8/8 clocksource: add gx6605s SOC system timer

In reply to Guo Ren

Changelog:
- Add COMIPLE_TEST in Kconfig
- no cast is needed for "struct clock_event_device *ce = dev"
- remove: extra space after (u64)
- Add License and Copyright
- Use timer-of framework
- Change name with upstream feedback
- Use clksource_mmio framework

---
 drivers/clocksource/Kconfig         |   8 ++
 drivers/clocksource/Makefile        |   1 +
 drivers/clocksource/timer-gx6605s.c | 150 ++++++++++++++++++++++++++++++++++++
 3 files changed, 159 insertions(+)
 create mode 100644 drivers/clocksource/timer-gx6605s.c
drivers/clocksource/Kconfig +8 -0
index a28043f..3dc24ca 100644
@@ -628,4 +628,12 @@ config CSKY_MPTIMER
 	  Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
 	  system.
 
+config GX6605S_TIMER
+	bool "Gx6605s SOC system timer driver" if COMPILE_TEST
+	depends on CSKY
+	select CLKSRC_MMIO
+	select TIMER_OF
+	help
+	  This option enables support for gx6605s SOC's timer.
+
 endmenu
drivers/clocksource/Makefile +1 -0
index 848c676..7a1b0f4 100644
@@ -80,3 +80,4 @@ obj-$(CONFIG_X86_NUMACHIP)		+= numachip.o
 obj-$(CONFIG_ATCPIT100_TIMER)		+= timer-atcpit100.o
 obj-$(CONFIG_RISCV_TIMER)		+= riscv_timer.o
 obj-$(CONFIG_CSKY_MPTIMER)		+= csky_mptimer.o
+obj-$(CONFIG_GX6605S_TIMER)		+= timer-gx6605s.o
drivers/clocksource/timer-gx6605s.c new file +150 -0

150 lines not on this page · raw message

Signature · 1 line
2.7.4