Support 4 levels of translation tables for ARM64
Get series with b4
b4 am '[email protected]'Versions newest first · linked by author and title
- v6 Latest7 patches 14 repliesIn review
- v56 patches 15 repliesSuperseded
- v47 patches 12 repliesSuperseded
Earlier versions · 3
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v3 | 7 patches | 5 replies | Superseded | |
| v2 | 7 patches | 2 replies | Superseded | |
| v1 | 8 patches | 14 replies | Superseded |
Changes in v6 from the cover letter
- added dynamic VTTBR_X configuration logic
- removed a redundant logic in stage2_set_pte as per Christoffer's comment
- added comments for create_pud_entry as per Christoffer and Steve's comment
- fixed typos in 4 level descriptions as per Christoffer's comment
- revised arm64 Kconfig help message as per Christoffer's comment
- rebased on top of for-next/core branch of arm64/linux.git
Patches in v6 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/7 | arm64: Use pr_* instead of printkarch/ | +4 | 0 replies | |
| 2/7 | arm64: Introduce VA_BITS and translation level optionsarch/ arch/ arch/ +4 more | +54 | 6 replies | |
| 3/7 | arm64: Add a description on 48-bit address space with 4KB pagesDocumentation/ | +51 | 2 replies | |
| 4/7 | arm64: Add 4 levels of page tables definition with 4KB pagesarch/ arch/ | +121 | 0 replies | |
| 5/7 | arm64: mm: Implement 4 levels of translation tablesarch/ arch/ arch/ +8 more | +156 | 0 replies | |
| 6/7 | arm64: KVM: Set physical address size related factors in runtimearch/ arch/ arch/ | +98 | 5 replies | |
| 7/7 | arm64: KVM: Implement 4 levels of translation tables for HYP and stage2arch/ arch/ arch/ +2 more | +108 | 0 replies | |
| 7/7 | arm64: KVM: Implement 4 levels of translation tables forarch/ arch/ arch/ +2 more | +108 | 0 replies | |
| 7/7 | arm64: KVM: Implement 4 levels of translation tables for HYP and stage2arch/ arch/ arch/ +2 more | +108 | 1 reply |
Reviews trailers per patch
All 9 patches have a Reviewed-by or Acked-by.
| Patch | Sungjinn Chung | Kukjin Kim | Christoffer Dall | Steve Capper |
|---|---|---|---|---|
| 1/7 | R-b | A-b | ||
| 2/7 | R-b | A-b | R-b | |
| 3/7 | R-b | A-b | A-b | |
| 4/7 | R-b | A-b | R-b | |
| 5/7 | R-b | A-b | R-b | R-b |
| 6/7 | R-b | |||
| 7/7 | R-b R-b R-b | A-b A-b | ||
| 7/7 | R-b R-b R-b | A-b A-b | ||
| 7/7 | R-b R-b R-b | A-b A-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 4 reviewers.
Cover letter [PATCH v6 0/7] Support 4 levels of translation tables for ARM64
Hi All,
This v6 patchset supports 4 levels of tranlsation tables for ARM64.
Firstly, the patchset introduces virtual address space size and translation level options as taking account into the comment from Catalin Marinas:
http://www.spinics.net/linux/lists/arm-kernel/msg319552.html
Then, it implements 4 levels of translation tables for native.
A dynamic VTTBR_X configuration is added before implementing 4 levels for both HYP and stage2 sides.
All ARMv8 and ARMv7 related changes are validated with FastModels+kvmtool and A15+QEMU, respectively.
Changes since v1:
- fixed unmatched data types as per Steve's comment
- removed unnecessary #ifdef in arch/arm64/mm/* as per Steve's comment
- revised create_pgd_entry to deal with PUD entry as per Steve's comment
- introduced a macro for initial memblock limit as per Steve's comment
- dropped "Fix line length exceeding 80 characters" patch as per Marc's comment
- removed unnecessary #ifdef in arch/arm/kvm/mmu.c as per Marc's comment
- added a macro for a number of objects of as per Marc's comment
Changes since v2:
- revised some macros in a generic way as per Marc's comment
- added a 2 level option for kvm mmu cache allocation as per Marc's comment
Changes since v3:
- added #ifdef to decide swapper and idmap size as per Steve's comment
- introduced Steve's create_pgd_entry
Changes since v4:
- hided translation level options from menuconfig as per Catalin's comment
- dropped some printk changes as per Mitchel's comment
- squashed VA_BITS related patches into a single patch
Changes since v5:
- added dynamic VTTBR_X configuration logic
- removed a redundant logic in stage2_set_pte as per Christoffer's comment
- added comments for create_pud_entry as per Christoffer and Steve's comment
- fixed typos in 4 level descriptions as per Christoffer's comment
- revised arm64 Kconfig help message as per Christoffer's comment
- rebased on top of for-next/core branch of arm64/linux.git
Jungseok Lee (7):
arm64: Use pr_* instead of printk
arm64: Introduce VA_BITS and translation level options
arm64: Add a description on 48-bit address space with 4KB pages
arm64: Add 4 levels of page tables definition with 4KB pages
arm64: mm: Implement 4 levels of translation tables
arm64: KVM: Set physical address size related factors in runtime
arm64: KVM: Implement 4 levels of translation tables for HYP and
stage2
Documentation/arm64/memory.txt | 59 +++++++++++++--- arch/arm/include/asm/kvm_mmu.h | 10 +++ arch/arm/kvm/arm.c | 90 ++++++++++++++++++++++++- arch/arm/kvm/mmu.c | 77 ++++++++++++++++++--- arch/arm64/Kconfig | 53 ++++++++++++++- arch/arm64/include/asm/kvm_arm.h | 29 ++++---- arch/arm64/include/asm/kvm_mmu.h | 12 ++++ arch/arm64/include/asm/memblock.h | 6 ++ arch/arm64/include/asm/memory.h | 6 +- arch/arm64/include/asm/page.h | 6 +- arch/arm64/include/asm/pgalloc.h | 24 ++++++- arch/arm64/include/asm/pgtable-4level-hwdef.h | 50 ++++++++++++++ arch/arm64/include/asm/pgtable-4level-types.h | 71 +++++++++++++++++++ arch/arm64/include/asm/pgtable-hwdef.h | 8 ++- arch/arm64/include/asm/pgtable.h | 53 +++++++++++++-- arch/arm64/include/asm/tlb.h | 11 ++- arch/arm64/kernel/head.S | 54 ++++++++++++--- arch/arm64/kernel/traps.c | 13 ++-- arch/arm64/kvm/hyp-init.S | 20 ++++-- arch/arm64/mm/fault.c | 1 + arch/arm64/mm/mmu.c | 16 +++-- 21 files changed, 592 insertions(+), 77 deletions(-) create mode 100644 arch/arm64/include/asm/pgtable-4level-hwdef.h create mode 100644 arch/arm64/include/asm/pgtable-4level-types.h
Signature · 1 line
1.7.10.4