arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3 IPs
Status from this message: Applied, thanks!
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v5 Latest9 patches 2 repliesApplied
- v49 patches 8 repliesSuperseded
- v39 patches 7 repliesSuperseded
Earlier versions · 2
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v2 | 4 patches | 2 replies | Superseded | |
| v1 | 3 patches | 4 replies | Superseded |
Changes in v5 from the cover letter
- remove board-specific interrupt from UART17 in SoC dtsi
- rearrange node properties to have various *-cells properties come right before status
- collect more tags
Patches in v5 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/9 | arm64: dts: qcom: sa8775p: add the QUPv3 #2 nodearch/ | +13 | 0 replies | |
| 2/9 | arm64: dts: qcom: sa8775p-ride: enable QUPv3 #2arch/ | +4 | 0 replies | |
| 3/9 | arm64: dts: qcom: sa8775p: add the i2c18 nodearch/ | +22 | 0 replies | |
| 4/9 | arm64: dts: qcom: sa8775p-ride: enable i2c18arch/ | +15 | 0 replies | |
| 5/9 | arm64: dts: qcom: sa8775p: add the spi16 nodearch/ | +21 | 0 replies | |
| 6/9 | arm64: dts: qcom: sa8775p-ride: enable the SPI nodearch/ | +14 | 0 replies | |
| 7/9 | arm64: dts: qcom: sa8775p: add high-speed UART nodesarch/ | +30 | 0 replies | |
| 8/9 | arm64: dts: qcom: sa8775p-ride: enable the GNSS UART portarch/ | +33 | 0 replies | |
| 9/9 | arm64: dts: qcom: sa8775p-ride: enable the BT UART portarch/ | +33 | 0 replies |
Reviews trailers per patch
6 of 9 patches have a Reviewed-by or Acked-by.
| Patch | Konrad Dybcio |
|---|---|
| 1/9 | |
| 2/9 | R-b |
| 3/9 | |
| 4/9 | R-b |
| 5/9 | R-b |
| 6/9 | R-b |
| 7/9 | |
| 8/9 | R-b |
| 9/9 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH v5 0/9] arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3 IPs
From: Bartosz Golaszewski <[email protected]>
This enables the QUPv3 interfaces that are exposed on the sa8775p-ride
board: I2C, SPI and the Bluetooth and GNSS UART ports.
v4 -> v5:
- remove board-specific interrupt from UART17 in SoC dtsi
- rearrange node properties to have various *-cells properties come right before status
- collect more tags
v3 -> v4:
- use interconnect constants instead of magic numbers where applicable
- pad addresses in reg to 8 digits
- group pins under state nodes for UART
v2 -> v3:
- fix the interrupt number for uart12
- replace underscores with hyphens in DT node names (although make dtbs_check does not raise warnings about this)
- rearrange the commits so that they're more fine-grained with separate patches for adding nodes to dtsi and enabling them for the board
v1 -> v2:
- uart17 is the Bluetooth port, not GNSS
- add uart12 for GNSS too in that case
Bartosz Golaszewski (9):
arm64: dts: qcom: sa8775p: add the QUPv3 #2 node
arm64: dts: qcom: sa8775p-ride: enable QUPv3 #2
arm64: dts: qcom: sa8775p: add the i2c18 node
arm64: dts: qcom: sa8775p-ride: enable i2c18
arm64: dts: qcom: sa8775p: add the spi16 node
arm64: dts: qcom: sa8775p-ride: enable the SPI node
arm64: dts: qcom: sa8775p: add high-speed UART nodes
arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port
arm64: dts: qcom: sa8775p-ride: enable the BT UART port
arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 99 +++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 86 ++++++++++++++++++++ 2 files changed, 185 insertions(+)
Signature · 1 line
2.37.2