Enable Power Modes Support for SAMA7D65 SoC

From: Ryan Wanner <[email protected]>

This patch set adds support for low power modes for the SAMA7D65 SoC and the required components and changes for low power modes.

The series includes changes in the asm code to account for the addtional clocks that are in this SoC.

The Device tree additions are to enable all the components needed to keep the SoC in low power mode.

There are some DTB check warnings but that is due to the dt-binding not in the correct .yaml file format.

Changes v1 -> v2:
- Add missing compatible for ddr3phy, it is now in both syscon sets.
- Fix alphabetical ordering for sama7d65.
- Remove the incorrect reorganizing patch.
- Remove sama7g5-rtt as a compatible for sama7d65-rtt and add sama7d65-rtt as a compatible wake up source in the pm driver.

Changes from v2 -> v3:
- Correct mistake in v2 sfrbu dt-binding patch.
- Correct incorrect dt-binding addition and formatting for rtc and rtt bindings.
- Add missing SoB tag.
- Cleaned up commit message for Backup mode to describe SHDWC is status register is cleared for this SoC.
- Cleaned up variable naming and usage for mcks. Changed the mcks number to the correct number of clocks needed to be saved and corrected the ASM code accordingly.
- Removed the SHDWC from ULP0 wake-up source as it is not configured as a valid wake-up source for ULP0.
- Separated all the DTSI and DTS changes into individual patches.

Changes from v3 -> v4:
- Add sama7d65-gpbr to the dt-binding.
- Converted the sama5d2-secumod binding into yaml format.
- Add sama7d65-secumod to the new dt binding.
- Collect and remove applied and accpeted pathces from the set.

Changes from v4 -> v5:
- Use generic naming for dt-binding yaml example.
- Adjust DTSI SECUMOD node to match generic naming.
- Collect Acked and Reviewed tags.

v1) https://lore.kernel.org/linux-arm-kernel/[email protected]/
v2) https://lore.kernel.org/linux-arm-kernel/[email protected]/
v3) https://lore.kernel.org/linux-arm-kernel/[email protected]/T/#m576233e7af84d68559afb286884c2b9294e7bc1d
v4) https://lore.kernel.org/linux-arm-kernel/[email protected]/

Ryan Wanner (11):
dt-bindings: sram: Add microchip,sama7d65-sram
dt-bindings: power: reset: atmel,sama5d2-shdwc: Add
microchip,sama7d65-shdwc
dt-bindings: reset: atmel,at91sam9260-reset: add
microchip,sama7d65-rstc
dt-bindings: rtc: at91rm9200: add microchip,sama7d65-rtc
dt-bindings: at91rm9260-rtt: add microchip,sama7d65-rtt
dt-bindings: mfd: atmel: Add microchip,sama7d65-gpbr
dt-bindings: mfd: syscon: atmel,sama5d2-secumod: convert to yaml
dt-bindings: mfd: syscon: add microchip,sama7d65-secumod
ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65
SoC
ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board

 .../bindings/arm/atmel,sama5d2-secumod.yaml   | 49 +++++++++++++++++++
 .../devicetree/bindings/arm/atmel-sysregs.txt | 25 ----------
 .../bindings/mfd/atmel,at91sam9260-gpbr.yaml  |  1 +
 .../power/reset/atmel,sama5d2-shdwc.yaml      |  5 ++
 .../reset/atmel,at91sam9260-reset.yaml        |  3 ++
 .../bindings/rtc/atmel,at91rm9200-rtc.yaml    |  4 +-
 .../bindings/rtc/atmel,at91sam9260-rtt.yaml   |  1 +
 .../devicetree/bindings/sram/sram.yaml        |  1 +
 .../dts/microchip/at91-sama7d65_curiosity.dts |  4 ++
 arch/arm/boot/dts/microchip/sama7d65.dtsi     | 47 ++++++++++++++++++
 10 files changed, 114 insertions(+), 26 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/atmel,sama5d2-secumod.yaml

2.43.0