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dt-bindings: qcom: Add SC7180 bindings

PATCH Superseded Rajendra Nayak 3 participants 8 messages Oct 15, 2019 – Oct 16, 2019

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Device tree bindings Arm Qualcomm mailing list Arm Qualcomm support Arm/Qualcomm chromebook support

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Rajendra Nayak

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#0 lore raw

PATCH 1/2 dt-bindings: qcom: Add SC7180 bindings

Add a SoC string 'sc7180' for the qualcomm SC7180 SoC. Also add a new board type 'idp'

Signed-off-by Rajendra Nayak <[email protected]>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/arm/qcom.yaml +2 -0
index e39d8f02e33c..0a60ea051541 100644
@@ -36,6 +36,7 @@ description: |
   	mdm9615
   	ipq8074
   	sdm845
+  	sc7180
 
   The 'board' element must be one of the following strings:
 

@@ -46,6 +47,7 @@ description: |
   	sbc
   	hk01
   	qrd
+  	idp
 
   The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
   where the minor number may be omitted when it's zero, i.e.  v1.0 is the same
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
author
#1 lore raw

PATCH 2/2 arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc

Add skeletal sc7180 SoC dtsi and idp board dts files.

Co-developed-by Taniya Das <[email protected]>
Signed-off-by Taniya Das <[email protected]>
Signed-off-by Rajendra Nayak <[email protected]>

---
This isn't ready for merge yet, depends on gcc driver patches [1] for the DT header inclusion

[1] https://www.spinics.net/lists/linux-clk/msg41851.html

 arch/arm64/boot/dts/qcom/Makefile       |   1 +
 arch/arm64/boot/dts/qcom/sc7180-idp.dts |  47 ++++
 arch/arm64/boot/dts/qcom/sc7180.dtsi    | 318 ++++++++++++++++++++++++
 3 files changed, 366 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sc7180-idp.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sc7180.dtsi
arch/arm64/boot/dts/qcom/Makefile +1 -0
index 6498a1ec893f..7a5c2f7fe37f 100644
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-asus-novago-tp370ql.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-hp-envy-x2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-lenovo-miix-630.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-mtp.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-cheza-r3.dtb
arch/arm64/boot/dts/qcom/sc7180-idp.dts new file +47 -0

47 lines not on this page · raw message

arch/arm64/boot/dts/qcom/sc7180.dtsi new file +318 -0

318 lines not on this page · raw message

Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
#2 lore raw

Re: [PATCH 2/2] arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc

arch/arm64/boot/dts/qcom/sc7180.dtsi line 142

Quoted 9 lines · Rajendra Nayak
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +9 -0
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	clocks {

Can we have these sorted alphabetically please

Quoted 5 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +5 -0
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			clock-output-names = "xo_board";
+			#clock-cells = <0>;

arch/arm64/boot/dts/qcom/sc7180.dtsi line 157

Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +10 -0
+		};
+
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <32764>;
+			clock-output-names = "sleep_clk";
+			#clock-cells = <0>;
+		};
+
+		bi_tcxo: bi_tcxo {

why is this a clock defined here? Isnt this gcc clock?

Signature · 1 line
~Vinod
#3 lore raw

Re: [PATCH 2/2] arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc

Hi Vinod,

Quoted 23 lines · Vinod Koul

arch/arm64/boot/dts/qcom/sc7180.dtsi line 142

Quoted 9 lines · Rajendra Nayak
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +9 -0
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	clocks {

Can we have these sorted alphabetically please

Quoted 9 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +9 -0
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			clock-output-names = "xo_board";
+			#clock-cells = <0>;
+		};
+
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
Quoted 9 lines

arch/arm64/boot/dts/qcom/sc7180.dtsi line 157

Quoted 6 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +6 -0
+			clock-frequency = <32764>;
+			clock-output-names = "sleep_clk";
+			#clock-cells = <0>;
+		};
+
+		bi_tcxo: bi_tcxo {

why is this a clock defined here? Isnt this gcc clock?

This is a RPMH-controlled clock and not from GCC. It is the parent clock for GCC RCGs/PLLs.

Once the RPMH clock support is added these would be removed.

Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.

--
#4 lore raw

Re: [PATCH 2/2] arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc

Quoted 35 lines · Taniya Das

Hi Vinod,

Quoted 23 lines · Vinod Koul

arch/arm64/boot/dts/qcom/sc7180.dtsi line 142

Quoted 9 lines · Rajendra Nayak
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +9 -0
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	clocks {

Can we have these sorted alphabetically please

Quoted 9 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +9 -0
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			clock-output-names = "xo_board";
+			#clock-cells = <0>;
+		};
+
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7180.dtsi line 157

Quoted 6 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +6 -0
+			clock-frequency = <32764>;
+			clock-output-names = "sleep_clk";
+			#clock-cells = <0>;
+		};
+
+		bi_tcxo: bi_tcxo {

why is this a clock defined here? Isnt this gcc clock?

Quoted 2 lines

This is a RPMH-controlled clock and not from GCC. It is the parent clock for GCC RCGs/PLLs.

Yes right!

Quoted 1 line

Once the RPMH clock support is added these would be removed.

Wont it make sense to keep this bit not upstream and then remove that part when you have rpmh support available. Reduces the churn upstream!

The parent can be xo_board till then!

Signature · 1 line
~Vinod
#5 lore raw

Re: [PATCH 2/2] arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc

Quoted 22 lines
Quoted 19 lines
Quoted 10 lines
Quoted 10 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +9 -0
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			clock-output-names = "xo_board";
+			#clock-cells = <0>;
+		};
+
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
Quoted 8 lines

arch/arm64/boot/dts/qcom/sc7180.dtsi line 157

Quoted 6 lines
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +6 -0
+			clock-frequency = <32764>;
+			clock-output-names = "sleep_clk";
+			#clock-cells = <0>;
+		};
+
+		bi_tcxo: bi_tcxo {

why is this a clock defined here? Isnt this gcc clock?

Quoted 2 lines

This is a RPMH-controlled clock and not from GCC. It is the parent clock for GCC RCGs/PLLs.

Quoted 9 lines

Yes right!

Quoted 1 line

Once the RPMH clock support is added these would be removed.

Wont it make sense to keep this bit not upstream and then remove that part when you have rpmh support available. Reduces the churn upstream!

The parent can be xo_board till then!

The xo_board is 38.4MHz and bi_tcxo (xo/2), which needs to be updated anyways :).

Signature · 4 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.

--
author
#6 lore raw

Re: [PATCH 2/2] arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc

In reply to Vinod Koul
Quoted 13 lines · Vinod Koul

arch/arm64/boot/dts/qcom/sc7180.dtsi line 142

Quoted 9 lines · Rajendra Nayak
arch/arm64/boot/dts/qcom/sc7180.dtsi new file +9 -0
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	clocks {

Can we have these sorted alphabetically please

will do, thanks.

Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
Reviewed-by on v1 1/2
#7 lore raw
In reply to Rajendra Nayak
Quoted 2 lines · Rajendra Nayak

Add a SoC string 'sc7180' for the qualcomm SC7180 SoC. Also add a new board type 'idp'

Reviewed-by Vinod Koul <[email protected]>
Quoted 29 lines
Signed-off-by Rajendra Nayak <[email protected]>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/arm/qcom.yaml +2 -0
index e39d8f02e33c..0a60ea051541 100644
@@ -36,6 +36,7 @@ description: |
   	mdm9615
   	ipq8074
   	sdm845
+  	sc7180
 
   The 'board' element must be one of the following strings:
 

@@ -46,6 +47,7 @@ description: |
   	sbc
   	hk01
   	qrd
+  	idp
 
   The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
   where the minor number may be omitted when it's zero, i.e.  v1.0 is the same
Signature · 2 lines
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
Signature · 1 line
~Vinod