MIPS: jz4780 HDMI

From: Paul Boddie <[email protected]>

The platform-specific configuration structure is augmented with mode_fixup and timings members so that specialisations of the Synopsys driver can introduce mode flags and bus flags.

Signed-off-by Paul Boddie <[email protected]>

Signed-off-by Ezequiel Garcia <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 ++++++++++++++++
 include/drm/bridge/dw_hdmi.h              |  5 +++++
 2 files changed, 21 insertions(+)

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +13 -0

index e7c7c9b9c646f..e8499eb11328c 100644
@@ -2810,6 +2810,19 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
        return mode_status;
 }
 
+static bool
+dw_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
+                         const struct drm_display_mode *mode,
+                         struct drm_display_mode *adjusted_mode)
+{
+       struct dw_hdmi *hdmi = bridge->driver_private;
+
+       if (hdmi->plat_data->mode_fixup)
+               return hdmi->plat_data->mode_fixup(bridge, mode, adjusted_mode);
+
+       return true;
+}
+
 static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
                                    const struct drm_display_mode *orig_mode,
                                    const struct drm_display_mode *mode)

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +2 -0

        .detect = dw_hdmi_bridge_detect,
        .get_edid = dw_hdmi_bridge_get_edid,
 };

@@ -3364,6 +3378,8 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
 #ifdef CONFIG_OF
        hdmi->bridge.of_node = pdev->dev.of_node;
 #endif
+       if (plat_data->timings)
+               hdmi->bridge.timings = plat_data->timings;
 
        memset(&pdevinfo, 0, sizeof(pdevinfo));
        pdevinfo.parent = dev;

include/drm/bridge/dw_hdmi.h +5 -1

index 6a5716655619b..677137445d534 100644
@@ -8,6 +8,7 @@
 
 #include <sound/hdmi-codec.h>
 
+struct drm_bridge;
 struct drm_display_info;
 struct drm_display_mode;
 struct drm_encoder;

@@ -140,6 +141,10 @@ struct dw_hdmi_plat_data {
        enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data,
                                           const struct drm_display_info *info,
                                           const struct drm_display_mode *mode);
+       bool (*mode_fixup)(struct drm_bridge *bridge,
+                          const struct drm_display_mode *mode,
+                          struct drm_display_mode *adjusted_mode);
+       const struct drm_bridge_timings *timings;
 
        /* Vendor PHY support */
        const struct dw_hdmi_phy_ops *phy_ops;
--

2.31.1

Am 05.08.2021 um 16:32 schrieb Robert Foss <[email protected]>:

Hey Nikolaus,

Thanks for submitting this series.

Quoted 4 lines · H. Nikolaus Schaller

From: Paul Boddie <[email protected]>

+ .mode_fixup = dw_hdmi_bridge_mode_fixup,

mode_fixup() has been deprecated[1] in favor of atomic_check(), care has to be taken when switching to atomic_check() as it has access to the full atomic commit.

Looking at this driver, it's using mode_set as well, which should be fixed.

[1] https://lore.kernel.org/dri-devel/[email protected]/

Am 05.08.2021 um 16:32 schrieb Robert Foss <[email protected]>:

Hey Nikolaus,

Thanks for submitting this series.

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = { · line 2899

Quoted 11 lines · H. Nikolaus Schaller

From: Paul Boddie <[email protected]>

static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
const struct drm_display_mode *orig_mode, const struct drm_display_mode *mode)

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +1 -0

@@ -2883,6 +2896,7 @@ static const struct drm_bridge_funcs dw_hdmi_bridge_funcs = {
       .atomic_disable = dw_hdmi_bridge_atomic_disable,
       .mode_set = dw_hdmi_bridge_mode_set,
       .mode_valid = dw_hdmi_bridge_mode_valid,
+       .mode_fixup = dw_hdmi_bridge_mode_fixup,

mode_fixup() has been deprecated[1] in favor of atomic_check(), care has to be taken when switching to atomic_check() as it has access to the full atomic commit.

Looking at this driver, it's using mode_set as well, which should be fixed.

[1] https://lore.kernel.org/dri-devel/[email protected]/

From: Paul Boddie <[email protected]>

Add support for the LCD controller present on JZ4780 SoCs. This SoC uses 8-byte descriptors which extend the current 4-byte descriptors used for other Ingenic SoCs.

Also, add special handling for HDMI-A connectors.

For some reason, only the primary planes are working properly. As soon as the overlay plane is enabled things go south :P

Tested on MIPS Creator CI20 board.

Signed-off-by Paul Boddie <[email protected]>

Signed-off-by Ezequiel Garcia <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 163 
++++++++++++++++++++--
 drivers/gpu/drm/ingenic/ingenic-drm.h     |  52 +++++++
 2 files changed, 200 insertions(+), 15 deletions(-)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +15 -2

index 5244f47634777..a2d103ae46833 100644
@@ -56,13 +56,27 @@ struct ingenic_dma_hwdescs {
 	u16 palette[256] __aligned(16);
 };
 
+struct ingenic_dma_hwdesc_ext {
+	struct ingenic_dma_hwdesc base;
+	u32 offsize;
+	u32 pagewidth;
+	u32 cpos;
+	u32 dessize;
+} __packed;
+
 struct jz_soc_info {
 	bool needs_dev_clk;
 	bool has_osd;
 	bool map_noncoherent;
+	bool has_alpha;
+	bool has_pcfg;
+	bool has_recover;
+	bool has_rgbc;
+	unsigned int hwdesc_size;
 	unsigned int max_width, max_height;
 	const u32 *formats_f0, *formats_f1;
 	unsigned int num_formats_f0, num_formats_f1;
+	unsigned int max_reg;
 };
 
 struct ingenic_drm {

@@ -118,12 +132,11 @@ static bool ingenic_drm_writeable_reg(struct 
 device *dev, unsigned int reg)
 	}
 }
 
-static const struct regmap_config ingenic_drm_regmap_config = {
+static struct regmap_config ingenic_drm_regmap_config = {
 	.reg_bits = 32,
 	.val_bits = 32,
 	.reg_stride = 4,
 
-	.max_register = JZ_REG_LCD_SIZE1,
 	.writeable_reg = ingenic_drm_writeable_reg,
 };

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +11 -0

+			struct ingenic_dma_hwdesc_ext *hwdesc_ext;
+
+			/* Extended 8-byte descriptor */
+			hwdesc_ext = (struct ingenic_dma_hwdesc_ext *) hwdesc;
+			hwdesc_ext->cpos = 0;
+			hwdesc_ext->offsize = 0;
+			hwdesc_ext->pagewidth = 0;
+
+			switch (newstate->fb->format->format) {
+			case DRM_FORMAT_XRGB1555:
+				hwdesc_ext->cpos |= JZ_LCD_CPOS_RGB555;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +1 -0

+		}
 

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +0 -0

 		if (drm_atomic_crtc_needs_modeset(crtc_state)) {
 			fourcc = newstate->fb->format->format;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +3 -0

+	if (priv->soc_info->hwdesc_size == sizeof(struct 
 ingenic_dma_hwdesc_ext))
+		cfg |= JZ_LCD_CFG_DESCRIPTOR_8;
+

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +1 -1

 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 		cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
 	if (mode->flags & DRM_MODE_FLAG_NVSYNC)

@@ -639,7 +695,7 @@ static void 
 ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
 			else
 				cfg |= JZ_LCD_CFG_MODE_TV_OUT_P;
 		} else {
-			switch (*info->bus_formats) {
+			switch (bus_format) {
 			case MEDIA_BUS_FMT_RGB565_1X16:
 				cfg |= JZ_LCD_CFG_MODE_GENERIC_16BIT;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +4 -3

 				break;

@@ -665,19 +721,23 @@ static void 
 ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
 	regmap_write(priv->map, JZ_REG_LCD_RGBC, rgbcfg);
 }
 
-static int ingenic_drm_encoder_atomic_check(struct drm_encoder 
 *encoder,
-					    struct drm_crtc_state *crtc_state,
-					    struct drm_connector_state *conn_state)
+static int
+ingenic_drm_encoder_atomic_check(struct drm_encoder *encoder,
+				 struct drm_crtc_state *crtc_state,
+				 struct drm_connector_state *conn_state)

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +1 -3

+
 	if (info->num_bus_formats != 1)
 		return -EINVAL;
 
-	if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_TV)
-		return 0;
-

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +0 -0

 	switch (*info->bus_formats) {
 	case MEDIA_BUS_FMT_RGB888_3X8:
 	case MEDIA_BUS_FMT_RGB888_3X8_DELTA:

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +0 -0

 	mutex_init(&priv->clk_mutex);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +17 -0

 	priv->clock_nb.notifier_call = ingenic_drm_update_pixclk;

@@ -1296,41 +1375,75 @@ static const struct jz_soc_info 
 jz4740_soc_info = {
 	.needs_dev_clk = true,
 	.has_osd = false,
 	.map_noncoherent = false,
+	.has_pcfg = false,
+	.has_recover = false,
+	.has_rgbc = false,
+	.hwdesc_size = sizeof(struct ingenic_dma_hwdesc),
 	.max_width = 800,
 	.max_height = 600,
 	.formats_f1 = jz4740_formats,
 	.num_formats_f1 = ARRAY_SIZE(jz4740_formats),
 	/* JZ4740 has only one plane */
+	.max_reg = JZ_REG_LCD_SIZE1,
 };
 
 static const struct jz_soc_info jz4725b_soc_info = {
 	.needs_dev_clk = false,
 	.has_osd = true,
 	.map_noncoherent = false,
+	.has_pcfg = false,
+	.has_recover = false,
+	.has_rgbc = false,
+	.hwdesc_size = sizeof(struct ingenic_dma_hwdesc),
 	.max_width = 800,
 	.max_height = 600,
 	.formats_f1 = jz4725b_formats_f1,
 	.num_formats_f1 = ARRAY_SIZE(jz4725b_formats_f1),
 	.formats_f0 = jz4725b_formats_f0,
 	.num_formats_f0 = ARRAY_SIZE(jz4725b_formats_f0),
+	.max_reg = JZ_REG_LCD_SIZE1,
 };
 
 static const struct jz_soc_info jz4770_soc_info = {
 	.needs_dev_clk = false,
 	.has_osd = true,
 	.map_noncoherent = true,
+	.has_pcfg = false,
+	.has_recover = false,
+	.has_rgbc = false,
+	.hwdesc_size = sizeof(struct ingenic_dma_hwdesc),
 	.max_width = 1280,
 	.max_height = 720,
 	.formats_f1 = jz4770_formats_f1,
 	.num_formats_f1 = ARRAY_SIZE(jz4770_formats_f1),
 	.formats_f0 = jz4770_formats_f0,
 	.num_formats_f0 = ARRAY_SIZE(jz4770_formats_f0),
+	.max_reg = JZ_REG_LCD_SIZE1,
+};
+

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +7 -0

+	/* REVISIT: do we support formats different from jz4770? */
+	.formats_f1 = jz4770_formats_f1,
+	.num_formats_f1 = ARRAY_SIZE(jz4770_formats_f1),
+	.formats_f0 = jz4770_formats_f0,
+	.num_formats_f0 = ARRAY_SIZE(jz4770_formats_f0),
+	.max_reg = JZ_REG_LCD_PCFG,
 };
 
 static const struct of_device_id ingenic_drm_of_match[] = {
 	{ .compatible = "ingenic,jz4740-lcd", .data = &jz4740_soc_info },
 	{ .compatible = "ingenic,jz4725b-lcd", .data = &jz4725b_soc_info },
 	{ .compatible = "ingenic,jz4770-lcd", .data = &jz4770_soc_info },
+	{ .compatible = "ingenic,jz4780-lcd", .data = &jz4780_soc_info },
 	{ /* sentinel */ },
 };

MODULE_DEVICE_TABLE(of, ingenic_drm_of_match);

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +6 -0

@@ -1349,13 +1462,31 @@ static int ingenic_drm_init(void)
 {
 	int err;
 
+	if (IS_ENABLED(CONFIG_DRM_INGENIC_DW_HDMI)) {
+		err = platform_driver_register(ingenic_dw_hdmi_driver_ptr);
+		if (err)
+			return err;
+	}
+
 	if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU)) {

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +12 -0

+
+	return 0;
+
+err_ipu_unreg:
+	if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU))
+		platform_driver_unregister(ingenic_ipu_driver_ptr);
+err_hdmi_unreg:
+	if (IS_ENABLED(CONFIG_DRM_INGENIC_DW_HDMI))
+		platform_driver_unregister(ingenic_dw_hdmi_driver_ptr);
+	return err;
 }
 module_init(ingenic_drm_init);
 

@@ -1363,6 +1494,8 @@ static void ingenic_drm_exit(void)
 {
 	platform_driver_unregister(&ingenic_drm_driver);
 
+	if (IS_ENABLED(CONFIG_DRM_INGENIC_DW_HDMI))
+		platform_driver_unregister(ingenic_dw_hdmi_driver_ptr);
 	if (IS_ENABLED(CONFIG_DRM_INGENIC_IPU))
 		platform_driver_unregister(ingenic_ipu_driver_ptr);
 }

drivers/gpu/drm/ingenic/ingenic-drm.h +28 -0

index 22654ac1dde1c..7e55a88243e28 100644
@@ -44,8 +44,11 @@
 #define JZ_REG_LCD_XYP1				0x124
 #define JZ_REG_LCD_SIZE0			0x128
 #define JZ_REG_LCD_SIZE1			0x12c
+#define JZ_REG_LCD_PCFG				0x2c0
 
 #define JZ_LCD_CFG_SLCD				BIT(31)
+#define JZ_LCD_CFG_DESCRIPTOR_8			BIT(28)
+#define JZ_LCD_CFG_RECOVER_FIFO_UNDERRUN	BIT(25)
 #define JZ_LCD_CFG_PS_DISABLE			BIT(23)
 #define JZ_LCD_CFG_CLS_DISABLE			BIT(22)
 #define JZ_LCD_CFG_SPL_DISABLE			BIT(21)

@@ -63,6 +66,7 @@
 #define JZ_LCD_CFG_DE_ACTIVE_LOW		BIT(9)
 #define JZ_LCD_CFG_VSYNC_ACTIVE_LOW		BIT(8)
 #define JZ_LCD_CFG_18_BIT			BIT(7)
+#define JZ_LCD_CFG_24_BIT			BIT(6)
 #define JZ_LCD_CFG_PDW				(BIT(5) | BIT(4))
 
 #define JZ_LCD_CFG_MODE_GENERIC_16BIT		0

@@ -132,6 +136,7 @@
 #define JZ_LCD_CMD_SOF_IRQ			BIT(31)
 #define JZ_LCD_CMD_EOF_IRQ			BIT(30)
 #define JZ_LCD_CMD_ENABLE_PAL			BIT(28)
+#define JZ_LCD_CMD_FRM_ENABLE			BIT(26)
 
 #define JZ_LCD_SYNC_MASK			0x3ff
 

@@ -153,6 +158,7 @@
 #define JZ_LCD_RGBC_EVEN_BGR			(0x5 << 0)
 
 #define JZ_LCD_OSDC_OSDEN			BIT(0)
+#define JZ_LCD_OSDC_ALPHAEN			BIT(2)
 #define JZ_LCD_OSDC_F0EN			BIT(3)
 #define JZ_LCD_OSDC_F1EN			BIT(4)
 

@@ -176,6 +182,51 @@
 #define JZ_LCD_SIZE01_WIDTH_LSB			0
 #define JZ_LCD_SIZE01_HEIGHT_LSB		16
 
+#define JZ_LCD_DESSIZE_ALPHA_OFFSET		24
+#define JZ_LCD_DESSIZE_HEIGHT_OFFSET		12
+#define JZ_LCD_DESSIZE_WIDTH_OFFSET		0
+#define JZ_LCD_DESSIZE_HEIGHT_MASK		0xfff
+#define JZ_LCD_DESSIZE_WIDTH_MASK		0xfff
+
+/* TODO: 4,5 and 7 match the above BPP */
+#define JZ_LCD_CPOS_BPP_15_16			(4 << 27)
+#define JZ_LCD_CPOS_BPP_18_24			(5 << 27)
+#define JZ_LCD_CPOS_BPP_30			(7 << 27)
+#define JZ_LCD_CPOS_RGB555			BIT(30)
+#define JZ_LCD_CPOS_PREMULTIPLY_LCD		BIT(26)
+#define JZ_LCD_CPOS_COEFFICIENT_OFFSET		24
+
+#define JZ_LCD_RGBC_RGB_PADDING			BIT(15)
+#define JZ_LCD_RGBC_RGB_PADDING_FIRST		BIT(14)
+#define JZ_LCD_RGBC_422				BIT(8)
+#define JZ_LCD_RGBC_RGB_FORMAT_ENABLE		BIT(7)
+#define JZ_LCD_RGBC_ODD_LINE_MASK		(0x7 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_RGB		(0 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_RBG		(1 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_GRB		(2 << 4)

drivers/gpu/drm/ingenic/ingenic-drm.h +14 -0

+
+#define JZ_LCD_PCFG_PRI_MODE			BIT(31)
+#define JZ_LCD_PCFG_HP_BST_4			(0 << 28)
+#define JZ_LCD_PCFG_HP_BST_8			(1 << 28)
+#define JZ_LCD_PCFG_HP_BST_16			(2 << 28)
+#define JZ_LCD_PCFG_HP_BST_32			(3 << 28)
+#define JZ_LCD_PCFG_HP_BST_64			(4 << 28)
+#define JZ_LCD_PCFG_HP_BST_16_CONT		(5 << 28)
+#define JZ_LCD_PCFG_HP_BST_DISABLE		(7 << 28)
+#define JZ_LCD_PCFG_THRESHOLD2_OFFSET		18
+#define JZ_LCD_PCFG_THRESHOLD1_OFFSET		9
+#define JZ_LCD_PCFG_THRESHOLD0_OFFSET		0
+
 struct device;
 struct drm_plane;
 struct drm_plane_state;

@@ -187,5 +238,6 @@ void ingenic_drm_plane_disable(struct device 
 *dev, struct drm_plane *plane);
 bool ingenic_drm_map_noncoherent(const struct device *dev);
 
 extern struct platform_driver *ingenic_ipu_driver_ptr;
+extern struct platform_driver *ingenic_dw_hdmi_driver_ptr;
 

#endif /* DRIVERS_GPU_DRM_INGENIC_INGENIC_DRM_H */
--
2.31.1

Am 05.08.2021 um 17:22 schrieb Paul Cercueil <[email protected]>:

Hi Nikolaus & Paul,

Quoted 14 lines · H. Nikolaus Schaller

From: Paul Boddie <[email protected]>
Add support for the LCD controller present on JZ4780 SoCs. This SoC uses 8-byte descriptors which extend the current 4-byte descriptors used for other Ingenic SoCs. Also, add special handling for HDMI-A connectors. For some reason, only the primary planes are working properly. As soon as the overlay plane is enabled things go south :P
Tested on MIPS Creator CI20 board.

Signed-off-by Paul Boddie <[email protected]>

Signed-off-by Ezequiel Garcia <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 163 ++++++++++++++++++++--

We already have these in ingenic-drm.h...

Please only add the macros that you need and are missing.

Cheers,
-Paul

Am 05.08.2021 um 17:22 schrieb Paul Cercueil <[email protected]>:

Hi Nikolaus & Paul,

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, · line 601

Quoted 2 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +2 -0

+
+		if (priv->soc_info->hwdesc_size == sizeof(struct ingenic_dma_hwdesc_ext)) {

I'd prefer a boolean flag, e.g. "soc_info->use_extended_hwdesc"

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, · line 622

Quoted 2 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +2 -0

+			hwdesc_ext->cpos |= JZ_LCD_CPOS_PREMULTIPLY_LCD |
+					    (3 << JZ_LCD_CPOS_COEFFICIENT_OFFSET);

Where's that magic value '3' coming from?

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, · line 629

Quoted 8 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +7 -0

+
+			hwdesc_ext->dessize =
+				(0xff << JZ_LCD_DESSIZE_ALPHA_OFFSET) |
+				(((height - 1) & JZ_LCD_DESSIZE_HEIGHT_MASK) <<
+						 JZ_LCD_DESSIZE_HEIGHT_OFFSET) |
+				(((width - 1) & JZ_LCD_DESSIZE_WIDTH_MASK) <<
+						JZ_LCD_DESSIZE_WIDTH_OFFSET);

Use FIELD_PREP() from <linux/bitfield.h>.

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, · line 664

Quoted 13 lines

(quoted diff) +1 -0

+		}

		if (drm_atomic_crtc_needs_modeset(crtc_state)) {
			fourcc = newstate->fb->format->format;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +4 -0

@@ -612,8 +657,12 @@ static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
 	struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 	struct drm_connector *conn = conn_state->connector;
 	struct drm_display_info *info = &conn->display_info;
+	u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 	unsigned int cfg, rgbcfg = 0;
+	if (info->num_bus_formats)
+		bus_format = info->bus_formats[0];
+

That code is going to change really soon, as I have my own PR ready to convert the ingenic-drm driver to use a top-level bridge for bus format / flags negociation.

The HDMI driver should therefore implement it as well; see for instance drivers/gpu/drm/bridge/ite-it66121.c for an example of how the bus format is negociated.

I'll be sure to Cc you as soon as I send it upstream - should be just in a couple of days.

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, · line 675

Quoted 8 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +2 -0

 	priv->panel_is_sharp = info->bus_flags & DRM_BUS_FLAG_SHARP_SIGNALS;
 	if (priv->panel_is_sharp) {

@@ -623,6 +672,13 @@ static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
 		    | JZ_LCD_CFG_SPL_DISABLE | JZ_LCD_CFG_REV_DISABLE;
 	}
+	if (priv->soc_info->has_recover)
+		cfg |= JZ_LCD_CFG_RECOVER_FIFO_UNDERRUN;

Seems out of place. Does it not work without?

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, · line 678

Quoted 3 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +2 -0

+
+	/* CI20: set use of the 8-word descriptor and OSD foreground usage. */

Not really CI20-specific though.

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, · line 736

Quoted 6 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +5 -0

+	switch (conn_state->connector->connector_type) {
+	case DRM_MODE_CONNECTOR_TV:
+	case DRM_MODE_CONNECTOR_HDMIA:
+		return 0;
+	}

This switch should move after the check on "num_bus_formats".
(I understand why you did it, but with proper bus format negociation this won't be needed).

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static int ingenic_drm_bind(struct device *dev, bool has_components) · line 987

Quoted 6 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +1 -0

+
 	if (info->num_bus_formats != 1)

		return -EINVAL;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +1 -1

-	drm->mode_config.max_height = 4095;
+	drm->mode_config.max_height = soc_info->max_height;

The drm->mode_config.max_height is different from soc_info->max_height; the former is the maximum framebuffer size, the latter is the maximum size that the SoC can display. The framebuffer can be bigger than what the SoC can display.

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static int ingenic_drm_bind(struct device *dev, bool has_components) · line 996

Quoted 7 lines

	drm->mode_config.funcs = &ingenic_drm_mode_config_funcs;
	drm->mode_config.helper_private = &ingenic_drm_mode_config_helpers;

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +1 -0

@@ -934,6 +994,7 @@ static int ingenic_drm_bind(struct device *dev, bool has_components)
 		return PTR_ERR(base);
 	}
+	ingenic_drm_regmap_config.max_register = soc_info->max_reg;

Avoid modifying a global variable; instead copy it to a local copy of ingenic_drm_regmap_config, and use this one in the regmap_init_mmio below.

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static int ingenic_drm_bind(struct device *dev, bool has_components) · line 968

Quoted 8 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +0 -1

 	priv->map = devm_regmap_init_mmio(dev, base,
 					  &ingenic_drm_regmap_config);
 	if (IS_ERR(priv->map)) {

@@ -966,7 +1027,6 @@ static int ingenic_drm_bind(struct device *dev, bool has_components)
 	if (!priv->dma_hwdescs)
 		return -ENOMEM;
-

Cosmetic change - not needed.

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static int ingenic_drm_bind(struct device *dev, bool has_components) · line 1212

Quoted 12 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +4 -1

 	/* Configure DMA hwdesc for foreground0 plane */
 	dma_hwdesc_phys_f0 = priv->dma_hwdescs_phys
 		+ offsetof(struct ingenic_dma_hwdescs, hwdesc_f0);

@@ -1147,7 +1207,26 @@ static int ingenic_drm_bind(struct device *dev, bool has_components)
 	/* Enable OSD if available */
 	if (soc_info->has_osd)
-		regmap_write(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_OSDEN);
+		regmap_set_bits(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_OSDEN);
+
+	if (soc_info->has_alpha)
+		regmap_set_bits(priv->map, JZ_REG_LCD_OSDC, JZ_LCD_OSDC_ALPHAEN);

Do you need alpha blending support between planes, in this patch related to HDMI?

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static int ingenic_drm_bind(struct device *dev, bool has_components) · line 1222

Quoted 10 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +9 -0

+
+	/* Magic values from the vendor kernel for the priority thresholds. */
+	if (soc_info->has_pcfg)
+		regmap_write(priv->map, JZ_REG_LCD_PCFG,
+			     JZ_LCD_PCFG_PRI_MODE |
+			     JZ_LCD_PCFG_HP_BST_16 |
+			     (511 << JZ_LCD_PCFG_THRESHOLD2_OFFSET) |
+			     (400 << JZ_LCD_PCFG_THRESHOLD1_OFFSET) |
+			     (256 << JZ_LCD_PCFG_THRESHOLD0_OFFSET));

And why is that needed in this patch? Doesn't HDMI work without it?

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static int ingenic_drm_bind(struct device *dev, bool has_components) · line 1229

Quoted 8 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +7 -0

+
+	/* RGB output control may be superfluous. */
+	if (soc_info->has_rgbc)
+		regmap_write(priv->map, JZ_REG_LCD_RGBC,
+			     JZ_LCD_RGBC_RGB_FORMAT_ENABLE |
+			     JZ_LCD_RGBC_ODD_LINE_RGB |
+			     JZ_LCD_RGBC_EVEN_LINE_RGB);

The last two macros set the subpixel ordering on the bus for serial (3x8) 24-bit panels - completely unrelated to HDMI.

Quoted 11 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +4 -0

 	mutex_init(&priv->clk_mutex);
 	priv->clock_nb.notifier_call = ingenic_drm_update_pixclk;

@@ -1296,41 +1375,75 @@ static const struct jz_soc_info jz4740_soc_info = {
 	.needs_dev_clk = true,
 	.has_osd = false,
 	.map_noncoherent = false,
+	.has_pcfg = false,
+	.has_recover = false,
+	.has_rgbc = false,
+	.hwdesc_size = sizeof(struct ingenic_dma_hwdesc),

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static const struct jz_soc_info jz4740_soc_info = { · line 1431

Quoted 5 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +5 -0

+	.has_alpha = true,
+	.has_pcfg = true,
+	.has_recover = true,
+	.has_rgbc = true,
+	.hwdesc_size = sizeof(struct ingenic_dma_hwdesc_ext),

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static const struct jz_soc_info jz4740_soc_info = { · line 1433

Quoted 2 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +2 -0

+	.max_width = 4096,
+	.max_height = 4096,

The PM says that the display is up to 4096x2048-30Hz; so this is wrong.

drivers/gpu/drm/ingenic/ingenic-drm-drv.c static int ingenic_drm_init(void) · line 1479

Quoted 4 lines

drivers/gpu/drm/ingenic/ingenic-drm-drv.c +3 -1

-	return platform_driver_register(&ingenic_drm_driver);
+	err = platform_driver_register(&ingenic_drm_driver);
+	if (err)
+		goto err_ipu_unreg;

That's actually a change of behaviour - before it would return on error without calling platform_driver_unregister on the IPU.

It is not necesarily bad, but it belongs in a separate commit.

Quoted 4 lines

drivers/gpu/drm/ingenic/ingenic-drm.h +4 -0

+#define JZ_LCD_RGBC_ODD_LINE_MASK		(0x7 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_RGB		(0 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_RBG		(1 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_GRB		(2 << 4)

drivers/gpu/drm/ingenic/ingenic-drm.h line 216

Quoted 10 lines

drivers/gpu/drm/ingenic/ingenic-drm.h +10 -0

+#define JZ_LCD_RGBC_ODD_LINE_GBR		(3 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_BRG		(4 << 4)
+#define JZ_LCD_RGBC_ODD_LINE_BGR		(5 << 4)
+#define JZ_LCD_RGBC_EVEN_LINE_MASK		(0x7 << 0)
+#define JZ_LCD_RGBC_EVEN_LINE_RGB		0
+#define JZ_LCD_RGBC_EVEN_LINE_RBG		1
+#define JZ_LCD_RGBC_EVEN_LINE_GRB		2
+#define JZ_LCD_RGBC_EVEN_LINE_GBR		3
+#define JZ_LCD_RGBC_EVEN_LINE_BRG		4
+#define JZ_LCD_RGBC_EVEN_LINE_BGR		5

We already have these in ingenic-drm.h...

Please only add the macros that you need and are missing.

Cheers,
-Paul

This patch attempts to convert the ingenic-dw-hdmi driver into a version that uses the component framework.

Unfortunately the new version does not work.

Debugging shows that ingenic_dw_hdmi_bind() is never called.

Suggestions for reasons and fixes are welcome.

Signed-off-by Paul Boddie <[email protected]>

Co-authored-by Paul Boddie <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 57 ++++++++++++++++++-----
 1 file changed, 46 insertions(+), 11 deletions(-)

drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c +46 -11

index 61e7a57d7cec1..a5ba0b69baa8c 100644
@@ -1,17 +1,24 @@
 // SPDX-License-Identifier: GPL-2.0
 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
- * Copyright (C) 2019, 2020 Paul Boddie <[email protected]>
+ * Copyright (C) 2019, 2020, 2021 Paul Boddie <[email protected]>
  *
  * Derived from dw_hdmi-imx.c with i.MX portions removed.
- * Probe and remove operations derived from rcar_dw_hdmi.c.
  */
 
+#include <linux/component.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
 
 #include <drm/bridge/dw_hdmi.h>
 #include <drm/drm_of.h>
+#include <drm/drm_modeset_helper_vtables.h>
+#include <drm/drm_simple_kms_helper.h>
+
+struct ingenic_dw_hdmi_encoder {
+	struct drm_encoder encoder;
+	struct dw_hdmi *hdmi;
+};
 
 static const struct dw_hdmi_mpll_config ingenic_mpll_cfg[] = {
 	{ 45250000,  { { 0x01e0, 0x0000 }, { 0x21e1, 0x0000 }, { 0x41e2, 0x0000 } } },

@@ -87,24 +94,52 @@ static const struct of_device_id ingenic_dw_hdmi_dt_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, ingenic_dw_hdmi_dt_ids);
 
-static int ingenic_dw_hdmi_probe(struct platform_device *pdev)
+static int ingenic_dw_hdmi_bind(struct device *dev, struct device *master,
+				void *data)
 {
-	struct dw_hdmi *hdmi;
+	struct platform_device *pdev = to_platform_device(dev);
+	struct drm_device *drm = data;
+	struct drm_encoder *enc;
+	struct ingenic_dw_hdmi_encoder *hdmi_encoder;
 
-	hdmi = dw_hdmi_probe(pdev, &ingenic_dw_hdmi_plat_data);
-	if (IS_ERR(hdmi))
-		return PTR_ERR(hdmi);
+	hdmi_encoder = drmm_simple_encoder_alloc(drm, struct ingenic_dw_hdmi_encoder,
+						 encoder, DRM_MODE_ENCODER_TMDS);
+	if (IS_ERR(hdmi_encoder))
+		return PTR_ERR(hdmi_encoder);
 
-	platform_set_drvdata(pdev, hdmi);
+	enc = &hdmi_encoder->encoder;
+	drm_encoder_helper_add(enc, NULL);
+	hdmi_encoder->hdmi = dw_hdmi_bind(pdev, enc, &ingenic_dw_hdmi_plat_data);
+
+	if (IS_ERR(hdmi_encoder->hdmi))
+		return PTR_ERR(hdmi_encoder->hdmi);
+
+	dev_set_drvdata(dev, hdmi_encoder->hdmi);
 
 	return 0;
 }
 
-static int ingenic_dw_hdmi_remove(struct platform_device *pdev)
+static void ingenic_dw_hdmi_unbind(struct device *dev, struct device *master,
+				   void *data)
+{
+	struct dw_hdmi *hdmi = dev_get_drvdata(dev);
+
+	dw_hdmi_unbind(hdmi);
+}
+
+static const struct component_ops ingenic_dw_hdmi_ops = {
+	.bind	= ingenic_dw_hdmi_bind,
+	.unbind	= ingenic_dw_hdmi_unbind,
+};
+
+static int ingenic_dw_hdmi_probe(struct platform_device *pdev)
 {
-	struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
+	return component_add(&pdev->dev, &ingenic_dw_hdmi_ops);
+}
 
-	dw_hdmi_remove(hdmi);
+static int ingenic_dw_hdmi_remove(struct platform_device *pdev)
+{
+	component_del(&pdev->dev, &ingenic_dw_hdmi_ops);
 
 	return 0;
 }

Am 05.08.2021 um 17:04 schrieb Laurent Pinchart <[email protected]>:

Hi Nikolaus,

Thank you for the patch.

Quoted 2 lines · H. Nikolaus Schaller

This patch attempts to convert the ingenic-dw-hdmi driver into a version that uses the component framework.

Why ? What problem would this solve ?

Hi Laurent,

Quoted 5 lines

Am 05.08.2021 um 17:04 schrieb Laurent Pinchart
<[email protected]>:

Hi Nikolaus,

Quoted 8 lines

Thank you for the patch.

Quoted 2 lines · H. Nikolaus Schaller

This patch attempts to convert the ingenic-dw-hdmi driver into a version that uses the component framework.

Why ? What problem would this solve ?

Well, it was suggested in a v1 we did post several months ago. I have not looked up by whom and do not exactly remember the reasons.

We now simply thought that it is common style since dome dw-hdmi drivers make use of it but some others don't. And we got it working without.

If it is not needed/requested by anyone, we can drop it from v3 (or add later).

Am 05.08.2021 um 18:17 schrieb Paul Cercueil <[email protected]>:

Hi Nikolaus and Laurent,

Quoted 5 lines · H. Nikolaus Schaller

Hi Laurent,

Quoted 4 lines

Am 05.08.2021 um 17:04 schrieb Laurent Pinchart <[email protected]>:
Hi Nikolaus,
Thank you for the patch.
On Thu, Aug 05, 2021 at 04:07:57PM +0200, H. Nikolaus Schaller wrote:

Quoted 8 lines

Quoted 3 lines

Quoted 2 lines

This patch attempts to convert the ingenic-dw-hdmi driver into a version that uses the component framework.

Why ? What problem would this solve ?

Well, it was suggested in a v1 we did post several months ago. I have not looked up by whom and do not exactly remember the reasons.
We now simply thought that it is common style since dome dw-hdmi drivers make use of it but some others don't. And we got it working without. If it is not needed/requested by anyone, we can drop it from v3 (or add later).

I don't remember exactly TBH - the only reason to use a component is to have access to the main driver's "drm_device" structure. The IPU needs it for instance, to register planes; but I don't think this HDMI driver needs it as it registers a bridge.

Cheers,
-Paul

Hi Nikolaus and Laurent,

Quoted 23 lines · H. Nikolaus Schaller

Hi Laurent,

Quoted 5 lines

Am 05.08.2021 um 17:04 schrieb Laurent Pinchart
<[email protected]>:

Hi Nikolaus,

Quoted 8 lines

Thank you for the patch.

Quoted 2 lines · H. Nikolaus Schaller

This patch attempts to convert the ingenic-dw-hdmi driver into a version that uses the component framework.

Why ? What problem would this solve ?

Well, it was suggested in a v1 we did post several months ago. I have not
looked up by whom and do not exactly remember the reasons.

We now simply thought that it is common style since dome dw-hdmi drivers make use of it but some others don't. And we got it working without.

Quoted 2 lines

If it is not needed/requested by anyone, we can drop it from v3 (or add later).

I don't remember exactly TBH - the only reason to use a component is to have access to the main driver's "drm_device" structure. The IPU needs it for instance, to register planes; but I don't think this HDMI driver needs it as it registers a bridge.