Enable IPQ9574 TSENS support
Subsystems (5)
cover Enable IPQ9574 TSENS support
This patch set enables tsens in IPQ9574
Depends on
https://lore.kernel.org/linux-arm-msm/[email protected]/
[v1]:
Fix DT node names
[v0]:
Initial patch introducing TSENS support
Praveenkumar I (2):
dt-bindings: thermal: tsens: Add ipq9574 compatible thermal/drivers/tsens: Add IPQ9574 support
Varadarajan Narayanan (2):
arm64: dts: qcom: ipq9574: add tsens node
arm64: dts: qcom: ipq9574: add thermal zone nodes
.../devicetree/bindings/thermal/qcom-tsens.yaml | 3 + arch/arm64/boot/dts/qcom/ipq9574.dtsi | 217 +++++++++++++++++++++ drivers/thermal/qcom/tsens.c | 3 + 3 files changed, 223 insertions(+)
Signature · 1 line
2.7.4
PATCH 1/4 dt-bindings: thermal: tsens: Add ipq9574 compatible
From: Praveenkumar I <[email protected]>
Qualcomm IPQ9574 has tsens v2.3.1 block, which is similar to IPQ8074 tsens.
--- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 3 +++ 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +3 -0
@@ -66,6 +66,7 @@ properties: - description: v2 of TSENS with combined interrupt enum: - qcom,ipq8074-tsens + - qcom,ipq9574-tsens reg: items:
@@ -277,6 +278,7 @@ allOf: contains: enum: - qcom,ipq8074-tsens + - qcom,ipq9574-tsens then: properties: interrupts:
@@ -292,6 +294,7 @@ allOf: contains: enum: - qcom,ipq8074-tsens + - qcom,ipq9574-tsens - qcom,tsens-v0_1 - qcom,tsens-v1 - qcom,tsens-v2
Signature · 1 line
2.7.4
Re: [PATCH v1 1/4] dt-bindings: thermal: tsens: Add ipq9574 compatible
Quoted 10 lines · Varadarajan Narayanan
From: Praveenkumar I <[email protected]>
Qualcomm IPQ9574 has tsens v2.3.1 block, which is similar to IPQ8074 tsens.
Signed-off-by Praveenkumar I <[email protected]>Signed-off-by Varadarajan Narayanan <[email protected]>--- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 3 +++ 1 file changed, 3 insertions(+)
I saw already v1, so this looks like v2, not v1. Please add changelog describing what you changed here.
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml properties: · line 69
Quoted 9 lines
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +1
-0@@ -66,6 +66,7 @@ properties: - description: v2 of TSENS with combined interrupt enum: - qcom,ipq8074-tsens + - qcom,ipq9574-tsens
This is a friendly reminder during the review process.
It seems my previous comments were not fully addressed. Maybe my feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them.
Thank you.
Best regards,
Krzysztof
Re: [PATCH v1 1/4] dt-bindings: thermal: tsens: Add ipq9574 compatible
Quoted 12 lines · Krzysztof Kozlowski
Quoted 10 lines · Varadarajan Narayanan
From: Praveenkumar I <[email protected]>
Qualcomm IPQ9574 has tsens v2.3.1 block, which is similar to IPQ8074 tsens.
Signed-off-by Praveenkumar I <[email protected]>Signed-off-by Varadarajan Narayanan <[email protected]>--- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 3 +++ 1 file changed, 3 insertions(+)
Quoted 2 lines
I saw already v1, so this looks like v2, not v1. Please add changelog describing what you changed here.
No code change between v1 and v2 w.r.t this patch. The 4th patch alone in this series has code changes between v1 and v2.
Quoted 12 lines
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml properties: · line 69
Quoted 9 lines
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +1
-0@@ -66,6 +66,7 @@ properties: - description: v2 of TSENS with combined interrupt enum: - qcom,ipq8074-tsens + - qcom,ipq9574-tsensThis is a friendly reminder during the review process.
Quoted 6 lines
It seems my previous comments were not fully addressed. Maybe my feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them.
Thank you.
Sorry. Looks like I missed https://lore.kernel.org/lkml/[email protected]/T/#m42a9b77be2ceddf1adc90c07f487929fcf2dbc0f
Will take that input and post a new version.
Thanks
Varada
Quoted 3 lines
Best regards,
Krzysztof
Re: [PATCH v1 1/4] dt-bindings: thermal: tsens: Add ipq9574 compatible
In reply to Varadarajan NarayananQuoted 10 lines · Varadarajan Narayanan
From: Praveenkumar I <[email protected]>
Qualcomm IPQ9574 has tsens v2.3.1 block, which is similar to IPQ8074 tsens.
Signed-off-by Praveenkumar I <[email protected]>Signed-off-by Varadarajan Narayanan <[email protected]>--- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 3 +++ 1 file changed, 3 insertions(+)
PATCH 2/4 thermal/drivers/tsens: Add IPQ9574 support
In reply to Varadarajan NarayananFrom: Praveenkumar I <[email protected]>
Qualcomm IPQ9574 uses tsens v2.3.1 IP, which is similar to IPQ8074 tsens. Hence reusing the data_ipq8074 for IPQ9574.
--- drivers/thermal/qcom/tsens.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/thermal/qcom/tsens.c +3 -0
@@ -1093,6 +1093,9 @@ static const struct of_device_id tsens_table[] = { .compatible = "qcom,ipq8074-tsens", .data = &data_ipq8074, }, { + .compatible = "qcom,ipq9574-tsens", + .data = &data_ipq8074, + }, { .compatible = "qcom,mdm9607-tsens", .data = &data_9607, }, {
Signature · 1 line
2.7.4
Re: [PATCH v1 2/4] thermal/drivers/tsens: Add IPQ9574 support
Quoted 16 lines · Varadarajan Narayanan
From: Praveenkumar I <[email protected]>
Qualcomm IPQ9574 uses tsens v2.3.1 IP, which is similar to IPQ8074 tsens. Hence reusing the
data_ipq8074for IPQ9574.Signed-off-by Praveenkumar I <[email protected]>Signed-off-by Varadarajan Narayanan <[email protected]>--- drivers/thermal/qcom/tsens.c | 3 +++ 1 file changed, 3 insertions(+)drivers/thermal/qcom/tsens.c +0
-0
drivers/thermal/qcom/tsens.c static const struct of_device_id tsens_table[] = { · line 1097
Quoted 5 lines
drivers/thermal/qcom/tsens.c +2
-0@@ -1093,6 +1093,9 @@ static const struct of_device_id tsens_table[] = { .compatible = "qcom,ipq8074-tsens", .data = &data_ipq8074, }, { + .compatible = "qcom,ipq9574-tsens", + .data = &data_ipq8074,
This is a friendly reminder during the review process.
It seems my previous comments were not fully addressed. Maybe my feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them.
Thank you.
Best regards,
Krzysztof
PATCH 3/4 arm64: dts: qcom: ipq9574: add tsens node
In reply to Varadarajan NarayananIPQ9574 has a tsens v2.3.1 peripheral which monitors temperatures around the various subsystems on the die.
--- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
arch/arm64/boot/dts/qcom/ipq9574.dtsi +9 -0
@@ -1056,6 +1056,15 @@ status = "disabled"; }; + tsens: thermal-sensor@4a9000 { + compatible = "qcom,ipq9574-tsens"; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "combined"; + #qcom,sensors = <16>; + #thermal-sensor-cells = <1>; + }; }; timer {
Signature · 1 line
2.7.4
PATCH 4/4 arm64: dts: qcom: ipq9574: add thermal zone nodes
In reply to Varadarajan NarayananThis patch adds thermal zone nodes for the various sensors present in IPQ9574
---
[v1]:
Fix node names
--- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 208 ++++++++++++++++++++++++++++++++++ 1 file changed, 208 insertions(+)
arch/arm64/boot/dts/qcom/ipq9574.dtsi +208 -0
@@ -1067,6 +1067,214 @@ }; }; + thermal-zones { + nss-top-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 3>; + + trips { + nss-top-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 4>; + + trips { + ubi_0-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 5>; + + trips { + ubi_1-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-2-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 6>; + + trips { + ubi_2-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-3-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 7>; + + trips { + ubi_3-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cluster0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 8>; + + trips { + cpu-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cluster1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 9>; + + trips { + cpu-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 10>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cpu1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 11>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cpu2-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 12>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cpu3-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 13>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + wcss-phyb-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 14>; + + trips { + wcss_phyb-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + top-glue-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 15>; + + trips { + top_glue-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
Signature · 1 line
2.7.4
Re: [PATCH v1 4/4] arm64: dts: qcom: ipq9574: add thermal zone nodes
Quoted 6 lines · Varadarajan Narayanan
This patch adds thermal zone nodes for the various sensors present in IPQ9574
Co-developed-by Praveenkumar I <[email protected]>Signed-off-by Praveenkumar I <[email protected]>Signed-off-by Varadarajan Narayanan <[email protected]>
one nit below.
Quoted 77 lines
---
[v1]:
Fix node names--- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 208 ++++++++++++++++++++++++++++++++++ 1 file changed, 208 insertions(+)arch/arm64/boot/dts/qcom/ipq9574.dtsi +62
-0@@ -1067,6 +1067,214 @@ }; }; + thermal-zones { + nss-top-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 3>; + + trips { + nss-top-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 4>; + + trips { + ubi_0-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 5>; + + trips { + ubi_1-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-2-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 6>; + + trips { + ubi_2-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + ubi-3-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 7>; +
arch/arm64/boot/dts/qcom/ipq9574.dtsi line 1141
Quoted 10 lines
arch/arm64/boot/dts/qcom/ipq9574.dtsi +10
-0+ trips { + ubi_3-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cluster0-thermal {
I think we were usually using cpussN instead of clusterN, but this is really a minor issue, we don't have that standardized.
Quoted 139 lines
arch/arm64/boot/dts/qcom/ipq9574.dtsi +136
-0+ polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 8>; + + trips { + cpu-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cluster1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 9>; + + trips { + cpu-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cpu0-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 10>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cpu1-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 11>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cpu2-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 12>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cpu3-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 13>; + + trips { + cpu-critical { + temperature = <120000>; + hysteresis = <10000>; + type = "critical"; + }; + + cpu-passive { + temperature = <110000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + wcss-phyb-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 14>; + + trips { + wcss_phyb-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + top-glue-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tsens 15>; + + trips { + top_glue-critical { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
Signature · 2 lines
With best wishes Dmitry