Add support for mt8167 display blocks
Subsystems (7)
v2 cover Add support for mt8167 display blocks
This series adds support for the display blocks on MediaTek mt8167. Tested on Xiaomi Mi Smart Clock x04g.
The first patch just does some reordering of dts nodes with no other changes as this makes later patches cleaner and easier to follow.
v2:
- Separate patch for mediatek,dsi-phy binding;
- Separate patch for mt8167-dsi binding;
- Simplified OF graph endpoints in mt8167.dtsi.
Luca Leonardo Scorcia (5):
arm64: dts: mt8167: Reorder nodes according to mmio address
dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
arm64: dts: mediatek: mt8167: Add DRM nodes
Val Packett (1):
gpu: drm: mediatek: ovl: add specific entry for mt8167
.../display/mediatek/mediatek,aal.yaml | 1 + .../display/mediatek/mediatek,ccorr.yaml | 4 +- .../display/mediatek/mediatek,dither.yaml | 1 + .../display/mediatek/mediatek,dsi.yaml | 5 +- .../display/mediatek/mediatek,gamma.yaml | 1 + .../display/mediatek/mediatek,ovl.yaml | 1 + .../display/mediatek/mediatek,rdma.yaml | 1 + .../display/mediatek/mediatek,wdma.yaml | 4 +- .../bindings/phy/mediatek,dsi-phy.yaml | 1 + arch/arm64/boot/dts/mediatek/mt8167.dtsi | 381 ++++++++++++++++-- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 + 11 files changed, 377 insertions(+), 35 deletions(-)
Signature · 1 line
2.43.0
PATCH v2 1/6 arm64: dts: mt8167: Reorder nodes according to mmio address
In preparation for adding display nodes. No other changes.
--- arch/arm64/boot/dts/mediatek/mt8167.dtsi | 68 ++++++++++++------------ 1 file changed, 34 insertions(+), 34 deletions(-)
arch/arm64/boot/dts/mediatek/mt8167.dtsi +34 -34
@@ -29,12 +29,6 @@ infracfg: infracfg@10001000 { #clock-cells = <1>; }; - apmixedsys: apmixedsys@10018000 { - compatible = "mediatek,mt8167-apmixedsys", "syscon"; - reg = <0 0x10018000 0 0x710>; - #clock-cells = <1>; - }; - scpsys: syscon@10006000 { compatible = "mediatek,mt8167-scpsys", "syscon", "simple-mfd"; reg = <0 0x10006000 0 0x1000>;
@@ -101,18 +95,6 @@ power-domain@MT8167_POWER_DOMAIN_CONN { }; }; - imgsys: syscon@15000000 { - compatible = "mediatek,mt8167-imgsys", "syscon"; - reg = <0 0x15000000 0 0x1000>; - #clock-cells = <1>; - }; - - vdecsys: syscon@16000000 { - compatible = "mediatek,mt8167-vdecsys", "syscon"; - reg = <0 0x16000000 0 0x1000>; - #clock-cells = <1>; - }; - pio: pinctrl@1000b000 { compatible = "mediatek,mt8167-pinctrl"; reg = <0 0x1000b000 0 0x1000>;
@@ -124,12 +106,36 @@ pio: pinctrl@1000b000 { interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; }; + apmixedsys: apmixedsys@10018000 { + compatible = "mediatek,mt8167-apmixedsys", "syscon"; + reg = <0 0x10018000 0 0x710>; + #clock-cells = <1>; + }; + + iommu: m4u@10203000 { + compatible = "mediatek,mt8167-m4u"; + reg = <0 0x10203000 0 0x1000>; + mediatek,larbs = <&larb0>, <&larb1>, <&larb2>; + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_LOW>; + #iommu-cells = <1>; + }; + mmsys: syscon@14000000 { compatible = "mediatek,mt8167-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; }; + larb0: larb@14016000 { + compatible = "mediatek,mt8167-smi-larb"; + reg = <0 0x14016000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_SMI_LARB0>, + <&mmsys CLK_MM_SMI_LARB0>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + }; + smi_common: smi@14017000 { compatible = "mediatek,mt8167-smi-common"; reg = <0 0x14017000 0 0x1000>;
@@ -139,14 +145,10 @@ smi_common: smi@14017000 { power-domains = <&spm MT8167_POWER_DOMAIN_MM>; }; - larb0: larb@14016000 { - compatible = "mediatek,mt8167-smi-larb"; - reg = <0 0x14016000 0 0x1000>; - mediatek,smi = <&smi_common>; - clocks = <&mmsys CLK_MM_SMI_LARB0>, - <&mmsys CLK_MM_SMI_LARB0>; - clock-names = "apb", "smi"; - power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + imgsys: syscon@15000000 { + compatible = "mediatek,mt8167-imgsys", "syscon"; + reg = <0 0x15000000 0 0x1000>; + #clock-cells = <1>; }; larb1: larb@15001000 {
@@ -159,6 +161,12 @@ larb1: larb@15001000 { power-domains = <&spm MT8167_POWER_DOMAIN_ISP>; }; + vdecsys: syscon@16000000 { + compatible = "mediatek,mt8167-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; + }; + larb2: larb@16010000 { compatible = "mediatek,mt8167-smi-larb"; reg = <0 0x16010000 0 0x1000>;
@@ -168,13 +176,5 @@ larb2: larb@16010000 { clock-names = "apb", "smi"; power-domains = <&spm MT8167_POWER_DOMAIN_VDEC>; }; - - iommu: m4u@10203000 { - compatible = "mediatek,mt8167-m4u"; - reg = <0 0x10203000 0 0x1000>; - mediatek,larbs = <&larb0>, <&larb1>, <&larb2>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_LOW>; - #iommu-cells = <1>; - }; }; };
Signature · 1 line
2.43.0
PATCH v2 2/6 dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
In reply to Luca Leonardo ScorciaAdd compatibles for various display-related blocks of MediaTek mt8167.
--- .../devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 + .../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 4 +++- .../devicetree/bindings/display/mediatek/mediatek,dither.yaml | 1 + .../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 1 + .../devicetree/bindings/display/mediatek/mediatek,ovl.yaml | 1 + .../devicetree/bindings/display/mediatek/mediatek,rdma.yaml | 1 + .../devicetree/bindings/display/mediatek/mediatek,wdma.yaml | 4 +++- 7 files changed, 11 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml +1 -0
@@ -33,6 +33,7 @@ properties: - enum: - mediatek,mt2712-disp-aal - mediatek,mt6795-disp-aal + - mediatek,mt8167-disp-aal - const: mediatek,mt8173-disp-aal - items: - enum:
Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml +3 -1
@@ -25,7 +25,9 @@ properties: - mediatek,mt8183-disp-ccorr - mediatek,mt8192-disp-ccorr - items: - - const: mediatek,mt8365-disp-ccorr + - enum: + - mediatek,mt8167-disp-ccorr + - mediatek,mt8365-disp-ccorr - const: mediatek,mt8183-disp-ccorr - items: - enum:
Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml +1 -0
@@ -26,6 +26,7 @@ properties: - mediatek,mt8183-disp-dither - items: - enum: + - mediatek,mt8167-disp-dither - mediatek,mt8186-disp-dither - mediatek,mt8188-disp-dither - mediatek,mt8192-disp-dither
Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml +1 -0
@@ -28,6 +28,7 @@ properties: - items: - enum: - mediatek,mt6795-disp-gamma + - mediatek,mt8167-disp-gamma - const: mediatek,mt8173-disp-gamma - items: - enum:
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml +1 -0
@@ -23,6 +23,7 @@ properties: oneOf: - enum: - mediatek,mt2701-disp-ovl + - mediatek,mt8167-disp-ovl - mediatek,mt8173-disp-ovl - mediatek,mt8183-disp-ovl - mediatek,mt8192-disp-ovl
Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml +1 -0
@@ -36,6 +36,7 @@ properties: - enum: - mediatek,mt7623-disp-rdma - mediatek,mt2712-disp-rdma + - mediatek,mt8167-disp-rdma - const: mediatek,mt2701-disp-rdma - items: - enum:
Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml +3 -1
@@ -24,7 +24,9 @@ properties: - enum: - mediatek,mt8173-disp-wdma - items: - - const: mediatek,mt6795-disp-wdma + - enum: + - mediatek,mt6795-disp-wdma + - mediatek,mt8167-disp-wdma - const: mediatek,mt8173-disp-wdma reg:
Signature · 1 line
2.43.0
Re: [PATCH v2 2/6] dt-bindings: display: mediatek: Add compatibles for MediaTek mt8167
Il 16/02/26 17:22, Luca Leonardo Scorcia ha scritto:
Quoted 4 lines
Add compatibles for various display-related blocks of MediaTek mt8167.
Signed-off-by Luca Leonardo Scorcia <[email protected]>Reviewed-by Krzysztof Kozlowski <[email protected]>
PATCH v2 3/6 dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
In reply to Luca Leonardo ScorciaRemove the dedicated "mediatek,mt8167-dsi" compatible from the device list and describe it as compatible with mt2701 instead. It is safe to do so because:
- Bootloader doesn't rely on this single compatible; and
- There was never any upstreamed devicetree using this single compatible; and
- The MT8167 DSI Controller is fully compatible with the one found in MT2701.
--- .../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml +4 -1
@@ -25,11 +25,14 @@ properties: - enum: - mediatek,mt2701-dsi - mediatek,mt7623-dsi - - mediatek,mt8167-dsi - mediatek,mt8173-dsi - mediatek,mt8183-dsi - mediatek,mt8186-dsi - mediatek,mt8188-dsi + - items: + - enum: + - mediatek,mt8167-dsi + - const: mediatek,mt2701-dsi - items: - enum: - mediatek,mt6795-dsi
Signature · 1 line
2.43.0
Re: [PATCH v2 3/6] dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
Quoted 2 lines · Luca Leonardo Scorcia
Remove the dedicated "mediatek,mt8167-dsi" compatible from the device list and describe it as compatible with mt2701 instead. It is safe to do so because:
You are not doing what you wrote. The dedicated mediatek,mt8167-dsi is still there. And if you want to describe mediatek,mt8167-dsi with OTHER compatible (mt2701), it is a NAK. It is wrong and not allowed by writing bindings doc.
You just added fallback, didn't you?
Please wrap commit message according to Linux coding style / submission process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597
Please run scripts/checkpatch.pl on the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl --strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear.
Quoted 2 lines
- Bootloader doesn't rely on this single compatible; and
Does not matter. You still CANNOT remove a compatible. If bootloader starts to rely on this single compatible, you add it back? No.
Quoted 5 lines
- There was never any upstreamed devicetree using this single compatible; and
- The MT8167 DSI Controller is fully compatible with the one found in MT2701.Fixes 8867c4b39361 ("dt-bindings: display: mediatek: dsi: add documentation for MT8167 SoC")
There is never a blank line between tags.
Quoted 4 lines
Signed-off-by Luca Leonardo Scorcia <[email protected]>--- .../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
Best regards,
Krzysztof
AngeloGioacchino Del Regno
maintainerRe: [PATCH v2 3/6] dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
Il 17/02/26 08:58, Krzysztof Kozlowski ha scritto:
Quoted 10 lines · Luca Leonardo Scorcia
Quoted 2 lines
Remove the dedicated "mediatek,mt8167-dsi" compatible from the device list and describe it as compatible with mt2701 instead. It is safe to do so because:
You are not doing what you wrote. The dedicated mediatek,mt8167-dsi is still there.
And if you want to describe mediatek,mt8167-dsi with OTHER compatible (mt2701), it is a NAK. It is wrong and not allowed by writing bindings doc.
Sorry, that was my apparently very-bad advice - and I recognize that, as a maintainer, I should have given different advices.
Still, check below the (bad, and not enough) reasons why I said that....
Quoted 14 lines
You just added fallback, didn't you?
Please wrap commit message according to Linux coding style / submission process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597Please run
scripts/checkpatch.plon the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl--strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear.Quoted 1 line
Quoted 5 lines
Quoted 1 line
- Bootloader doesn't rely on this single compatible; and
Does not matter. You still CANNOT remove a compatible. If bootloader starts to rely on this single compatible, you add it back? No.
The issue here is that "mediatek,mt8167-dsi" was never used anywhere, and that alone makes zero sense as it is - by hardware - identical to mt2701.
That, leaving alone the fact that nothing anywhere can make use of a node with just compatible = "mediatek,mt8167-dsi".
If it is not acceptable to remove something that was never used and should've never been there "alone" without fallbacks, it's ok. I'm sure that avoiding to delete the one line is not a big deal there.
Also remember that we are talking about an old SoC that will never see a bootchain overhaul, nor will it see new bootloaders.
Though, just a small note - please please please: when we see new contributors, especially when they're community ones, can we try and encourage them to do the right things, and follow the right processes, without being harsh in any way?
And P.S.: Yeah I know you haven't been as harsh as you can (rightfully) be, so thanks for that.
Luca, I'm sorry again, at this point - it would be great if you could please send a v3 without the removal of that line. Just add the fallback and that's it :-)
Quoted 7 lines
Quoted 5 lines
- There was never any upstreamed devicetree using this single compatible; and
- The MT8167 DSI Controller is fully compatible with the one found in MT2701.Fixes 8867c4b39361 ("dt-bindings: display: mediatek: dsi: add documentation for MT8167 SoC")There is never a blank line between tags.
Yeah, agreed.
Cheers,
Angelo
Quoted 9 lines
Quoted 5 lines
Signed-off-by Luca Leonardo Scorcia <[email protected]>--- .../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)Best regards,
Krzysztof
Re: [PATCH v2 3/6] dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
Thank you all for your feedback! As I just learnt about the merge-window patch-freeze
period I'll wait until next Monday before submitting v3 including the suggested changes.
Mmmh. Now I'm wondering if I should have added a Fixes tag to [1], that's actually an
user-visible issue...
[1] https://patchwork.kernel.org/project/linux-mediatek/patch/[email protected]/
Il giorno mar 17 feb 2026 alle ore 10:03 AngeloGioacchino Del Regno <[email protected]> ha scritto:
Quoted 83 lines
Il 17/02/26 08:58, Krzysztof Kozlowski ha scritto:
Quoted 10 lines · Luca Leonardo Scorcia
Quoted 2 lines
Remove the dedicated "mediatek,mt8167-dsi" compatible from the device list and describe it as compatible with mt2701 instead. It is safe to do so because:
You are not doing what you wrote. The dedicated mediatek,mt8167-dsi is still there.
And if you want to describe mediatek,mt8167-dsi with OTHER compatible (mt2701), it is a NAK. It is wrong and not allowed by writing bindings doc.
Sorry, that was my apparently very-bad advice - and I recognize that, as a maintainer, I should have given different advices.
Still, check below the (bad, and not enough) reasons why I said that....
Quoted 14 lines
You just added fallback, didn't you?
Please wrap commit message according to Linux coding style / submission process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597Please run
scripts/checkpatch.plon the patches and fix reported warnings. After that, run also 'scripts/checkpatch.pl--strict' on the patches and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear.Quoted 1 line
Quoted 5 lines
Quoted 1 line
- Bootloader doesn't rely on this single compatible; and
Does not matter. You still CANNOT remove a compatible. If bootloader starts to rely on this single compatible, you add it back? No.
The issue here is that "mediatek,mt8167-dsi" was never used anywhere, and that alone makes zero sense as it is - by hardware - identical to mt2701.
That, leaving alone the fact that nothing anywhere can make use of a node with just
compatible = "mediatek,mt8167-dsi".If it is not acceptable to remove something that was never used and should've never been there "alone" without fallbacks, it's ok. I'm sure that avoiding to delete the one line is not a big deal there.
Also remember that we are talking about an old SoC that will never see a bootchain overhaul, nor will it see new bootloaders.Though, just a small note - please please please: when we see new contributors, especially when they're community ones, can we try and encourage them to do the right things, and follow the right processes, without being harsh in any way?
And
P.S.: Yeah I know you haven't been as harsh as you can (rightfully) be, so thanks for that.Luca, I'm sorry again, at this point - it would be great if you could please send a v3 without the removal of that line. Just add the fallback and that's it :-)
Quoted 7 lines
Quoted 5 lines
- There was never any upstreamed devicetree using this single compatible; and
- The MT8167 DSI Controller is fully compatible with the one found in MT2701.Fixes 8867c4b39361 ("dt-bindings: display: mediatek: dsi: add documentation for MT8167 SoC")There is never a blank line between tags.
Yeah, agreed.
Cheers,
AngeloQuoted 9 lines
Quoted 5 lines
Signed-off-by Luca Leonardo Scorcia <[email protected]>--- .../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)Best regards,
Krzysztof
Signature · 2 lines
Luca Leonardo Scorcia [email protected]
Re: [PATCH v2 3/6] dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
In reply to Luca Leonardo ScorciaHi Luca,
Quoted 8 lines · Luca Leonardo Scorcia
Remove the dedicated "mediatek,mt8167-dsi" compatible from the device list and describe it as compatible with mt2701 instead. It is safe to do so because:
- Bootloader doesn't rely on this single compatible; and
- There was never any upstreamed devicetree using this single compatible; and
- The MT8167 DSI Controller is fully compatible with the one found in MT2701.Fixes 8867c4b39361 ("dt-bindings: display: mediatek: dsi: add documentation for MT8167 SoC")
Not sure which direction this patch will go in the next revision, but (if this patch remains in this form, and intended as a bug fix) please do not mix fixes for the current (and stable) kernel with new development for the next kernel in the same series. They are supposed to be applied to
https://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git/log/?h=next
and
https://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git/log/?h=fixes
respectively.
(also see Documentation/process/stable-kernel-rules.rst for what is generally considered to be a bug fix. We don't use the word "fix" very lightly, there needs to be a user-visible impact.)
To help the build test automation select the proper base branch, you can use the "phy-next" or "phy-fixes" git subject prefixes when generating your patches.
You can send fixes at any time, but please send new development for the next kernel only when the merge window isn't open (unless it is marked as RFC, then it can also be sent any time).
Re: [PATCH v2 3/6] dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
Quoted 3 lines · Vladimir Oltean
To help the build test automation select the proper base branch, you can use the "phy-next" or "phy-fixes" git subject prefixes when generating your patches.
Ah, sorry, I missed the fact that only patch 4/6 touches linux-phy.
What is the merge strategy for this set?
Re: [PATCH v2 3/6] dt-bindings: display: mediatek: Correct compatibility for mt8167-dsi
In reply to Vladimir OlteanHello Vladimir,
thank you for the reply and explanation. As a new contributor it is greatly appreciated.
Those patches are definitely intended for next since as far as I know there is no mt8167 device using upstream kernels out there.
As for the Fixes tag, the rationale for it was that it's ultimately not coherent with both its original author's intended usage [1] nor with the current code as it's not present in [2], possibly due to the fact that at the time of the original contribution bindings were text only and less accurate, so I described is as a "Fix". I understand now that the Fixes tag has a special meaning in the merge process so I will just remove it in v3, it does not add much information anyway. Also thanks about the git commit prefix suggestion, I didn't know about it!
I apologize for the confusion and I appreciate all guidance from maintainers. I really want to do stuff The Right Way, it's just a matter of moving along the learning curve.
[1] https://lore.kernel.org/linux-mediatek/[email protected]/
[2] https://github.com/torvalds/linux/blob/9702969978695d9a699a1f34771580cdbb153b33/drivers/gpu/drm/mediatek/mtk_dsi.c#L13061
Il giorno mar 17 feb 2026 alle ore 16:35 Vladimir Oltean <[email protected]> ha scritto:
Quoted 34 lines
Hi Luca,
Quoted 8 lines · Luca Leonardo Scorcia
Remove the dedicated "mediatek,mt8167-dsi" compatible from the device list and describe it as compatible with mt2701 instead. It is safe to do so because:
- Bootloader doesn't rely on this single compatible; and
- There was never any upstreamed devicetree using this single compatible; and
- The MT8167 DSI Controller is fully compatible with the one found in MT2701.Fixes 8867c4b39361 ("dt-bindings: display: mediatek: dsi: add documentation for MT8167 SoC")Not sure which direction this patch will go in the next revision, but (if this patch remains in this form, and intended as a bug fix) please do not mix fixes for the current (and stable) kernel with new development for the next kernel in the same series. They are supposed to be applied to
https://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git/log/?h=next
and
https://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git/log/?h=fixes
respectively.(also see
Documentation/process/stable-kernel-rules.rstfor what is generally considered to be a bug fix. We don't use the word "fix" very lightly, there needs to be a user-visible impact.)To help the build test automation select the proper base branch, you can use the "phy-next" or "phy-fixes" git subject prefixes when generating your patches.
You can send fixes at any time, but please send new development for the next kernel only when the merge window isn't open (unless it is marked as RFC, then it can also be sent any time).
Signature · 2 lines
Luca Leonardo Scorcia [email protected]
PATCH v2 4/6 dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
In reply to Luca Leonardo ScorciaAdd support for the MediaTek mt8167 SoC: the DSI PHY found in this chip is fully compatible with the one found in the mt2701 SoC.
--- Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml +1 -0
@@ -23,6 +23,7 @@ properties: - items: - enum: - mediatek,mt7623-mipi-tx + - mediatek,mt8167-mipi-tx - const: mediatek,mt2701-mipi-tx - items: - enum:
Signature · 1 line
2.43.0
Re: [PATCH v2 4/6] dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
Quoted 7 lines · Luca Leonardo Scorcia
Add support for the MediaTek mt8167 SoC: the DSI PHY found in this chip is fully compatible with the one found in the mt2701 SoC.
Signed-off-by Luca Leonardo Scorcia <[email protected]>--- Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml | 1 + 1 file changed, 1 insertion(+)
Best regards,
Krzysztof
Re: [PATCH v2 4/6] dt-bindings: phy: mediatek,dsi-phy: Add support for mt8167
In reply to Luca Leonardo ScorciaIl 16/02/26 17:22, Luca Leonardo Scorcia ha scritto:
Quoted 4 lines
Add support for the MediaTek mt8167 SoC: the DSI PHY found in this chip is fully compatible with the one found in the mt2701 SoC.
Signed-off-by Luca Leonardo Scorcia <[email protected]>
PATCH v2 5/6 arm64: dts: mediatek: mt8167: Add DRM nodes
In reply to Luca Leonardo ScorciaAdd all the DRM nodes required to get DSI to work on MT8167 SoC.
--- arch/arm64/boot/dts/mediatek/mt8167.dtsi | 317 +++++++++++++++++++++++ 1 file changed, 317 insertions(+)
arch/arm64/boot/dts/mediatek/mt8167.dtsi +317 -0
@@ -16,6 +16,20 @@ / { compatible = "mediatek,mt8167"; + aliases { + aal0 = &aal; + ccorr0 = &ccorr; + color0 = &color; + dither0 = &dither; + dsi0 = &dsi; + gamma0 = γ + ovl0 = &ovl0; + pwm0 = &disp_pwm; + rdma0 = &rdma0; + rdma1 = &rdma1; + wdma0 = &wdma; + }; + soc { topckgen: topckgen@10000000 { compatible = "mediatek,mt8167-topckgen", "syscon";
@@ -120,10 +134,303 @@ iommu: m4u@10203000 { #iommu-cells = <1>; }; + disp_pwm: pwm@1100f000 { + compatible = "mediatek,mt8167-disp-pwm", "mediatek,mt8173-disp-pwm"; + reg = <0 0x1100f000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_PWM_26M>, <&mmsys CLK_MM_DISP_PWM_MM>; + clock-names = "main", "mm"; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + #pwm-cells = <2>; + status = "disabled"; + }; + mmsys: syscon@14000000 { compatible = "mediatek,mt8167-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; #clock-cells = <1>; + + port { + #address-cells = <1>; + #size-cells = <0>; + + mmsys_main: endpoint@0 { + reg = <0>; + remote-endpoint = <&ovl0_in>; + }; + + mmsys_ext: endpoint@1 { + reg = <1>; + remote-endpoint = <&rdma1_in>; + }; + }; + }; + + ovl0: ovl0@14007000 { + compatible = "mediatek,mt8167-disp-ovl"; + reg = <0 0x14007000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_OVL0>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_LOW>; + iommus = <&iommu M4U_PORT_DISP_OVL0>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ovl0_in: endpoint { + remote-endpoint = <&mmsys_main>; + }; + }; + + port@1 { + reg = <1>; + ovl0_out: endpoint { + remote-endpoint = <&color_in>; + }; + }; + }; + }; + + rdma0: rdma0@14009000 { + compatible = "mediatek,mt8167-disp-rdma", "mediatek,mt2701-disp-rdma"; + reg = <0 0x14009000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_RDMA0>; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>; + iommus = <&iommu M4U_PORT_DISP_RDMA0>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + rdma0_in: endpoint { + remote-endpoint = <&dither_out>; + }; + }; + + port@1 { + reg = <1>; + rdma0_out: endpoint { + remote-endpoint = <&dsi_in>; + }; + }; + }; + }; + + rdma1: rdma1@1400a000 { + compatible = "mediatek,mt8167-disp-rdma", "mediatek,mt2701-disp-rdma"; + reg = <0 0x1400a000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_RDMA1>; + interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_LOW>; + iommus = <&iommu M4U_PORT_DISP_RDMA1>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + rdma1_in: endpoint { + remote-endpoint = <&mmsys_ext>; + }; + }; + + port@1 { + reg = <1>; + rdma1_out: endpoint { }; + }; + }; + }; + + wdma: wdma0@1400b000 { + compatible = "mediatek,mt8167-disp-wdma", "mediatek,mt8173-disp-wdma"; + reg = <0 0x1400b000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_WDMA>; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_LOW>; + iommus = <&iommu M4U_PORT_DISP_WDMA0>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + }; + + color: color@1400c000 { + compatible = "mediatek,mt8167-disp-color"; + reg = <0 0x1400c000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_COLOR>; + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + color_in: endpoint { + remote-endpoint = <&ovl0_out>; + }; + }; + + port@1 { + reg = <1>; + color_out: endpoint { + remote-endpoint = <&ccorr_in>; + }; + }; + }; + }; + + ccorr: ccorr@1400d000 { + compatible = "mediatek,mt8167-disp-ccorr", "mediatek,mt8183-disp-ccorr"; + reg = <0 0x1400d000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_CCORR>; + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + ccorr_in: endpoint { + remote-endpoint = <&color_out>; + }; + }; + + port@1 { + reg = <1>; + ccorr_out: endpoint { + remote-endpoint = <&aal_in>; + }; + }; + }; + }; + + aal: aal@1400e000 { + compatible = "mediatek,mt8167-disp-aal", "mediatek,mt8173-disp-aal"; + reg = <0 0x1400e000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_AAL>; + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + aal_in: endpoint { + remote-endpoint = <&ccorr_out>; + }; + }; + + port@1 { + reg = <1>; + aal_out: endpoint { + remote-endpoint = <&gamma_in>; + }; + }; + }; + }; + + gamma: gamma@1400f000 { + compatible = "mediatek,mt8167-disp-gamma", "mediatek,mt8173-disp-gamma"; + reg = <0 0x1400f000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_GAMMA>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + gamma_in: endpoint { + remote-endpoint = <&aal_out>; + }; + }; + + port@1 { + reg = <1>; + gamma_out: endpoint { + remote-endpoint = <&dither_in>; + }; + }; + }; + }; + + dither: dither@14010000 { + compatible = "mediatek,mt8167-disp-dither", "mediatek,mt8183-disp-dither"; + reg = <0 0x14010000 0 0x1000>; + clocks = <&mmsys CLK_MM_DISP_DITHER>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dither_in: endpoint { + remote-endpoint = <&gamma_out>; + }; + }; + + port@1 { + reg = <1>; + dither_out: endpoint { + remote-endpoint = <&rdma0_in>; + }; + }; + }; + }; + + dsi: dsi@14012000 { + compatible = "mediatek,mt8167-dsi", "mediatek,mt2701-dsi"; + reg = <0 0x14012000 0 0x1000>; + clocks = <&mmsys CLK_MM_DSI_ENGINE>, <&mmsys CLK_MM_DSI_DIGITAL>, + <&mipi_tx>; + clock-names = "engine", "digital", "hs"; + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_LOW>; + phys = <&mipi_tx>; + phy-names = "dphy"; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <&rdma0_out>; + }; + }; + + port@1 { + reg = <1>; + dsi_out: endpoint { }; + }; + }; + }; + + mutex: mutex@14015000 { + compatible = "mediatek,mt8167-disp-mutex"; + reg = <0 0x14015000 0 0x1000>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&spm MT8167_POWER_DOMAIN_MM>; }; larb0: larb@14016000 {
@@ -145,6 +452,16 @@ smi_common: smi@14017000 { power-domains = <&spm MT8167_POWER_DOMAIN_MM>; }; + mipi_tx: dsi-phy@14018000 { + compatible = "mediatek,mt8167-mipi-tx", "mediatek,mt2701-mipi-tx"; + reg = <0 0x14018000 0 0x90>; + clocks = <&topckgen CLK_TOP_MIPI_26M_DBG>; + clock-output-names = "mipi_tx0_pll"; + #clock-cells = <0>; + #phy-cells = <0>; + status = "disabled"; + }; + imgsys: syscon@15000000 { compatible = "mediatek,mt8167-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>;
Signature · 1 line
2.43.0
Re: [PATCH v2 5/6] arm64: dts: mediatek: mt8167: Add DRM nodes
Il 16/02/26 17:22, Luca Leonardo Scorcia ha scritto:
Quoted 3 lines
Add all the DRM nodes required to get DSI to work on MT8167 SoC.
Signed-off-by Luca Leonardo Scorcia <[email protected]>
PATCH v2 6/6 gpu: drm: mediatek: ovl: add specific entry for mt8167
In reply to Luca Leonardo ScorciaFrom: Val Packett <[email protected]>
From: Val Packett <[email protected]>
While this configuration is otherwise identical to mt8173, according to Android kernel sources, this SoC does need smi_id_en.
--- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
drivers/gpu/drm/mediatek/mtk_disp_ovl.c +12 -0
@@ -671,6 +671,16 @@ static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = { .num_formats = ARRAY_SIZE(mt8173_formats), }; +static const struct mtk_disp_ovl_data mt8167_ovl_driver_data = { + .addr =DISP_REG_OVL_ADDR_MT8173 , + .gmc_bits =8 , + .layer_nr =4 , + .fmt_rgb565_is_0 = true, + .smi_id_en = true, + .formats = mt8173_formats, + .num_formats =ARRAY_SIZE (mt8173_formats), +}; +static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { .addr =DISP_REG_OVL_ADDR_MT8173 , .gmc_bits =8 ,
@@ -742,6 +752,8 @@ static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = { { .compatible ="mediatek,mt2701-disp-ovl" , .data = &mt2701_ovl_driver_data}, + { .compatible ="mediatek,mt8167-disp-ovl" , + .data = &mt8167_ovl_driver_data}, { .compatible ="mediatek,mt8173-disp-ovl" , .data = &mt8173_ovl_driver_data}, { .compatible ="mediatek,mt8183-disp-ovl" ,
Signature · 1 line
2.43.0
AngeloGioacchino Del Regno
maintainerRe: [PATCH v2 6/6] gpu: drm: mediatek: ovl: add specific entry for mt8167
Il 16/02/26 17:22, Luca Leonardo Scorcia ha scritto:
Quoted 3 lines
From: Val Packett <[email protected]>
From: Val Packett <[email protected]>
Whoops, for some reason, you got the From line twice here. Something to note for the next time.
Quoted 7 lines
While this configuration is otherwise identical to mt8173, according to Android kernel sources, this SoC does need
smi_id_en.Signed-off-by Val Packett <[email protected]>Signed-off-by Luca Leonardo Scorcia <[email protected]>Reviewed-by AngeloGioacchino Del Regno <[email protected]>
Cheers,
Angelo