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RZN1 USB Host support

PATCH Superseded Herve Codina 5 participants 21 messages Apr 29, 2022 – May 20, 2022

Subsystems (5)

v5 of 6 Superseded Latest is v6 →

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#0 lore raw

v5 cover RZN1 USB Host support

Hi,

This series add support for the USB Host controllers available on RZN1 (r9a06g032) SOC.

These USB Host controllers are PCI OHCI/EHCI controllers located behind a bridge.

Regards,
Herve

Changes v2:
- Convert bindings to json-schema
- Update clocks description
- Remove unneeded '.compatible = "renesas,pci-r9a06g032"'

Changes v3:
- Remove the unneeded patch that calls clk_bulk_prepare_enable()
- Rework the device tree binding (conversion from .txt and RZ/N1 support)
- Use the RZ/N1 SOCs family only in the driver match compatible string.
- Enable PM and PM_GENERIC_DOMAIN for RZ/N1 and add the missing '#power-domain-cells' in sysctrl node.

Changes v4:
- Remove patches related to PM enable and #pwower-domain-cells as they will be handle out of this series.
- Add Bob's reviewed-by on patch 1
- Add Geert's reviewed by on patch 1 and 6
- Rename clocks and make the 'resets' property optional on RZ/N1 family
- Reword some commit logs and titles
- Fix dst node location (sort by node names or unit addresses)
- Fix the USB PHY node name

Changes v5:
- Rename clocks ("usb_" prefix removed)
- Add Geert's reviewed-by on patch 2, 3, 4 and 5

Herve Codina (6):
dt-bindings: PCI: pci-rcar-gen2: Convert bindings to json-schema
dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for

    r9a06g032

PCI: rcar-gen2: Add RZ/N1 SOCs family compatible string
ARM: dts: r9a06g032: Add internal PCI bridge node
ARM: dts: r9a06g032: Add USB PHY DT support
ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY

 .../devicetree/bindings/pci/pci-rcar-gen2.txt |  84 --------
 .../bindings/pci/renesas,pci-rcar-gen2.yaml   | 188 ++++++++++++++++++
 arch/arm/boot/dts/r9a06g032.dtsi              |  47 +++++
 drivers/pci/controller/pci-rcar-gen2.c        |   1 +
 4 files changed, 236 insertions(+), 84 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
 create mode 100644 Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
Signature · 1 line
2.35.1
#1 lore raw

v4 cover RZN1 USB Host support

Hi,

This series add support for the USB Host controllers available on RZN1 (r9a06g032) SOC.

These USB Host controllers are PCI OHCI/EHCI controllers located behind a bridge.

Regards,
Herve

Changes v2:
- Convert bindings to json-schema
- Update clocks description
- Remove unneeded '.compatible = "renesas,pci-r9a06g032"'

Changes v3:
- Remove the unneeded patch that calls clk_bulk_prepare_enable()
- Rework the device tree binding (conversion from .txt and RZ/N1 support)
- Use the RZ/N1 SOCs family only in the driver match compatible string.
- Enable PM and PM_GENERIC_DOMAIN for RZ/N1 and add the missing '#power-domain-cells' in sysctrl node.

Changes v4:
- Remove patches related to PM enable and #pwower-domain-cells as they will be handle out of this series.
- Add Bob's reviewed-by on patch 1
- Add Geert's reviewed by on patch 1 and 6
- Rename clocks and make the 'resets' property optional on RZ/N1 family
- Reword some commit logs and titles
- Fix dst node location (sort by node names or unit addresses)
- Fix the USB PHY node name

Changes v5:
- Rename clocks ("usb_" prefix removed)
- - Add Geert's reviewed-by on patch 2, 3, 4 and 5

Herve Codina (6):
dt-bindings: PCI: pci-rcar-gen2: Convert bindings to json-schema
dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for

    r9a06g032

PCI: rcar-gen2: Add RZ/N1 SOCs family compatible string
ARM: dts: r9a06g032: Add internal PCI bridge node
ARM: dts: r9a06g032: Add USB PHY DT support
ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY

 .../devicetree/bindings/pci/pci-rcar-gen2.txt |  84 --------
 .../bindings/pci/renesas,pci-rcar-gen2.yaml   | 188 ++++++++++++++++++
 arch/arm/boot/dts/r9a06g032.dtsi              |  47 +++++
 drivers/pci/controller/pci-rcar-gen2.c        |   1 +
 4 files changed, 236 insertions(+), 84 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
 create mode 100644 Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
Signature · 1 line
2.35.1
#2 lore raw

PATCH v5 1/6 dt-bindings: PCI: pci-rcar-gen2: Convert bindings to json-schema

In reply to Herve Codina

Convert Renesas PCI bridge bindings documentation to json-schema.

---
 .../devicetree/bindings/pci/pci-rcar-gen2.txt |  84 ----------
 .../bindings/pci/renesas,pci-rcar-gen2.yaml   | 156 ++++++++++++++++++
 2 files changed, 156 insertions(+), 84 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
 create mode 100644 Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt deleted +0 -84
deleted file mode 100644
index aeba38f0a387..000000000000
@@ -1,84 +0,0 @@
-Renesas AHB to PCI bridge
--------------------------
-
-This is the bridge used internally to connect the USB controllers to the
-AHB. There is one bridge instance per USB port connected to the internal
-OHCI and EHCI controllers.
-
-Required properties:
-- compatible: "renesas,pci-r8a7742" for the R8A7742 SoC;
-	      "renesas,pci-r8a7743" for the R8A7743 SoC;
-	      "renesas,pci-r8a7744" for the R8A7744 SoC;
-	      "renesas,pci-r8a7745" for the R8A7745 SoC;
-	      "renesas,pci-r8a7790" for the R8A7790 SoC;
-	      "renesas,pci-r8a7791" for the R8A7791 SoC;
-	      "renesas,pci-r8a7793" for the R8A7793 SoC;
-	      "renesas,pci-r8a7794" for the R8A7794 SoC;
-	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 or
-				      RZ/G1 compatible device.
-
-
-	      When compatible with the generic version, nodes must list the
-	      SoC-specific version corresponding to the platform first
-	      followed by the generic version.
-
-- reg:	A list of physical regions to access the device: the first is
-	the operational registers for the OHCI/EHCI controllers and the
-	second is for the bridge configuration and control registers.
-- interrupts: interrupt for the device.
-- clocks: The reference to the device clock.
-- bus-range: The PCI bus number range; as this is a single bus, the range
-	     should be specified as the same value twice.
-- #address-cells: must be 3.
-- #size-cells: must be 2.
-- #interrupt-cells: must be 1.
-- interrupt-map: standard property used to define the mapping of the PCI
-  interrupts to the GIC interrupts.
-- interrupt-map-mask: standard property that helps to define the interrupt
-  mapping.
-
-Optional properties:
-- dma-ranges: a single range for the inbound memory region. If not supplied,
-  defaults to 1GiB at 0x40000000. Note there are hardware restrictions on the
-  allowed combinations of address and size.
-
-Example SoC configuration:
-
-	pci0: pci@ee090000  {
-		compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
-		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
-		reg = <0x0 0xee090000 0x0 0xc00>,
-		      <0x0 0xee080000 0x0 0x1100>;
-		interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-
-		bus-range = <0 0>;
-		#address-cells = <3>;
-		#size-cells = <2>;
-		#interrupt-cells = <1>;
-		dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
-		interrupt-map-mask = <0xff00 0 0 0x7>;
-		interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
-				 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
-				 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
-
-		usb@1,0 {
-			reg = <0x800 0 0 0 0>;
-			phys = <&usb0 0>;
-			phy-names = "usb";
-		};
-
-		usb@2,0 {
-			reg = <0x1000 0 0 0 0>;
-			phys = <&usb0 0>;
-			phy-names = "usb";
-		};
-	};
-
-Example board setup:
-
-&pci0 {
-	status = "okay";
-	pinctrl-0 = <&usb0_pins>;
-	pinctrl-names = "default";
-};
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml new file +156 -0

156 lines not on this page · raw message

Signature · 1 line
2.35.1
#3 lore raw

PATCH v5 2/6 dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

In reply to Herve Codina

Add internal PCI bridge support for the r9a06g032 SOC. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one present in the R-Car Gen2 family.
Compared to the R-Car Gen2 family, it needs three clocks instead of one.

The 'resets' property for the RZ/N1 family is not required since there is no reset-controller support yet for the RZ/N1 family.

---
 .../bindings/pci/renesas,pci-rcar-gen2.yaml   | 46 ++++++++++++++++---
 1 file changed, 39 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +39 -7
index 494eb975c146..a9f806794f12 100644
@@ -32,6 +32,10 @@ properties:
               - renesas,pci-r8a7793      # R-Car M2-N
               - renesas,pci-r8a7794      # R-Car E2
           - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
+      - items:
+          - enum:
+              - renesas,pci-r9a06g032     # RZ/N1D
+          - const: renesas,pci-rzn1       # RZ/N1
 
   reg:
     items:
@@ -41,13 +45,9 @@ properties:
   interrupts:
     maxItems: 1
 
-  clocks:
-    items:
-      - description: Device clock
+  clocks: true
 
-  clock-names:
-    items:
-      - const: pclk
+  clock-names: true
 
   resets:
     maxItems: 1
@@ -106,13 +106,45 @@ required:
   - interrupt-map
   - interrupt-map-mask
   - clocks
-  - resets
   - power-domains
   - bus-range
   - "#address-cells"
   - "#size-cells"
   - "#interrupt-cells"
 
+if:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - renesas,pci-rzn1
+
+then:
+  properties:
+    clocks:
+      items:
+        - description: Internal bus clock (AHB) for HOST
+        - description: Internal bus clock (AHB) Power Management
+        - description: PCI clock for USB subsystem
+    clock-names:
+      items:
+        - const: hclkh
+        - const: hclkpm
+        - const: pciclk
+  required:
+    - clock-names
+
+else:
+  properties:
+    clocks:
+      items:
+        - description: Device clock
+    clock-names:
+      items:
+        - const: pclk
+  required:
+    - resets
+
 unevaluatedProperties: false
 
 examples:
Signature · 1 line
2.35.1
#4 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Quoted 8 lines · Herve Codina

Add internal PCI bridge support for the r9a06g032 SOC. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one present in the R-Car Gen2 family.
Compared to the R-Car Gen2 family, it needs three clocks instead of one.

The 'resets' property for the RZ/N1 family is not required since there is no reset-controller support yet for the RZ/N1 family.

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

Quoted 40 lines
---
 .../bindings/pci/renesas,pci-rcar-gen2.yaml   | 46 ++++++++++++++++---
 1 file changed, 39 insertions(+), 7 deletions(-)
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +6 -6
index 494eb975c146..a9f806794f12 100644
@@ -32,6 +32,10 @@ properties:
               - renesas,pci-r8a7793      # R-Car M2-N
               - renesas,pci-r8a7794      # R-Car E2
           - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
+      - items:
+          - enum:
+              - renesas,pci-r9a06g032     # RZ/N1D
+          - const: renesas,pci-rzn1       # RZ/N1
 
   reg:
     items:
@@ -41,13 +45,9 @@ properties:
   interrupts:
     maxItems: 1
 
-  clocks:
-    items:
-      - description: Device clock
+  clocks: true
 
-  clock-names:
-    items:
-      - const: pclk
+  clock-names: true
 
   resets:
     maxItems: 1
@@ -106,13 +106,45 @@ required:
   - interrupt-map

Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml required: · line 115

Quoted 10 lines
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +1 -1
   - interrupt-map-mask
   - clocks
-  - resets
   - power-domains
   - bus-range
   - "#address-cells"
   - "#size-cells"
   - "#interrupt-cells"
 
+if:

allOf.

Quoted 25 lines
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +25 -0
+  properties:
+    compatible:
+      contains:
+        enum:
+          - renesas,pci-rzn1
+
+then:
+  properties:
+    clocks:
+      items:
+        - description: Internal bus clock (AHB) for HOST
+        - description: Internal bus clock (AHB) Power Management
+        - description: PCI clock for USB subsystem
+    clock-names:
+      items:
+        - const: hclkh
+        - const: hclkpm
+        - const: pciclk
+  required:
+    - clock-names
+
+else:
+  properties:
+    clocks:
+      items:

Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml required: · line 150

Quoted 10 lines
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +7 -0
+        - description: Device clock
+    clock-names:
+      items:
+        - const: pclk
+  required:
+    - resets
+
 unevaluatedProperties: false
 
 examples:

Best regards,
Krzysztof

#5 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Hi Krzysztof,

Quoted 7 lines · Krzysztof Kozlowski
Quoted 6 lines · Herve Codina

Add internal PCI bridge support for the r9a06g032 SOC. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one present in the R-Car Gen2 family.
Compared to the R-Car Gen2 family, it needs three clocks instead of one.

Quoted 7 lines
Quoted 2 lines

The 'resets' property for the RZ/N1 family is not required since there is no reset-controller support yet for the RZ/N1 family.

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

The problem is that there are no bindings for the reset controller (actually the reset controller feature of the system-controller) yet. Yeah, we can just add #reset-cells = <1> to the system-controller device node, but we cannot add the actual resets properties to the consumers, until the actual cell values are defined.

Quoted 2 lines
Quoted 2 lines

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

maintainer
#6 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Quoted 19 lines · Geert Uytterhoeven

Hi Krzysztof,

Quoted 7 lines · Krzysztof Kozlowski
Quoted 6 lines · Herve Codina

Add internal PCI bridge support for the r9a06g032 SOC. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one present in the R-Car Gen2 family.
Compared to the R-Car Gen2 family, it needs three clocks instead of one.

Quoted 7 lines
Quoted 2 lines

The 'resets' property for the RZ/N1 family is not required since there is no reset-controller support yet for the RZ/N1 family.

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

Quoted 5 lines

The problem is that there are no bindings for the reset controller (actually the reset controller feature of the system-controller) yet. Yeah, we can just add #reset-cells = <1> to the system-controller device node, but we cannot add the actual resets properties to the consumers, until the actual cell values are defined.

Sounds like you should implement providers first. Or just live with the warning as a reminder to implement the reset provider?

Rob

#7 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Hi Rob,

Quoted 18 lines · Rob Herring
Quoted 17 lines · Geert Uytterhoeven
Quoted 14 lines · Krzysztof Kozlowski
Quoted 8 lines · Herve Codina

Add internal PCI bridge support for the r9a06g032 SOC. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one present in the R-Car Gen2 family.
Compared to the R-Car Gen2 family, it needs three clocks instead of one.

The 'resets' property for the RZ/N1 family is not required since there is no reset-controller support yet for the RZ/N1 family.

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

Quoted 8 lines
Quoted 5 lines

The problem is that there are no bindings for the reset controller (actually the reset controller feature of the system-controller) yet. Yeah, we can just add #reset-cells = <1> to the system-controller device node, but we cannot add the actual resets properties to the consumers, until the actual cell values are defined.

Sounds like you should implement providers first. Or just live with the warning as a reminder to implement the reset provider?

I'd go for the latter. The upstream r9a06g032.dtsi is still under active development. Until very recently, the only device supported was the serial console.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#8 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Quoted 11 lines · Geert Uytterhoeven
Quoted 11 lines
Quoted 10 lines
Quoted 4 lines

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

The problem is that there are no bindings for the reset controller (actually the reset controller feature of the system-controller) yet. Yeah, we can just add #reset-cells = <1> to the system-controller device node, but we cannot add the actual resets properties to the consumers, until the actual cell values are defined.

Quoted 6 lines
Quoted 2 lines

Sounds like you should implement providers first. Or just live with the warning as a reminder to implement the reset provider?

I'd go for the latter. The upstream r9a06g032.dtsi is still under active development. Until very recently, the only device supported was the serial console.

For clocks we use in such cases fixed-clock placeholders or empty phandles. Maybe something like that would work here as well?

Best regards,
Krzysztof

#9 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Hi Krzysztof,

Quoted 15 lines · Krzysztof Kozlowski
Quoted 14 lines · Geert Uytterhoeven
Quoted 13 lines
Quoted 10 lines
Quoted 4 lines

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

The problem is that there are no bindings for the reset controller (actually the reset controller feature of the system-controller) yet. Yeah, we can just add #reset-cells = <1> to the system-controller device node, but we cannot add the actual resets properties to the consumers, until the actual cell values are defined.

Sounds like you should implement providers first. Or just live with the warning as a reminder to implement the reset provider?

Quoted 6 lines
Quoted 3 lines

I'd go for the latter. The upstream r9a06g032.dtsi is still under active development. Until very recently, the only device supported was the serial console.

For clocks we use in such cases fixed-clock placeholders or empty phandles. Maybe something like that would work here as well?

I don't think that works for resets.
Besides, the driver doesn't need or use the reset anyway.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#10 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Hi All,

Quoted 23 lines · On Tue, 3 May 2022 11:37:31 +0200 Geert Uytterhoeven <[email protected]>…

Hi Krzysztof,

Quoted 19 lines · Krzysztof Kozlowski
Quoted 17 lines · Geert Uytterhoeven
Quoted 5 lines
Quoted 5 lines
Quoted 4 lines

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

Quoted 8 lines
Quoted 5 lines

The problem is that there are no bindings for the reset controller (actually the reset controller feature of the system-controller) yet. Yeah, we can just add #reset-cells = <1> to the system-controller device node, but we cannot add the actual resets properties to the consumers, until the actual cell values are defined.

Sounds like you should implement providers first. Or just live with the warning as a reminder to implement the reset provider?

I'd go for the latter. The upstream r9a06g032.dtsi is still under active development. Until very recently, the only device supported was the serial console.

Quoted 6 lines
Quoted 2 lines

For clocks we use in such cases fixed-clock placeholders or empty phandles. Maybe something like that would work here as well?

I don't think that works for resets.
Besides, the driver doesn't need or use the reset anyway.

Finally, related to the "resets" property, what should I do ?
(a) Keep the property as not required an change the commit log
(b) Set the property as required and live with a warning (Rob's suggestion)

Regards,
Hervé

Signature · 3 lines
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
maintainer
#11 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

In reply to Krzysztof Kozlowski
Quoted 15 lines · Krzysztof Kozlowski
Quoted 14 lines · Geert Uytterhoeven
Quoted 13 lines
Quoted 10 lines
Quoted 4 lines

This should not be a reason why a property is or is not required. Either this is required for device operation or not. If it is required, should be in the bindings. Otherwise what are you going to do in the future? Add a required property breaking the ABI?

The problem is that there are no bindings for the reset controller (actually the reset controller feature of the system-controller) yet. Yeah, we can just add #reset-cells = <1> to the system-controller device node, but we cannot add the actual resets properties to the consumers, until the actual cell values are defined.

Sounds like you should implement providers first. Or just live with the warning as a reminder to implement the reset provider?

Quoted 6 lines
Quoted 3 lines

I'd go for the latter. The upstream r9a06g032.dtsi is still under active development. Until very recently, the only device supported was the serial console.

For clocks we use in such cases fixed-clock placeholders or empty phandles. Maybe something like that would work here as well?

IMO, we should move away from doing that for clocks. It's a guaranteed ABI break.

Rob

#12 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

In reply to Krzysztof Kozlowski

Hi Krzysztof,

On Sun, 1 May 2022 10:51:43 +0200
Krzysztof Kozlowski <[email protected]> wrote:

[...]

Quoted 13 lines
Quoted 13 lines

resets:
maxItems: 1

Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +0 -1
@@ -106,13 +106,45 @@ required:
   - interrupt-map
   - interrupt-map-mask
   - clocks
-  - resets
   - power-domains
   - bus-range
   - "#address-cells"
   - "#size-cells"
   - "#interrupt-cells"
 
Quoted 8 lines

Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml required: · line 115

Quoted 1 line
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +1 -0
+if:  

allOf.

Quoted 4 lines
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +4 -0
+  properties:
+    compatible:
+      contains:
+        enum:

I Have an issue with this allOf.

The yaml has the following structure and so has 2 AllOf:
...
allOf:
- $ref: /schemas/pci/pci-bus.yaml#

properties:
compatible:
...
allOf:
- if:
properties:
compatible:
contains:
...

make dt_binding_check failed with the following error:

    $ make dt_binding_check DT_SCHEMA_FILES=renesas,pci-rcar-gen2.yaml
      LINT    Documentation/devicetree/bindings
    ./Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml:115:1: [error] duplication of key "allOf" in mapping (key-duplicates)
      CHKDT   Documentation/devicetree/bindings/processed-schema.json
    Traceback (most recent call last):
      File "/home/hcodina/.local/bin/dt-doc-validate", line 25, in check_doc
        testtree = dtschema.load(filename, line_number=line_number)
      File "/home/hcodina/.local/lib/python3.10/site-packages/dtschema/lib.py", line 912, in load
        return yaml.load(f.read())
      File "/home/hcodina/.local/lib/python3.10/site-packages/ruamel/yaml/main.py", line 434, in load
        return constructor.get_single_data()
      File "/home/hcodina/.local/lib/python3.10/site-packages/ruamel/yaml/constructor.py", line 121, in get_single_data
        return self.construct_document(node)
      File "/home/hcodina/.local/lib/python3.10/site-packages/ruamel/yaml/constructor.py", line 131, in construct_document
        for _dummy in generator:
      File "/home/hcodina/.local/lib/python3.10/site-packages/ruamel/yaml/constructor.py", line 674, in construct_yaml_map
        value = self.construct_mapping(node)
      File "/home/hcodina/.local/lib/python3.10/site-packages/ruamel/yaml/constructor.py", line 445, in construct_mapping
        return BaseConstructor.construct_mapping(self, node, deep=deep)
      File "/home/hcodina/.local/lib/python3.10/site-packages/ruamel/yaml/constructor.py", line 263, in construct_mapping
        if self.check_mapping_key(node, key_node, mapping, key, value):
      File "/home/hcodina/.local/lib/python3.10/site-packages/ruamel/yaml/constructor.py", line 294, in check_mapping_key
        raise DuplicateKeyError(*args)
    ruamel.yaml.constructor.DuplicateKeyError: while constructing a mapping
      in "<unicode string>", line 4, column 1
    found duplicate key "allOf" with value "[]" (original value: "[]")
      in "<unicode string>", line 115, column 1

To suppress this check see:
http://yaml.readthedocs.io/en/latest/api.html#duplicate-keys

During handling of the above exception, another exception occurred:

Traceback (most recent call last):
File "/home/hcodina/.local/bin/dt-doc-validate", line 74, in <module>
ret = check_doc(f)
File "/home/hcodina/.local/bin/dt-doc-validate", line 30, in check_doc
print(filename + ":", exc.path[-1], exc.message, file=sys.stderr)
AttributeError: 'DuplicateKeyError' object has no attribute 'path'
SCHEMA Documentation/devicetree/bindings/processed-schema.json
/home/hcodina/project/xxxx/dev/linux/upstream_usb_host/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml: ignoring, error parsing file
DTEX Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.example.dts
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml: found duplicate key "allOf" with value "[]" (original value: "[]") make[1]: *** [Documentation/devicetree/bindings/Makefile:26: Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.example.dts] Error 1 make[1]: *** Deleting file 'Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.example.dts'
make: *** [Makefile:1401: dt_binding_check] Error 2
[hcodina@localhost upstream_usb_host]$

[hcodina@localhost upstream_usb_host]$ make ARCH=arm CROSS_COMPILE=/home/hcodina/toolchain/gcc-linaro-7.5.0-2019.12-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- dt_binding_check DT_SCHEMA_FILES=renesas,pci-rcar-gen2.yaml
DTEX Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.example.dts
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml: found duplicate key "allOf" with value "[]" (original value: "[]")
make[1]: *** [Documentation/devicetree/bindings/Makefile:26: Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.example.dts] Error 1
make[1]: *** Deleting file 'Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.example.dts'
make: *** [Makefile:1401: dt_binding_check] Error 2

Is having a 'allOf' for schemas inclusion and a 'allOf' for conditionnal parts allowed ?

Regards,
Hervé

#13 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

Hi Hervé,

Quoted 33 lines · Herve Codina

On Sun, 1 May 2022 10:51:43 +0200
Krzysztof Kozlowski <[email protected]> wrote:

[...]

Quoted 13 lines
Quoted 13 lines

resets:
maxItems: 1

Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +0 -1
@@ -106,13 +106,45 @@ required:
   - interrupt-map
   - interrupt-map-mask
   - clocks
-  - resets
   - power-domains
   - bus-range
   - "#address-cells"
   - "#size-cells"
   - "#interrupt-cells"
 
Quoted 8 lines

Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml required: · line 115

Quoted 1 line
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +1 -0
+if:

allOf.

Quoted 4 lines
Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +4 -0
+  properties:
+    compatible:
+      contains:
+        enum:

I Have an issue with this allOf.

The yaml has the following structure and so has 2 AllOf:
...
allOf:
- $ref: /schemas/pci/pci-bus.yaml#

Quoted 11 lines

properties:
compatible:
...
allOf:
- if:
properties:
compatible:
contains:
...
Is having a 'allOf' for schemas inclusion and a 'allOf' for conditionnal parts allowed ?

Just combine them into a single "allOf".
See e.g. Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml.

{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#14 lore raw

Re: [PATCH v5 2/6] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032

In reply to Herve Codina
Quoted 10 lines · Herve Codina

The yaml has the following structure and so has 2 AllOf:
...
allOf:
- $ref: /schemas/pci/pci-bus.yaml#

properties:
compatible:
...
allOf:
- if:

(...)

Quoted 3 lines

Is having a 'allOf' for schemas inclusion and a 'allOf' for conditionnal parts allowed ?

Only one allOf for all of such (ref + if), located before additionalProperties:
https://elixir.bootlin.com/linux/v5.18-rc7/source/Documentation/devicetree/bindings/example-schema.yaml#L211

Best regards,
Krzysztof

#15 lore raw

PATCH v5 3/6 PCI: rcar-gen2: Add RZ/N1 SOCs family compatible string

In reply to Herve Codina

Add the Renesas RZ/N1 SOCs family support to the Renesas R-Car Gen2 PCI bridge driver.

The Renesas RZ/N1 SOCs internal PCI bridge is compatible with the one available in the R-Car Gen2 family.

Tested with the RZ/N1D (R9A06G032) SOC.

---
 drivers/pci/controller/pci-rcar-gen2.c | 1 +
 1 file changed, 1 insertion(+)
drivers/pci/controller/pci-rcar-gen2.c +1 -0
index 35804ea394fd..839695791757 100644
@@ -328,6 +328,7 @@ static const struct of_device_id rcar_pci_of_match[] = {
 	{ .compatible = "renesas,pci-r8a7791", },
 	{ .compatible = "renesas,pci-r8a7794", },
 	{ .compatible = "renesas,pci-rcar-gen2", },
+	{ .compatible = "renesas,pci-rzn1", },
 	{ },
 };
 
Signature · 1 line
2.35.1
Acked-by on v5 3/6
#16 lore raw

Re: [PATCH v5 3/6] PCI: rcar-gen2: Add RZ/N1 SOCs family compatible string

Quoted 6 lines · Herve Codina

Add the Renesas RZ/N1 SOCs family support to the Renesas R-Car Gen2 PCI bridge driver.

The Renesas RZ/N1 SOCs internal PCI bridge is compatible with the one available in the R-Car Gen2 family.

Quoted 7 lines

Tested with the RZ/N1D (R9A06G032) SOC.

---
 drivers/pci/controller/pci-rcar-gen2.c | 1 +
 1 file changed, 1 insertion(+)

I assume this series will be picked up by platforms maintainers.

Thanks,
Lorenzo

Quoted 15 lines
drivers/pci/controller/pci-rcar-gen2.c +1 -0
index 35804ea394fd..839695791757 100644
@@ -328,6 +328,7 @@ static const struct of_device_id rcar_pci_of_match[] = {
 	{ .compatible = "renesas,pci-r8a7791", },
 	{ .compatible = "renesas,pci-r8a7794", },
 	{ .compatible = "renesas,pci-rcar-gen2", },
+	{ .compatible = "renesas,pci-rzn1", },
 	{ },
 };
 
Signature · 1 line
2.35.1
#17 lore raw

Re: [PATCH v5 3/6] PCI: rcar-gen2: Add RZ/N1 SOCs family compatible string

Hi Lorenzo,

Quoted 9 lines · Lorenzo Pieralisi
Quoted 8 lines · Herve Codina

Add the Renesas RZ/N1 SOCs family support to the Renesas R-Car Gen2 PCI bridge driver.

The Renesas RZ/N1 SOCs internal PCI bridge is compatible with the one available in the R-Car Gen2 family.

Tested with the RZ/N1D (R9A06G032) SOC.

Quoted 7 lines
Quoted 5 lines
---
 drivers/pci/controller/pci-rcar-gen2.c | 1 +
 1 file changed, 1 insertion(+)

Thanks!

Quoted 1 line

I assume this series will be picked up by platforms maintainers.

Usually driver patches are picked by the driver (subsystem) maintainer. I can pick up the DTS changes once you agree with the DT bindings.

Thanks!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#18 lore raw

PATCH v5 4/6 ARM: dts: r9a06g032: Add internal PCI bridge node

In reply to Herve Codina

Add the device node for the r9a06g032 internal PCI bridge device.

---
 arch/arm/boot/dts/r9a06g032.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
arch/arm/boot/dts/r9a06g032.dtsi +29 -0
index 20286433d3c6..45944f849190 100644
@@ -94,6 +94,35 @@ sysctrl: system-controller@4000c000 {
 			clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
 		};
 
+		pci_usb: pci@40030000 {
+			compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
+			device_type = "pci";
+			clocks = <&sysctrl R9A06G032_HCLK_USBH>,
+				 <&sysctrl R9A06G032_HCLK_USBPM>,
+				 <&sysctrl R9A06G032_CLK_PCI_USB>;
+			clock-names = "hclkh", "hclkpm", "pciclk";
+			power-domains = <&sysctrl>;
+			reg = <0x40030000 0xc00>,
+			      <0x40020000 0x1100>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+
+			bus-range = <0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>;
+			/* Should map all possible DDR as inbound ranges, but
+			 * the IP only supports a 256MB, 512MB, or 1GB window.
+			 * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit)
+			 */
+			dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
+					 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
+					 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		uart0: serial@40060000 {
 			compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";
 			reg = <0x40060000 0x400>;
Signature · 1 line
2.35.1
#19 lore raw

PATCH v5 5/6 ARM: dts: r9a06g032: Add USB PHY DT support

In reply to Herve Codina

Define the r9a06g032 generic part of the USB PHY device node.

---
 arch/arm/boot/dts/r9a06g032.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/r9a06g032.dtsi +6 -0
index 45944f849190..8cedc08ba3b9 100644
@@ -255,4 +255,10 @@ timer {
 			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 	};
+
+	usbphy: usb-phy {
+		#phy-cells = <0>;
+		compatible = "usb-nop-xceiv";
+		status = "disabled";
+	};
 };
Signature · 1 line
2.35.1
#20 lore raw

PATCH v5 6/6 ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY

In reply to Herve Codina

Describe the PCI USB devices that are behind the PCI bridge, adding necessary links to the USB PHY device.

---
 arch/arm/boot/dts/r9a06g032.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/r9a06g032.dtsi +12 -0
index 8cedc08ba3b9..db1e35381d9b 100644
@@ -121,6 +121,18 @@ pci_usb: pci@40030000 {
 			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
 					 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
 					 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+
+			usb@1,0 {
+				reg = <0x800 0 0 0 0>;
+				phys = <&usbphy>;
+				phy-names = "usb";
+			};
+
+			usb@2,0 {
+				reg = <0x1000 0 0 0 0>;
+				phys = <&usbphy>;
+				phy-names = "usb";
+			};
 		};
 
 		uart0: serial@40060000 {
Signature · 1 line
2.35.1