Add support for MediaTek AHCI SATA
Subsystems (3)
v2 cover Add support for MediaTek AHCI SATA
Hi,
This patch series add support for AHCI compatible SATA controller, and it is compliant with the ahci 1.3 and sata 3.0 specification. This driver is slightly different than ahci_platform.c (e.g., reset control, subsystem setting).
changes since v2:
- according to Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines"). replace devm_reset_control_get_optional() by devm_reset_control_get_optional_exclusive().
changes since v1:
- update binding text: add missing "specifier pairs" descriptions.
- fix kbuild test warning: fix the error handling.
Ryder Lee (2):
ata: mediatek: add support for MediaTek SATA controller
dt-bindings: ata: add DT bindings for MediaTek SATA controller
Documentation/devicetree/bindings/ata/ahci-mtk.txt | 50 ++++++ drivers/ata/Kconfig | 10 ++ drivers/ata/Makefile | 1 + drivers/ata/ahci_mtk.c | 196 +++++++++++++++++++++ 4 files changed, 257 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt create mode 100644 drivers/ata/ahci_mtk.c
Signature · 1 line
1.9.1
PATCH v2 1/2 ata: mediatek: add support for MediaTek SATA controller
This adds support the AHCI-compliant Serial ATA controller present on MediaTek SoCs.
--- drivers/ata/Kconfig | 10 +++ drivers/ata/Makefile | 1 + drivers/ata/ahci_mtk.c | 196 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 207 insertions(+) create mode 100644 drivers/ata/ahci_mtk.c
drivers/ata/Kconfig +10 -0
@@ -153,6 +153,16 @@ config AHCI_CEVA If unsure, say N. +config AHCI_MTK + tristate "MediaTek AHCI SATA support" + depends on ARCH_MEDIATEK + select MFD_SYSCON + help + This option enables support for the MediaTek SoC's + onboard AHCI SATA controller. + + If unsure, say N. + config AHCI_MVEBU tristate "Marvell EBU AHCI SATA support" depends on ARCH_MVEBU
drivers/ata/Makefile +1 -0
@@ -17,6 +17,7 @@ obj-$(CONFIG_AHCI_CEVA) += ahci_ceva.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_DA850) += ahci_da850.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_DM816) += ahci_dm816.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o +obj-$(CONFIG_AHCI_MTK) += ahci_mtk.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o libahci.o libahci_platform.o obj-$(CONFIG_AHCI_OCTEON) += ahci_octeon.o obj-$(CONFIG_AHCI_SUNXI) += ahci_sunxi.o libahci.o libahci_platform.o
drivers/ata/ahci_mtk.c new file +196 -0
196 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v2 2/2 dt-bindings: ata: add DT bindings for MediaTek SATA controller
In reply to Ryder LeeAdd DT bindings for the onboard SATA controller present on the MediaTek SoCs.
--- Documentation/devicetree/bindings/ata/ahci-mtk.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt
Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +50 -0
@@ -0,0 +1,50 @@ +MediaTek Seria ATA controller + +Required properties: + - compatible : Must be "mediatek,ahci". + - reg : Physical base addresses and length of register sets. + - interrupts : Interrupt associated with the SATA device. + - interrupt-names : Associated name must be: "hostc". + - clocks : A list of phandle and clock specifier pairs, one for each + entry in clock-names. + - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm". + - phys : A phandle and PHY specifier pair for the PHY port. + - phy-names : Associated name must be: "sata-phy". + - ports-implemented : Mask that indicates which ports that the HBA supports + are available for software to use. Useful if PORTS_IMPL + is not programmed by the BIOS, which is true with some + embedded SOC's. + +Optional properties: + - power-domains : A phandle and power domain specifier pair to the power + domain which is responsible for collapsing and restoring + power to the peripheral. + - resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names : Associated names must be: "axi", "sw", "reg". + - mediatek,phy-mode : A phandle to the system controller, used to enable + SATA function. + +Example: + + sata: sata@1a200000 { + compatible = "mediatek,ahci"; + reg = <0 0x1a200000 0 0x1100>; + interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hostc"; + clocks = <&pciesys CLK_SATA_AHB_EN>, + <&pciesys CLK_SATA_AXI_EN>, + <&pciesys CLK_SATA_ASIC_EN>, + <&pciesys CLK_SATA_RBC_EN>, + <&pciesys CLK_SATA_PM_EN>; + clock-names = "ahb", "axi", "asic", "rbc", "pm"; + phys = <&u3port1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; + resets = <&pciesys MT7622_SATA_AXI_BUS_RST>, + <&pciesys MT7622_SATA_PHY_SW_RST>, + <&pciesys MT7622_SATA_PHY_REG_RST>; + reset-names = "axi", "sw", "reg"; + mediatek,phy-mode = <&pciesys>; + };
Signature · 1 line
1.9.1
Rob Herring
maintainerRe: [PATCH v2 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller
Quoted 15 lines · Ryder Lee
Add DT bindings for the onboard SATA controller present on the MediaTek SoCs.
Signed-off-by Ryder Lee <[email protected]>--- Documentation/devicetree/bindings/ata/ahci-mtk.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txtDocumentation/devicetree/bindings/ata/ahci-mtk.txt new file +0
-0
Documentation/devicetree/bindings/ata/ahci-mtk.txt line 1
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Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +1
-0@@ -0,0 +1,50 @@ +MediaTek Seria ATA controller
s/Seria/Serial/
Documentation/devicetree/bindings/ata/ahci-mtk.txt line 4
Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +3
-0+ +Required properties: + - compatible : Must be "mediatek,ahci".
SoC specific compatible strings please.
Documentation/devicetree/bindings/ata/ahci-mtk.txt line 16
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Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +12
-0+ - reg : Physical base addresses and length of register sets. + - interrupts : Interrupt associated with the SATA device. + - interrupt-names : Associated name must be: "hostc". + - clocks : A list of phandle and clock specifier pairs, one for each + entry in clock-names. + - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm". + - phys : A phandle and PHY specifier pair for the PHY port. + - phy-names : Associated name must be: "sata-phy". + - ports-implemented : Mask that indicates which ports that the HBA supports + are available for software to use. Useful if PORTS_IMPL + is not programmed by the BIOS, which is true with some + embedded SOC's.
Do you have a variable number of ports and need this in DT? Because it looks like you only define having a single phy.
But this is a standard prop, so you can just say "see ./ahci-platform.txt"
Quoted 37 lines
Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +34
-0+ +Optional properties: + - power-domains : A phandle and power domain specifier pair to the power + domain which is responsible for collapsing and restoring + power to the peripheral. + - resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names : Associated names must be: "axi", "sw", "reg". + - mediatek,phy-mode : A phandle to the system controller, used to enable + SATA function. + +Example: + + sata: sata@1a200000 { + compatible = "mediatek,ahci"; + reg = <0 0x1a200000 0 0x1100>; + interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hostc"; + clocks = <&pciesys CLK_SATA_AHB_EN>, + <&pciesys CLK_SATA_AXI_EN>, + <&pciesys CLK_SATA_ASIC_EN>, + <&pciesys CLK_SATA_RBC_EN>, + <&pciesys CLK_SATA_PM_EN>; + clock-names = "ahb", "axi", "asic", "rbc", "pm"; + phys = <&u3port1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; + resets = <&pciesys MT7622_SATA_AXI_BUS_RST>, + <&pciesys MT7622_SATA_PHY_SW_RST>, + <&pciesys MT7622_SATA_PHY_REG_RST>; + reset-names = "axi", "sw", "reg"; + mediatek,phy-mode = <&pciesys>; + };Signature · 1 line
1.9.1
Re: [PATCH v2 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller
Quoted 10 lines · Rob Herring
Quoted 9 lines · Ryder Lee
Add DT bindings for the onboard SATA controller present on the MediaTek SoCs.
Signed-off-by Ryder Lee <[email protected]>--- Documentation/devicetree/bindings/ata/ahci-mtk.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/ahci-mtk.txt
Quoted 9 lines
Documentation/devicetree/bindings/ata/ahci-mtk.txt line 1
Quoted 7 lines
Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +1
-0@@ -0,0 +1,50 @@ +MediaTek Seria ATA controllers/Seria/Serial/
Okay.
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Documentation/devicetree/bindings/ata/ahci-mtk.txt line 4
Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +3
-0+ +Required properties: + - compatible : Must be "mediatek,ahci".SoC specific compatible strings please.
Okay.
Quoted 7 lines
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Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +7
-0+ - reg : Physical base addresses and length of register sets. + - interrupts : Interrupt associated with the SATA device. + - interrupt-names : Associated name must be: "hostc". + - clocks : A list of phandle and clock specifier pairs, one for each + entry in clock-names. + - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm". + - phys : A phandle and PHY specifier pair for the PHY port.
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Documentation/devicetree/bindings/ata/ahci-mtk.txt line 16
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Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +5
-0+ - phy-names : Associated name must be: "sata-phy". + - ports-implemented : Mask that indicates which ports that the HBA supports + are available for software to use. Useful if PORTS_IMPL + is not programmed by the BIOS, which is true with some + embedded SOC's.Do you have a variable number of ports and need this in DT? Because it looks like you only define having a single phy.
We use this property to set PORTS_IMPL register value to 0x1, or there is no available port for use.
Quoted 2 lines
But this is a standard prop, so you can just say "see ./ahci-platform.txt"
Okay.
Quoted 37 lines
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Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +34
-0+ +Optional properties: + - power-domains : A phandle and power domain specifier pair to the power + domain which is responsible for collapsing and restoring + power to the peripheral. + - resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details. + - reset-names : Associated names must be: "axi", "sw", "reg". + - mediatek,phy-mode : A phandle to the system controller, used to enable + SATA function. + +Example: + + sata: sata@1a200000 { + compatible = "mediatek,ahci"; + reg = <0 0x1a200000 0 0x1100>; + interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hostc"; + clocks = <&pciesys CLK_SATA_AHB_EN>, + <&pciesys CLK_SATA_AXI_EN>, + <&pciesys CLK_SATA_ASIC_EN>, + <&pciesys CLK_SATA_RBC_EN>, + <&pciesys CLK_SATA_PM_EN>; + clock-names = "ahb", "axi", "asic", "rbc", "pm"; + phys = <&u3port1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; + resets = <&pciesys MT7622_SATA_AXI_BUS_RST>, + <&pciesys MT7622_SATA_PHY_SW_RST>, + <&pciesys MT7622_SATA_PHY_REG_RST>; + reset-names = "axi", "sw", "reg"; + mediatek,phy-mode = <&pciesys>; + };Signature · 1 line
1.9.1
Re: [PATCH v2 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller
Hi Rob,
Sorry for the noise letter.
Quoted 6 lines · Ryder Lee
Quoted 4 lines
Quoted 2 lines
+Required properties:
+ - compatible : Must be "mediatek,ahci".SoC specific compatible strings please.
Okay.
I took a look at ./ahci-platform.txt. Could we just add a generic compatible string as below:
compatible: Must be "mediatek,soc-model-ahci", "mediatek,mtk-ahci"
In doing so, we can avoid having an endless list of compatibles for those MTK SoCs with the same IP block.
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Documentation/devicetree/bindings/ata/ahci-mtk.txt new file +7
-0+ +Optional properties: + - power-domains : A phandle and power domain specifier pair to the power + domain which is responsible for collapsing and restoring + power to the peripheral. + - resets : Must contain an entry for each entry in reset-names. + See ../reset/reset.txt for details.
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Documentation/devicetree/bindings/ata/ahci-mtk.txt line 31
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+ - reset-names : Associated names must be: "axi", "sw", "reg".
+ - mediatek,phy-mode : A phandle to the system controller, used to enableDocumentation/devicetree/bindings/ata/ahci-mtk.txt new file +6
-0+ SATA function. + +Example: + + sata: sata@1a200000 { + compatible = "mediatek,ahci";
MT7622 should be:
compatible = "mediatek,mt7622-ahci",
"mediatek,mtk-ahci";Ryder