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riscv: sophgo: add clock support for sg2042

PATCH Superseded Chen Wang 4 participants 11 messages Dec 7, 2023 – Dec 9, 2023

Subsystems (4)
Device tree bindings Common clk RISC-V Sophgo devicetrees and drivers

v5 of 16 Superseded Latest is v16 →

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Chen Wang

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#0 lore raw

v5 cover riscv: sophgo: add clock support for sg2042

From: Chen Wang <[email protected]>

This series adds clock controller support for sophgo sg2042.

Thanks,
Chen

---

Changes in v5:
The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [6].
- dt-bindings: improved yaml, such as:
- add vendor prefix for system-ctrl property for clock generator.
- Add explanation for system-ctrl property.
- move sophgo,sg2042-clkgen.yaml to directly under clock folder.
- fixed bugs for driver Makefile/Kconfig
- continue cleaning-up debug print for driver code.

Changes in v4:
The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [5].
- dt-bindings: fixed a dt_binding_check error.

Changes in v3:
The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [3].
- DTS: don't use syscon but define sg2042 specific system control node. More background info can read [4].
- Updating minor issues in dt-bindings as per input from reviews.

Changes in v2:
The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [2].
- Squashed the patch adding clock definitions with the patch adding the binding for the clock controller.
- Updating dt-binding for syscon, remove oneOf for property compatible; define clock controller as child of syscon.
- DTS changes: merge sg2042-clock.dtsi into sg2042.dtsi; move clock-frequency property of osc to board devicethree due to the oscillator is outside the SoC.
- Fixed some bugs in driver code during testing, including removing warnings for rv32_defconfig.
- Updated MAINTAINERS info.

Changes in v1:
The patch series is based on v6.7-rc1. You can simply review or test the patches at the link [1].

Link https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v1 [1]
Link https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v2 [2]
Link https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v3 [3]
Link https://lore.kernel.org/linux-riscv/MA0P287MB03329AE180378E1A2E034374FE82A@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM/ [4] open here
Link https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v4 [5]
Link https://github.com/unicornx/linux-riscv/commits/upstream-sg2042-clock-v5 [6]

---

Chen Wang (4):
dt-bindings: soc: sophgo: Add Sophgo system control module
dt-bindings: clock: sophgo: support SG2042
clk: sophgo: Add SG2042 clock generator driver
riscv: dts: add clock generator for Sophgo SG2042 SoC

 .../bindings/clock/sophgo,sg2042-clkgen.yaml  |   53 +
 .../soc/sophgo/sophgo,sg2042-sysctrl.yaml     |   34 +
 MAINTAINERS                                   |    7 +
 .../boot/dts/sophgo/sg2042-milkv-pioneer.dts  |    4 +
 arch/riscv/boot/dts/sophgo/sg2042.dtsi        |   79 +
 drivers/clk/Kconfig                           |    1 +
 drivers/clk/Makefile                          |    1 +
 drivers/clk/sophgo/Kconfig                    |    8 +
 drivers/clk/sophgo/Makefile                   |    2 +
 drivers/clk/sophgo/clk-sophgo-sg2042.c        | 1355 +++++++++++++++++
 drivers/clk/sophgo/clk-sophgo-sg2042.h        |  226 +++
 .../dt-bindings/clock/sophgo,sg2042-clkgen.h  |  169 ++
 12 files changed, 1939 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml
 create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml
 create mode 100644 drivers/clk/sophgo/Kconfig
 create mode 100644 drivers/clk/sophgo/Makefile
 create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.c
 create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.h
 create mode 100644 include/dt-bindings/clock/sophgo,sg2042-clkgen.h

base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86

Signature · 1 line
2.25.1
author
#1 lore raw

PATCH v5 1/4 dt-bindings: soc: sophgo: Add Sophgo system control module

From: Chen Wang <[email protected]>

Add documentation to describe Sophgo System Controller for SG2042.

Signed-off-by Chen Wang <[email protected]>
Reviewed-by Krzysztof Kozlowski <[email protected]>
---
 .../soc/sophgo/sophgo,sg2042-sysctrl.yaml     | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml
Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml new file +34 -0
new file mode 100644
index 000000000000..1ec1eaa55598
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-sysctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2042 SoC system controller
+
+maintainers:
+  - Chen Wang <[email protected]>
+
+description:
+  The Sophgo SG2042 SoC system controller provides register information such
+  as offset, mask and shift that can be used by other modules, such as clocks.
+
+properties:
+  compatible:
+    const: sophgo,sg2042-sysctrl
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    system-controller@30010000 {
+        compatible = "sophgo,sg2042-sysctrl";
+        reg = <0x30010000 0x1000>;
+    };
Signature · 1 line
2.25.1
author
#2 lore raw

PATCH v5 2/4 dt-bindings: clock: sophgo: support SG2042

In reply to Chen Wang

From: Chen Wang <[email protected]>

Add bindings for the clock generator on the SG2042 RISC-V SoC.

Signed-off-by Chen Wang <[email protected]>
---
 .../bindings/clock/sophgo,sg2042-clkgen.yaml  |  53 ++++++
 .../dt-bindings/clock/sophgo,sg2042-clkgen.h  | 169 ++++++++++++++++++
 2 files changed, 222 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml
 create mode 100644 include/dt-bindings/clock/sophgo,sg2042-clkgen.h
Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml new file +53 -0
new file mode 100644
index 000000000000..f9935e66fc95
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/sophgo,sg2042-clkgen.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sophgo SG2042 Clock Generator
+
+maintainers:
+  - Chen Wang <[email protected]>
+
+properties:
+  compatible:
+    const: sophgo,sg2042-clkgen
+
+  reg:
+    maxItems: 1
+
+  sophgo,system-ctrl:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to SG2042 System Controller node. On SG2042, part of control
+      registers of Clock Controller are defined in System controller. Clock
+      driver will use this phandle to get the register map base to plus the
+      offset of the registers to access them.
+
+  clocks:
+    items:
+      - description: Clock Generation IC (25 MHz)
+
+  '#clock-cells':
+    const: 1
+    description:
+      See <dt-bindings/clock/sophgo,sg2042-clkgen.h> for valid indices.
+
+required:
+  - compatible
+  - reg
+  - sophgo,system-ctrl
+  - clocks
+  - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller@30012000 {
+        compatible = "sophgo,sg2042-clkgen";
+        reg = <0x30012000 0x1000>;
+        sophgo,system-ctrl = <&sys_ctrl>;
+        clocks = <&cgi>;
+        #clock-cells = <1>;
+    };
include/dt-bindings/clock/sophgo,sg2042-clkgen.h new file +169 -0

169 lines not on this page · raw message

Signature · 1 line
2.25.1
author
#3 lore raw

PATCH v5 3/4 clk: sophgo: Add SG2042 clock generator driver

In reply to Chen Wang

From: Chen Wang <[email protected]>

Add a driver for the SOPHGO SG2042 clock generator.

Signed-off-by Chen Wang <[email protected]>
---
 MAINTAINERS                            |    7 +
 drivers/clk/Kconfig                    |    1 +
 drivers/clk/Makefile                   |    1 +
 drivers/clk/sophgo/Kconfig             |    8 +
 drivers/clk/sophgo/Makefile            |    2 +
 drivers/clk/sophgo/clk-sophgo-sg2042.c | 1355 ++++++++++++++++++++++++
 drivers/clk/sophgo/clk-sophgo-sg2042.h |  226 ++++
 7 files changed, 1600 insertions(+)
 create mode 100644 drivers/clk/sophgo/Kconfig
 create mode 100644 drivers/clk/sophgo/Makefile
 create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.c
 create mode 100644 drivers/clk/sophgo/clk-sophgo-sg2042.h
MAINTAINERS +7 -0
index 97f51d5ec1cf..c9c75468f2cb 100644
@@ -20269,6 +20269,13 @@ S:	Maintained
 F:	arch/riscv/boot/dts/sophgo/
 F:	Documentation/devicetree/bindings/riscv/sophgo.yaml
 
+SOPHGO CLOCK DRIVER
+M:	Chen Wang <[email protected]>
+S:	Maintained
+F:	Documentation/devicetree/bindings/clock/sophgo/
+F:	drivers/clk/sophgo/
+F:	include/dt-bindings/clock/sophgo,sg2042-clkgen.h
+
 SOUND
 M:	Jaroslav Kysela <[email protected]>
 M:	Takashi Iwai <[email protected]>
drivers/clk/Kconfig +1 -0
index c30d0d396f7a..514343934fda 100644
@@ -499,6 +499,7 @@ source "drivers/clk/rockchip/Kconfig"
 source "drivers/clk/samsung/Kconfig"
 source "drivers/clk/sifive/Kconfig"
 source "drivers/clk/socfpga/Kconfig"
+source "drivers/clk/sophgo/Kconfig"
 source "drivers/clk/sprd/Kconfig"
 source "drivers/clk/starfive/Kconfig"
 source "drivers/clk/sunxi/Kconfig"
drivers/clk/Makefile +1 -0
index ed71f2e0ee36..eeae7ae93f89 100644
@@ -119,6 +119,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
 obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
 obj-$(CONFIG_CLK_SIFIVE)		+= sifive/
 obj-y					+= socfpga/
+obj-y					+= sophgo/
 obj-$(CONFIG_PLAT_SPEAR)		+= spear/
 obj-y					+= sprd/
 obj-$(CONFIG_ARCH_STI)			+= st/
drivers/clk/sophgo/Kconfig new file +8 -0
new file mode 100644
index 000000000000..feab0b805a29
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config CLK_SOPHGO_SG2042
+	bool "Sophgo SG2042 clock support"
+	depends on ARCH_SOPHGO || COMPILE_TEST
+	default y
+	help
+	  Say yes here to support the clock controller on the Sophgo SG2042 SoC.
drivers/clk/sophgo/Makefile new file +2 -0
new file mode 100644
index 000000000000..13834cce260c
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_CLK_SOPHGO_SG2042)	+= clk-sophgo-sg2042.o
drivers/clk/sophgo/clk-sophgo-sg2042.c new file +1355 -0

1,355 lines not on this page · raw message

drivers/clk/sophgo/clk-sophgo-sg2042.h new file +226 -0

226 lines not on this page · raw message

Signature · 1 line
2.25.1
build bot
#4 lore raw

Re: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver

kernel test robot noticed the following build errors:

Hi Chen,

kernel test robot noticed the following build errors:

[auto build test ERROR on b85ea95d086471afb4ad062012a4d73cd328fa86]

url:    https://github.com/intel-lab-lkp/linux/commits/Chen-Wang/dt-bindings-soc-sophgo-Add-Sophgo-system-control-module/20231207-165948
base:   b85ea95d086471afb4ad062012a4d73cd328fa86
patch link:    https://lore.kernel.org/r/975f9995584dfa8af751e96a1f4d2c7991551a35.1701938395.git.unicorn_wang%40outlook.com
patch subject: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver
config: i386-buildonly-randconfig-002-20231208 (https://download.01.org/0day-ci/archive/20231208/[email protected]/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231208/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:13: error: call to undeclared function 'kzalloc'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
           clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
                      ^
   drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:13: note: did you mean 'vzalloc'?
   include/linux/vmalloc.h:141:14: note: 'vzalloc' declared here
   extern void *vzalloc(unsigned long size) __alloc_size(1);
                ^
>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:11: error: incompatible integer to pointer conversion assigning to 'struct sg2042_clk_data *' from 'int' [-Wint-conversion]
           clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
                    ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1293:2: error: call to undeclared function 'kfree'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
           kfree(clk_data);
           ^
   drivers/clk/sophgo/clk-sophgo-sg2042.c:1349:2: error: call to undeclared function 'kfree'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
           kfree(clk_data);
           ^

4 errors generated.

vim +/kzalloc +1273 drivers/clk/sophgo/clk-sophgo-sg2042.c

1256
1257 static int __init sg2042_clk_init_clk_data(
1258 struct device_node *node,
1259 int num_clks,
1260 struct sg2042_clk_data **pp_clk_data)
1261 {
1262 int ret = 0;
1263 struct sg2042_clk_data *clk_data = NULL;
1264 struct device_node *np_syscon;
1265
1266 np_syscon = of_parse_phandle(node, "sophgo,system-ctrl", 0);
1267 if (!np_syscon) {
1268 pr_err("failed to get system-ctrl node\n");
1269 ret = -EINVAL;
1270 goto error_out;
1271 }
1272

> 1273		clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
  1274		if (!clk_data) {
  1275			ret = -ENOMEM;
  1276			goto error_out;
  1277		}
  1278	
  1279		clk_data->regmap_syscon = device_node_to_regmap(np_syscon);
  1280		if (IS_ERR_OR_NULL(clk_data->regmap_syscon)) {
  1281			pr_err("cannot get regmap_syscon %ld\n", PTR_ERR(clk_data->regmap_syscon));
  1282			ret = -ENODEV;
  1283			goto cleanup;
  1284		}
  1285		clk_data->iobase_syscon = of_iomap(np_syscon, 0);
  1286		clk_data->iobase = of_iomap(node, 0);
  1287		clk_data->onecell_data.num = num_clks;
  1288	
  1289		*pp_clk_data = clk_data;
  1290		return ret;
  1291	
  1292	cleanup:
> 1293		kfree(clk_data);

1294
1295 error_out:
1296 return ret;
1297 }
1298

Signature · 2 lines
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
build bot
#5 lore raw

Re: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver

In reply to Chen Wang
kernel test robot noticed the following build errors:

Hi Chen,

kernel test robot noticed the following build errors:

[auto build test ERROR on b85ea95d086471afb4ad062012a4d73cd328fa86]

url:    https://github.com/intel-lab-lkp/linux/commits/Chen-Wang/dt-bindings-soc-sophgo-Add-Sophgo-system-control-module/20231207-165948
base:   b85ea95d086471afb4ad062012a4d73cd328fa86
patch link:    https://lore.kernel.org/r/975f9995584dfa8af751e96a1f4d2c7991551a35.1701938395.git.unicorn_wang%40outlook.com
patch subject: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver
config: arc-randconfig-002-20231208 (https://download.01.org/0day-ci/archive/20231208/[email protected]/config)
compiler: arc-elf-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231208/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All error/warnings (new ones prefixed by >>):

drivers/clk/sophgo/clk-sophgo-sg2042.c: In function 'sg2042_clk_init_clk_data':

>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:20: error: implicit declaration of function 'kzalloc'; did you mean 'vzalloc'? [-Werror=implicit-function-declaration]
    1273 |         clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
         |                    ^~~~~~~
         |                    vzalloc
>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:18: warning: assignment to 'struct sg2042_clk_data *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
    1273 |         clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
         |                  ^
>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1293:9: error: implicit declaration of function 'kfree'; did you mean 'vfree'? [-Werror=implicit-function-declaration]
    1293 |         kfree(clk_data);
         |         ^~~~~
         |         vfree

cc1: some warnings being treated as errors

vim +1273 drivers/clk/sophgo/clk-sophgo-sg2042.c

1256
1257 static int __init sg2042_clk_init_clk_data(
1258 struct device_node *node,
1259 int num_clks,
1260 struct sg2042_clk_data **pp_clk_data)
1261 {
1262 int ret = 0;
1263 struct sg2042_clk_data *clk_data = NULL;
1264 struct device_node *np_syscon;
1265
1266 np_syscon = of_parse_phandle(node, "sophgo,system-ctrl", 0);
1267 if (!np_syscon) {
1268 pr_err("failed to get system-ctrl node\n");
1269 ret = -EINVAL;
1270 goto error_out;
1271 }
1272

> 1273		clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
  1274		if (!clk_data) {
  1275			ret = -ENOMEM;
  1276			goto error_out;
  1277		}
  1278	
  1279		clk_data->regmap_syscon = device_node_to_regmap(np_syscon);
  1280		if (IS_ERR_OR_NULL(clk_data->regmap_syscon)) {
  1281			pr_err("cannot get regmap_syscon %ld\n", PTR_ERR(clk_data->regmap_syscon));
  1282			ret = -ENODEV;
  1283			goto cleanup;
  1284		}
  1285		clk_data->iobase_syscon = of_iomap(np_syscon, 0);
  1286		clk_data->iobase = of_iomap(node, 0);
  1287		clk_data->onecell_data.num = num_clks;
  1288	
  1289		*pp_clk_data = clk_data;
  1290		return ret;
  1291	
  1292	cleanup:
> 1293		kfree(clk_data);

1294
1295 error_out:
1296 return ret;
1297 }
1298

Signature · 2 lines
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
build bot
#6 lore raw

Re: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver

In reply to Chen Wang
kernel test robot noticed the following build warnings:

Hi Chen,

kernel test robot noticed the following build warnings:

[auto build test WARNING on b85ea95d086471afb4ad062012a4d73cd328fa86]

url:    https://github.com/intel-lab-lkp/linux/commits/Chen-Wang/dt-bindings-soc-sophgo-Add-Sophgo-system-control-module/20231207-165948
base:   b85ea95d086471afb4ad062012a4d73cd328fa86
patch link:    https://lore.kernel.org/r/975f9995584dfa8af751e96a1f4d2c7991551a35.1701938395.git.unicorn_wang%40outlook.com
patch subject: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver
config: arm-randconfig-003-20231208 (https://download.01.org/0day-ci/archive/20231208/[email protected]/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project.git f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231208/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All warnings (new ones prefixed by >>):

drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:13: error: implicit declaration of function 'kzalloc' is invalid in C99 [-Werror,-Wimplicit-function-declaration]

           clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
                      ^
   drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:13: note: did you mean 'vzalloc'?
   include/linux/vmalloc.h:141:14: note: 'vzalloc' declared here
   extern void *vzalloc(unsigned long size) __alloc_size(1);
                ^
>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1273:11: warning: incompatible integer to pointer conversion assigning to 'struct sg2042_clk_data *' from 'int' [-Wint-conversion]
           clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);
                    ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/sophgo/clk-sophgo-sg2042.c:1293:2: error: implicit declaration of function 'kfree' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
           kfree(clk_data);
           ^
   drivers/clk/sophgo/clk-sophgo-sg2042.c:1349:2: error: implicit declaration of function 'kfree' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
           kfree(clk_data);
           ^

1 warning and 3 errors generated.

vim +1273 drivers/clk/sophgo/clk-sophgo-sg2042.c

1256
1257 static int __init sg2042_clk_init_clk_data(
1258 struct device_node *node,
1259 int num_clks,
1260 struct sg2042_clk_data **pp_clk_data)
1261 {
1262 int ret = 0;
1263 struct sg2042_clk_data *clk_data = NULL;
1264 struct device_node *np_syscon;
1265
1266 np_syscon = of_parse_phandle(node, "sophgo,system-ctrl", 0);
1267 if (!np_syscon) {
1268 pr_err("failed to get system-ctrl node\n");
1269 ret = -EINVAL;
1270 goto error_out;
1271 }
1272

> 1273		clk_data = kzalloc(struct_size(clk_data, onecell_data.hws, num_clks), GFP_KERNEL);

1274 if (!clk_data) {
1275 ret = -ENOMEM;
1276 goto error_out;
1277 }
1278
1279 clk_data->regmap_syscon = device_node_to_regmap(np_syscon);
1280 if (IS_ERR_OR_NULL(clk_data->regmap_syscon)) {
1281 pr_err("cannot get regmap_syscon %ld\n", PTR_ERR(clk_data->regmap_syscon));
1282 ret = -ENODEV;
1283 goto cleanup;
1284 }
1285 clk_data->iobase_syscon = of_iomap(np_syscon, 0);
1286 clk_data->iobase = of_iomap(node, 0);
1287 clk_data->onecell_data.num = num_clks;
1288
1289 *pp_clk_data = clk_data;
1290 return ret;
1291
1292 cleanup:
1293 kfree(clk_data);
1294
1295 error_out:
1296 return ret;
1297 }
1298

Signature · 2 lines
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
build bot
#7 lore raw

Re: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver

In reply to Chen Wang
kernel test robot noticed the following build warnings:

Hi Chen,

kernel test robot noticed the following build warnings:

[auto build test WARNING on b85ea95d086471afb4ad062012a4d73cd328fa86]

url:    https://github.com/intel-lab-lkp/linux/commits/Chen-Wang/dt-bindings-soc-sophgo-Add-Sophgo-system-control-module/20231207-165948
base:   b85ea95d086471afb4ad062012a4d73cd328fa86
patch link:    https://lore.kernel.org/r/975f9995584dfa8af751e96a1f4d2c7991551a35.1701938395.git.unicorn_wang%40outlook.com
patch subject: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver
config: riscv-randconfig-r113-20231208 (https://download.01.org/0day-ci/archive/20231208/[email protected]/config)
compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a)
reproduce: (https://download.01.org/0day-ci/archive/20231208/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

sparse warnings: (new ones prefixed by >>)
WARNING: invalid argument to '-march': '_zihintpause'

>> drivers/clk/sophgo/clk-sophgo-sg2042.c:1037:1: sparse: sparse: symbol 'sg2042_clk_lock' was not declared. Should it be static?

drivers/clk/sophgo/clk-sophgo-sg2042.c: note: in included file (through include/linux/mmzone.h, include/linux/gfp.h, include/linux/xarray.h, ...):
include/linux/page-flags.h:242:46: sparse: sparse: self-comparison always evaluates to false

vim +/sg2042_clk_lock +1037 drivers/clk/sophgo/clk-sophgo-sg2042.c

1036

> 1037	DEFINE_SPINLOCK(sg2042_clk_lock);

1038

Signature · 2 lines
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
#9 lore raw

Re: [PATCH v5 3/4] clk: sophgo: Add SG2042 clock generator driver

Quoted 8 lines · Krzysztof Kozlowski
Quoted 5 lines · Chen Wang

From: Chen Wang <[email protected]>

Add a driver for the SOPHGO SG2042 clock generator.

Signed-off-by Chen Wang <[email protected]>

Your driver still at v5 has so many build issues... please be sure there are no new warnings reported.

Yes, I also noticed these build issues and had a quick fix with v6, please review v6. Sorry for the confusion.

Quoted 3 lines

Best regards,
Krzysztof

author
#10 lore raw

PATCH v5 4/4 riscv: dts: add clock generator for Sophgo SG2042 SoC

In reply to Chen Wang

From: Chen Wang <[email protected]>

Add clock generator node to device tree for SG2042, and enable clock for uart.

Signed-off-by Chen Wang <[email protected]>
---
 .../boot/dts/sophgo/sg2042-milkv-pioneer.dts  |  4 +
 arch/riscv/boot/dts/sophgo/sg2042.dtsi        | 79 +++++++++++++++++++
 2 files changed, 83 insertions(+)
arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts +4 -0
index 49b4b9c2c101..0b3b3b2b0c64 100644
@@ -14,6 +14,10 @@ chosen {
 	};
 };
 
+&cgi {
+	clock-frequency = <25000000>;
+};
+
 &uart0 {
 	status = "okay";
 };
arch/riscv/boot/dts/sophgo/sg2042.dtsi +79 -0

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Signature · 1 line
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