Update the Netduino 2 Machine
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v8 Latest8 patches 4 repliesIn review
- v78 patches 2 repliesSuperseded
- v66 of 8 patches 2 repliesSuperseded
Earlier versions · 5
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v5 | 6 of 8 patches | 3 replies | Superseded | |
| v4 | 6 of 8 patches | 6 replies | Superseded | |
| v3 | 6 of 7 patches | 7 replies | Superseded | |
| v2 | 5 of 7 patches | 1 reply | Superseded | |
| v1 | 7 patches | 15 replies | Superseded |
Changes in v8 from the cover letter
- Use the qdev_init_gpio_in() function to create in irqs for the OR device.
Patches in v8 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/8 | STM32F205: Remove the individual device variableshw/ | +17 | 0 replies | |
| 2/8 | STM32F2xx: Display PWM duty cycle from timerhw/ | +9 | 0 replies | |
| 3/8 | STM32F2xx: Add the ADC devicedefault-configs/ hw/ hw/ +2 more | +396 | 0 replies | |
| 4/8 | STM32F2xx: Add the SPI devicedefault-configs/ hw/ hw/ +1 more | +299 | 0 replies | |
| 5/8 | irq: Add a new irq device that allows the ORing of lineshw/ hw/ include/ | +152 | 2 replies | |
| 6/8 | STM32F205: Connect the ADC deviceshw/ include/ | +41 | 2 replies | |
| 7/8 | STM32F205: Connect the SPI deviceshw/ include/ | +25 | 0 replies | |
| 8/8 | MAINTAINERS: Add Alistair to the maintainers listMAINTAINERS | +15 | 0 replies |
Reviews trailers per patch
7 of 8 patches have a Reviewed-by or Acked-by.
| Patch | Peter Crosthwaite | Peter Maydell |
|---|---|---|
| 1/8 | R-b | |
| 2/8 | R-b | |
| 3/8 | R-b | |
| 4/8 | R-b | |
| 5/8 | R-b | |
| 6/8 | ||
| 7/8 | R-b | |
| 8/8 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [Qemu-devel] [PATCH v8 0/8] Update the Netduino 2 Machine
This patchset continues with the Netduino 2 and STM32F205 SoC work.
This patch series makes a small change to the STM32F2xx SoC to tidy up the code.
Next a feature is added to the STM32F2xx timer to display the PWM duty cycle, when debugging is enabled.
Then the STM32F2xx SPI and ADC devices are added and connected to the STM32F205 SoC.
Finally the maintainers file is updated to add myself as the maintainer for the Netdunio 2 and STM32F2xx.
V8:
- Use the qdev_init_gpio_in() function to create in irqs for the OR device.
V6:
- Add vmstate to the new OR IRQ device
V5:
- Add a irq ORing function
V4:
- Add VMState to the new devices
- Remove rand() function
V3:
- Rebase
V2:
- Update based on Peter C's coments
- Rebase
- Create an ADC folder for the ADC device
Alistair Francis (8):
STM32F205: Remove the individual device variables
STM32F2xx: Display PWM duty cycle from timer
STM32F2xx: Add the ADC device
STM32F2xx: Add the SPI device
irq: Add a new irq device that allows the ORing of lines
STM32F205: Connect the ADC devices
STM32F205: Connect the SPI devices
MAINTAINERS: Add Alistair to the maintainers list
MAINTAINERS | 15 ++ default-configs/arm-softmmu.mak | 2 + hw/Makefile.objs | 1 + hw/adc/Makefile.objs | 1 + hw/adc/stm32f2xx_adc.c | 306 ++++++++++++++++++++++++++++++++++++++++ hw/arm/stm32f205_soc.c | 92 +++++++++--- hw/core/Makefile.objs | 1 + hw/core/or-irq.c | 107 ++++++++++++++ hw/ssi/Makefile.objs | 1 + hw/ssi/stm32f2xx_spi.c | 225 +++++++++++++++++++++++++++++ hw/timer/stm32f2xx_timer.c | 9 ++ include/hw/adc/stm32f2xx_adc.h | 87 ++++++++++++ include/hw/arm/stm32f205_soc.h | 9 ++ include/hw/or-irq.h | 44 ++++++ include/hw/ssi/stm32f2xx_spi.h | 72 ++++++++++ 15 files changed, 954 insertions(+), 18 deletions(-) create mode 100644 hw/adc/Makefile.objs create mode 100644 hw/adc/stm32f2xx_adc.c create mode 100644 hw/core/or-irq.c create mode 100644 hw/ssi/stm32f2xx_spi.c create mode 100644 include/hw/adc/stm32f2xx_adc.h create mode 100644 include/hw/or-irq.h create mode 100644 include/hw/ssi/stm32f2xx_spi.h
Signature · 1 line
2.7.4