Re-introduce TX FIFO resize for larger EP bursting
Subsystems (5)
v8 cover Re-introduce TX FIFO resize for larger EP bursting
Changes in V8:
- Rebased to usb-testing
- Using devm_kzalloc for adding txfifo property in dwc3-qcom
- Removed DWC3 QCOM ACPI property for enabling the txfifo resize
Changes in V7:
- Added a new property tx-fifo-max-num for limiting how much fifo space the resizing logic can allocate for endpoints with large burst values. This can differ across platforms, and tie in closely with overall system latency.
- Added recommended checks for DWC32.
- Added changes to set the tx-fifo-resize property from dwc3-qcom by default instead of modifying the current DTSI files.
- Added comments on all APIs/variables introduced.
- Updated the DWC3 YAML to include a better description of the tx-fifo-resize property and added an entry for tx-fifo-max-num.
Changes in V6:
- Rebased patches to usb-testing.
- Renamed to PATCH series instead of RFC.
- Checking for fs_descriptors instead of ss_descriptors for determining the endpoint count for a particular configuration.
- Re-ordered patch series to fix patch dependencies.
Changes in V5:
- Added check_config() logic, which is used to communicate the number of EPs used in a particular configuration. Based on this, the DWC3 gadget driver has the ability to know the maximum number of eps utilized in all configs. This helps reduce unnecessary allocation to unused eps, and will catch fifo allocation issues at bind() time.
- Fixed variable declaration to single line per variable, and reverse xmas.
- Created a helper for fifo clearing, which is used by ep0.c
Changes in V4:
- Removed struct dwc3* as an argument for dwc3_gadget_resize_tx_fifos()
- Removed WARN_ON(1) in case we run out of fifo space
Changes in V3:
- Removed "Reviewed-by" tags
- Renamed series back to RFC
- Modified logic to ensure that fifo_size is reset if we pass the minimum threshold. Tested with binding multiple FDs requesting 6 FIFOs.
Changes in V2:
- Modified TXFIFO resizing logic to ensure that each EP is reserved a FIFO.
- Removed dev_dbg() prints and fixed typos from patches
- Added some more description on the dt-bindings commit message
Currently, there is no functionality to allow for resizing the TXFIFOs, and relying on the HW default setting for the TXFIFO depth. In most cases, the HW default is probably sufficient, but for USB compositions that contain multiple functions that require EP bursting, the default settings might not be enough. Also to note, the current SW will assign an EP to a function driver w/o checking to see if the TXFIFO size for that particular EP is large enough. (this is a problem if there are multiple HW defined values for the TXFIFO size)
It is mentioned in the SNPS databook that a minimum of TX FIFO depth = 3 is required for an EP that supports bursting. Otherwise, there may be frequent occurences of bursts ending. For high bandwidth functions, such as data tethering (protocols that support data aggregation), mass storage, and media transfer protocol (over FFS), the bMaxBurst value can be large, and a bigger TXFIFO depth may prove to be beneficial in terms of USB throughput. (which can be associated to system access latency, etc...) It allows for a more consistent burst of traffic, w/o any interruptions, as data is readily available in the FIFO.
With testing done using the mass storage function driver, the results show that with a larger TXFIFO depth, the bandwidth increased significantly.
Test Parameters:
- Platform: Qualcomm SM8150
- bMaxBurst = 6
- USB req size = 256kB
- Num of USB reqs = 16
- USB Speed = Super-Speed
- Function Driver: Mass Storage (w/ ramdisk)
- Test Application: CrystalDiskMark
Results:
TXFIFO Depth = 3 max packets
Test Case | Data Size | AVG tput (in MB/s)
-------------------------------------------
Sequential|1 GB x |
Read |9 loops | 193.60
| | 195.86
| | 184.77
| | 193.60-------------------------------------------
TXFIFO Depth = 6 max packets
Test Case | Data Size | AVG tput (in MB/s)
-------------------------------------------
Sequential|1 GB x |
Read |9 loops | 287.35
| | 304.94
| | 289.64
| | 293.61-------------------------------------------
Wesley Cheng (5):
usb: gadget: udc: core: Introduce check_config to verify USB
configuration
usb: gadget: configfs: Check USB configuration before adding
usb: dwc3: Resize TX FIFOs to meet EP bursting requirements
usb: dwc3: dwc3-qcom: Enable tx-fifo-resize property by default
arm64: boot: dts: qcom: sm8150: Enable dynamic TX FIFO resize logic
arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + drivers/usb/dwc3/core.c | 9 ++ drivers/usb/dwc3/core.h | 15 +++ drivers/usb/dwc3/dwc3-qcom.c | 9 ++ drivers/usb/dwc3/ep0.c | 2 + drivers/usb/dwc3/gadget.c | 212 +++++++++++++++++++++++++++++++++++ drivers/usb/gadget/configfs.c | 22 ++++ drivers/usb/gadget/udc/core.c | 25 +++++ include/linux/usb/gadget.h | 5 + 9 files changed, 300 insertions(+)
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 1/5 usb: gadget: udc: core: Introduce check_config to verify USB configuration
Some UDCs may have constraints on how many high bandwidth endpoints it can support in a certain configuration. This API allows for the composite driver to pass down the total number of endpoints to the UDC so it can verify it has the required resources to support the configuration.
--- drivers/usb/gadget/udc/core.c | 25 +++++++++++++++++++++++++ include/linux/usb/gadget.h | 5 +++++ 2 files changed, 30 insertions(+)
drivers/usb/gadget/udc/core.c +25 -0
@@ -1003,6 +1003,31 @@ int usb_gadget_ep_match_desc(struct usb_gadget *gadget, }EXPORT_SYMBOL_GPL (usb_gadget_ep_match_desc); +/** +* usb_gadget_check_config - checks if the UDC can support the number of eps +* @gadget: controller to check the USB configuration +* @ep_map: bitmap of endpoints being requested by a USB configuration +* +* Ensure that a UDC is able to support the number of endpoints within a USB +* configuration, and that there are no resource limitations to support all +* requested eps. +* +* Returns zero on success, else a negative errno. +*/ +int usb_gadget_check_config (struct usb_gadget *gadget,unsigned long ep_map) +{ +int ret =0 ; + +if (!gadget->ops->check_config) + goto out; + + ret = gadget->ops->check_config (gadget, ep_map); + +out: +return ret; +} +EXPORT_SYMBOL_GPL (usb_gadget_check_config); +/* ------------------------------------------------------------------------- */ static void usb_gadget_state_work (struct work_struct *work)
include/linux/usb/gadget.h +5 -0
@@ -328,6 +328,7 @@ struct usb_gadget_ops {struct usb_ep *(*match_ep)(struct usb_gadget *,struct usb_endpoint_descriptor *,struct usb_ss_ep_comp_descriptor *); +int (*check_config)(struct usb_gadget *gadget,unsigned long ep_map); };/**
@@ -607,6 +608,7 @@ int usb_gadget_connect(struct usb_gadget *gadget);int usb_gadget_disconnect (struct usb_gadget *gadget);int usb_gadget_deactivate (struct usb_gadget *gadget);int usb_gadget_activate (struct usb_gadget *gadget); +int usb_gadget_check_config (struct usb_gadget *gadget,unsigned long ep_map);#else static inline int usb_gadget_frame_number (struct usb_gadget *gadget) {return 0 ; }
@@ -630,6 +632,9 @@ static inline int usb_gadget_deactivate(struct usb_gadget *gadget) {return 0 ; }static inline int usb_gadget_activate (struct usb_gadget *gadget) {return 0 ; } +static inline int usb_gadget_check_config (struct usb_gadget *gadget, +unsigned long ep_map) +{return 0 ; }#endif /* CONFIG_USB_GADGET */ /*-------------------------------------------------------------------------*/
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 2/5 usb: gadget: configfs: Check USB configuration before adding
In reply to Wesley ChengEnsure that the USB gadget is able to support the configuration being added based on the number of endpoints required from all interfaces. This is for accounting for any bandwidth or space limitations.
--- drivers/usb/gadget/configfs.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
drivers/usb/gadget/configfs.c +22 -0
@@ -1374,6 +1374,7 @@ static int configfs_composite_bind(struct usb_gadget *gadget,struct usb_function *f;struct usb_function *tmp;struct gadget_config_name *cn; +unsigned long ep_map =0 ;if (gadget_is_otg (gadget)) c->descriptors = otg_desc;
@@ -1403,7 +1404,28 @@ static int configfs_composite_bind(struct usb_gadget *gadget,list_add (&f->list, &cfg->func_list); goto err_purge_funcs; } +if (f->fs_descriptors) { +struct usb_descriptor_header **d; + + d = f->fs_descriptors; +for (; *d; ++d) { +struct usb_endpoint_descriptor *ep; +int addr; + +if ((*d)->bDescriptorType !=USB_DT_ENDPOINT ) +continue ; + + ep = (struct usb_endpoint_descriptor *)*d; + addr = ((ep->bEndpointAddress &0x80 ) >>3 ) | + (ep->bEndpointAddress &0x0f ); +set_bit (addr, &ep_map); + } + } } + ret =usb_gadget_check_config (cdev->gadget, ep_map); +if (ret) + goto err_purge_funcs; +usb_ep_autoconfig_reset (cdev->gadget); }if (cdev->use_os_string) {
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 3/5 usb: dwc3: Resize TX FIFOs to meet EP bursting requirements
In reply to Wesley ChengSome devices have USB compositions which may require multiple endpoints that support EP bursting. HW defined TX FIFO sizes may not always be sufficient for these compositions. By utilizing flexible TX FIFO allocation, this allows for endpoints to request the required FIFO depth to achieve higher bandwidth. With some higher bMaxBurst configurations, using a larger TX FIFO size results in better TX throughput.
By introducing the check_config() callback, the resizing logic can fetch the maximum number of endpoints used in the USB composition (can contain multiple configurations), which helps ensure that the resizing logic can fulfill the configuration(s), or return an error to the gadget layer otherwise during bind time.
--- drivers/usb/dwc3/core.c | 9 ++ drivers/usb/dwc3/core.h | 15 ++++ drivers/usb/dwc3/ep0.c | 2 + drivers/usb/dwc3/gadget.c | 212 ++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 238 insertions(+)
drivers/usb/dwc3/core.c +9 -0
@@ -1267,6 +1267,7 @@ static void dwc3_get_properties(struct dwc3 *dwc)u8 rx_max_burst_prd;u8 tx_thr_num_pkt_prd;u8 tx_max_burst_prd; +u8 tx_fifo_resize_max_num;const char *usb_psy_name;int ret;
@@ -1282,6 +1283,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)*/ hird_threshold =12 ; + tx_fifo_resize_max_num =6 ; + dwc->maximum_speed =usb_get_maximum_speed (dev); dwc->max_ssp_rate =usb_get_maximum_ssp_rate (dev); dwc->dr_mode =usb_get_dr_mode (dev);
@@ -1325,6 +1328,10 @@ static void dwc3_get_properties(struct dwc3 *dwc) &tx_thr_num_pkt_prd);device_property_read_u8 (dev,"snps,tx-max-burst-prd" , &tx_max_burst_prd); + dwc->do_fifo_resize =device_property_read_bool (dev, +"tx-fifo-resize" ); +device_property_read_u8 (dev,"tx-fifo-max-num" , + &tx_fifo_resize_max_num); dwc->disable_scramble_quirk =device_property_read_bool (dev,"snps,disable_scramble_quirk" );
@@ -1390,6 +1397,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) dwc->tx_max_burst_prd = tx_max_burst_prd; dwc->imod_interval =0 ; + + dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num; }/* check whether the core supports IMOD */
drivers/usb/dwc3/core.h +15 -0
@@ -1023,6 +1023,7 @@ struct dwc3_scratchpad_array {* @rx_max_burst_prd: max periodic ESS receive burst size * @tx_thr_num_pkt_prd: periodic ESS transmit packet count * @tx_max_burst_prd: max periodic ESS transmit burst size +* @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize * @hsphy_interface: "utmi" or "ulpi" * @connected: true when we're connected to a host, false otherwise * @delayed_status: true when gadget driver asks for delayed status
@@ -1079,6 +1080,11 @@ struct dwc3_scratchpad_array {* @dis_split_quirk: set to disable split boundary. * @imod_interval: set the interrupt moderation interval in 250ns * increments or 0 to disable. +* @max_cfg_eps: current max number of IN eps used across all USB configs. +* @last_fifo_depth: last fifo depth used to determine next fifo ram start +* address. +* @num_ep_resized: carries the current number endpoints which have had its tx +* fifo resized. */ struct dwc3 {struct work_struct drd_work;
@@ -1234,6 +1240,7 @@ struct dwc3 {u8 rx_max_burst_prd;u8 tx_thr_num_pkt_prd;u8 tx_max_burst_prd; +u8 tx_fifo_resize_max_num;const char *hsphy_interface;
@@ -1247,6 +1254,7 @@ struct dwc3 { unsigned is_utmi_l1_suspend:1; unsigned is_fpga:1; unsigned pending_events:1; + unsigned do_fifo_resize:1; unsigned pullups_connected:1; unsigned setup_packet_pending:1; unsigned three_stage_setup:1;
@@ -1282,6 +1290,10 @@ struct dwc3 { unsigned dis_split_quirk:1;u16 imod_interval; + +int max_cfg_eps; +int last_fifo_depth; +int num_ep_resized; };#define INCRX_BURST_MODE 0
@@ -1513,6 +1525,7 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned int cmd, struct dwc3_gadget_ep_cmd_params *params);int dwc3_send_gadget_generic_command (struct dwc3 *dwc,unsigned int cmd,u32 param); +void dwc3_gadget_clear_tx_fifos (struct dwc3 *dwc);#else static inline int dwc3_gadget_init (struct dwc3 *dwc) {return 0 ; }
@@ -1532,6 +1545,8 @@ static inline int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned int cmd,static inline int dwc3_send_gadget_generic_command (struct dwc3 *dwc,int cmd,u32 param) {return 0 ; } +static inline void dwc3_gadget_clear_tx_fifos (struct dwc3 *dwc) +{ }#endif #if IS_ENABLED (CONFIG_USB_DWC3_DUAL_ROLE )
drivers/usb/dwc3/ep0.c +2 -0
@@ -616,6 +616,8 @@ static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)return -EINVAL ;case USB_STATE_ADDRESS : +dwc3_gadget_clear_tx_fifos (dwc); + ret =dwc3_ep0_delegate_req (dwc, ctrl);/* if the cfg matches and the cfg is non zero */ if (cfg && (!ret || (ret ==USB_GADGET_DELAYED_STATUS ))) {
drivers/usb/dwc3/gadget.c +212 -0
242 lines not on this page · raw message
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v8 4/5 usb: dwc3: dwc3-qcom: Enable tx-fifo-resize property by default
In reply to Wesley ChengIn order to take advantage of the TX fifo resizing logic, manually add these properties to the DWC3 child node by default. This will allow the DWC3 gadget to resize the TX fifos for the IN endpoints, which help with performance.
--- drivers/usb/dwc3/dwc3-qcom.c | 9 +++++++++ 1 file changed, 9 insertions(+)
drivers/usb/dwc3/dwc3-qcom.c +9 -0
@@ -645,6 +645,7 @@ static int dwc3_qcom_of_register_core(struct platform_device *pdev)struct dwc3_qcom *qcom =platform_get_drvdata (pdev);struct device_node *np = pdev->dev.of_node, *dwc3_np;struct device *dev = &pdev->dev; +struct property *prop;int ret; dwc3_np =of_get_compatible_child (np,"snps,dwc3" );
@@ -653,6 +654,14 @@ static int dwc3_qcom_of_register_core(struct platform_device *pdev)return -ENODEV ; } + prop =devm_kzalloc (dev,sizeof (*prop),GFP_KERNEL ); +if (prop) { + prop->name ="tx-fifo-resize" ; + ret =of_add_property (dwc3_np, prop); +if (ret <0 ) +dev_info (dev,"unable to add tx-fifo-resize prop\n" ); + } + ret =of_platform_populate (np,NULL ,NULL , dev);if (ret) {dev_err (dev,"failed to register dwc3 core - %d\n" , ret);
Signature · 2 lines
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PATCH v8 5/5 arm64: boot: dts: qcom: sm8150: Enable dynamic TX FIFO resize logic
In reply to Wesley ChengEnable the flexible TX FIFO resize logic on SM8150. Using a larger TX FIFO SZ can help account for situations when system latency is greater than the USB bus transmission latency.
--- arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm64/boot/dts/qcom/sm8150.dtsi +1 -0
@@ -2275,6 +2275,7 @@ iommus = <&apps_smmu 0x140 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + tx-fifo-resize; phys = <&usb_1_hsphy>, <&usb_1_ssphy>; phy-names = "usb2-phy", "usb3-phy"; };
Signature · 2 lines
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Re: [PATCH v8 5/5] arm64: boot: dts: qcom: sm8150: Enable dynamic TX FIFO resize logic
Quoted 6 lines · Wesley Cheng
Enable the flexible TX FIFO resize logic on SM8150. Using a larger TX FIFO SZ can help account for situations when system latency is greater than the USB bus transmission latency.
Reviewed-by Rob Herring <[email protected]>Signed-off-by Wesley Cheng <[email protected]>
Based on my previous request of always adding this for the Qualcomm platforms that supports it, which is implemented in patch 4, I don't see a need for this patch.
Am I missing something?
Regards,
Bjorn
Quoted 20 lines
--- arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + 1 file changed, 1 insertion(+)arch/arm64/boot/dts/qcom/sm8150.dtsi +1
-0@@ -2275,6 +2275,7 @@ iommus = <&apps_smmu 0x140 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + tx-fifo-resize; phys = <&usb_1_hsphy>, <&usb_1_ssphy>; phy-names = "usb2-phy", "usb3-phy"; };Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v8 5/5] arm64: boot: dts: qcom: sm8150: Enable dynamic TX FIFO resize logic
Hi Bjorn,
Quoted 6 lines · Bjorn Andersson
Quoted 4 lines · Wesley Cheng
Enable the flexible TX FIFO resize logic on SM8150. Using a larger TX FIFO SZ can help account for situations when system latency is greater than the USB bus transmission latency.
Quoted 8 lines
Quoted 2 lines
Reviewed-by Rob Herring <[email protected]>Signed-off-by Wesley Cheng <[email protected]>Based on my previous request of always adding this for the Qualcomm platforms that supports it, which is implemented in patch 4, I don't see a need for this patch.
Am I missing something?
Looks like Wesley had quickly sent a V9 of the series right after V8, and the DTSI change is dropped.
https://lore.kernel.org/linux-usb/[email protected]/T/#t
Thanks,
Jack
Quoted 16 lines
Quoted 16 lines
--- arch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + 1 file changed, 1 insertion(+)arch/arm64/boot/dts/qcom/sm8150.dtsi +1
-0@@ -2275,6 +2275,7 @@ iommus = <&apps_smmu 0x140 0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; + tx-fifo-resize; phys = <&usb_1_hsphy>, <&usb_1_ssphy>; phy-names = "usb2-phy", "usb3-phy"; };
Signature · 2 lines
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Hi Felipe,
Sorry for the ping, but was just wondering if you had any feedback on the latest txfifo resize patch series? I think I addressed the concerns you had about making sure we had enough FIFO size for a composition before allowing the configuration to bind with the check_config() API. It would ensure at least enough room for 1 max packet size for each EP in a configuration before allowing the bind to complete.
That way we'd avoid being enumerated w/ the host, and having non-functioning endpoints. We've been testing these changes internally, and they are providing a pretty significant boost to our USB throughput numbers.
Thanks
Wesley Cheng
Quoted 122 lines · Wesley Cheng
Changes in V8:
- Rebased to usb-testing
- Usingdevm_kzallocfor adding txfifo property in dwc3-qcom
- Removed DWC3 QCOM ACPI property for enabling the txfifo resizeChanges in V7:
- Added a new property tx-fifo-max-num for limiting how much fifo space the resizing logic can allocate for endpoints with large burst values. This can differ across platforms, and tie in closely with overall system latency.
- Added recommended checks for DWC32.
- Added changes to set the tx-fifo-resize property from dwc3-qcom by default instead of modifying the current DTSI files.
- Added comments on all APIs/variables introduced.
- Updated the DWC3 YAML to include a better description of the tx-fifo-resize property and added an entry for tx-fifo-max-num.Changes in V6:
- Rebased patches to usb-testing.
- Renamed to PATCH series instead of RFC.
- Checking forfs_descriptorsinstead ofss_descriptorsfor determining the endpoint count for a particular configuration.
- Re-ordered patch series to fix patch dependencies.Changes in V5:
- Addedcheck_config()logic, which is used to communicate the number of EPs used in a particular configuration. Based on this, the DWC3 gadget driver has the ability to know the maximum number of eps utilized in all configs. This helps reduce unnecessary allocation to unused eps, and will catch fifo allocation issues atbind()time.
- Fixed variable declaration to single line per variable, and reverse xmas.
- Created a helper for fifo clearing, which is used byep0.cChanges in V4:
- Removed struct dwc3* as an argument fordwc3_gadget_resize_tx_fifos()
- RemovedWARN_ON(1)in case we run out of fifo spaceChanges in V3:
- Removed "Reviewed-by" tags
- Renamed series back to RFC
- Modified logic to ensure thatfifo_sizeis reset if we pass the minimum threshold. Tested with binding multiple FDs requesting 6 FIFOs.Changes in V2:
- Modified TXFIFO resizing logic to ensure that each EP is reserved a FIFO.
- Removeddev_dbg()prints and fixed typos from patches
- Added some more description on the dt-bindings commit messageCurrently, there is no functionality to allow for resizing the TXFIFOs, and relying on the HW default setting for the TXFIFO depth. In most cases, the HW default is probably sufficient, but for USB compositions that contain multiple functions that require EP bursting, the default settings might not be enough. Also to note, the current SW will assign an EP to a function driver w/o checking to see if the TXFIFO size for that particular EP is large enough. (this is a problem if there are multiple HW defined values for the TXFIFO size)
It is mentioned in the SNPS databook that a minimum of TX FIFO depth = 3 is required for an EP that supports bursting. Otherwise, there may be frequent occurences of bursts ending. For high bandwidth functions, such as data tethering (protocols that support data aggregation), mass storage, and media transfer protocol (over FFS), the bMaxBurst value can be large, and a bigger TXFIFO depth may prove to be beneficial in terms of USB throughput. (which can be associated to system access latency, etc...) It allows for a more consistent burst of traffic, w/o any interruptions, as data is readily available in the FIFO.
With testing done using the mass storage function driver, the results show that with a larger TXFIFO depth, the bandwidth increased significantly.
Test Parameters:
- Platform: Qualcomm SM8150
- bMaxBurst = 6
- USB req size = 256kB
- Num of USB reqs = 16
- USB Speed = Super-Speed
- Function Driver: Mass Storage (w/ ramdisk)
- Test Application: CrystalDiskMarkResults:
TXFIFO Depth = 3 max packets
Test Case | Data Size | AVG tput (in MB/s)
-------------------------------------------Sequential|1 GB x | Read |9 loops | 193.60 | | 195.86 | | 184.77 | | 193.60-------------------------------------------
TXFIFO Depth = 6 max packets
Test Case | Data Size | AVG tput (in MB/s)
-------------------------------------------Sequential|1 GB x | Read |9 loops | 287.35 | | 304.94 | | 289.64 | | 293.61-------------------------------------------
Wesley Cheng (5):
usb: gadget: udc: core: Introducecheck_configto verify USB
configuration
usb: gadget: configfs: Check USB configuration before adding
usb: dwc3: Resize TX FIFOs to meet EP bursting requirements
usb: dwc3: dwc3-qcom: Enable tx-fifo-resize property by default
arm64: boot: dts: qcom: sm8150: Enable dynamic TX FIFO resize logicarch/arm64/boot/dts/qcom/sm8150.dtsi | 1 + drivers/usb/dwc3/core.c | 9 ++ drivers/usb/dwc3/core.h | 15 +++ drivers/usb/dwc3/dwc3-qcom.c | 9 ++ drivers/usb/dwc3/ep0.c | 2 + drivers/usb/dwc3/gadget.c | 212 +++++++++++++++++++++++++++++++++++ drivers/usb/gadget/configfs.c | 22 ++++ drivers/usb/gadget/udc/core.c | 25 +++++ include/linux/usb/gadget.h | 5 + 9 files changed, 300 insertions(+)
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