Initial support for Cadence MHDP(HDMI/DP) for i.MX8MQ

Mailbox access functions could be share to other mhdp driver and HDP-TX HDMI/DP PHY drivers, move those functions to head file include/drm/bridge/cdns-mhdp-mailbox.h and convert them to macro functions.

Signed-off-by Sandor Yu <[email protected]>

---
 .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 197 +-------------
 .../drm/bridge/cadence/cdns-mhdp8546-core.h   |   1 -
 include/drm/bridge/cdns-mhdp-mailbox.h        | 240 ++++++++++++++++++
 3 files changed, 242 insertions(+), 196 deletions(-)
 create mode 100644 include/drm/bridge/cdns-mhdp-mailbox.h

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +2 -195

index 31442a922502..b77b0ddcc9b3 100644
@@ -36,6 +36,7 @@
 #include <linux/slab.h>
 #include <linux/wait.h>
 
+#include <drm/bridge/cdns-mhdp-mailbox.h>
 #include <drm/display/drm_dp_helper.h>
 #include <drm/display/drm_hdcp_helper.h>
 #include <drm/drm_atomic.h>

@@ -55,200 +56,6 @@
 #include "cdns-mhdp8546-hdcp.h"
 #include "cdns-mhdp8546-j721e.h"
 
-static int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp)
-{
-	int ret, empty;
-
-	WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
-
-	ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_EMPTY,
-				 empty, !empty, MAILBOX_RETRY_US,
-				 MAILBOX_TIMEOUT_US);
-	if (ret < 0)
-		return ret;
-
-	return readl(mhdp->regs + CDNS_MAILBOX_RX_DATA) & 0xff;
-}
-
-static int cdns_mhdp_mailbox_write(struct cdns_mhdp_device *mhdp, u8 val)
-{
-	int ret, full;
-
-	WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
-
-	ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_FULL,
-				 full, !full, MAILBOX_RETRY_US,
-				 MAILBOX_TIMEOUT_US);
-	if (ret < 0)
-		return ret;
-
-	writel(val, mhdp->regs + CDNS_MAILBOX_TX_DATA);
-
-	return 0;
-}
-
-static int cdns_mhdp_mailbox_recv_header(struct cdns_mhdp_device *mhdp,
-					 u8 module_id, u8 opcode,
-					 u16 req_size)
-{
-	u32 mbox_size, i;
-	u8 header[4];
-	int ret;
-
-	/* read the header of the message */
-	for (i = 0; i < sizeof(header); i++) {
-		ret = cdns_mhdp_mailbox_read(mhdp);
-		if (ret < 0)
-			return ret;
-
-		header[i] = ret;
-	}
-
-	mbox_size = get_unaligned_be16(header + 2);
-
-	if (opcode != header[0] || module_id != header[1] ||
-	    req_size != mbox_size) {
-		/*
-		 * If the message in mailbox is not what we want, we need to
-		 * clear the mailbox by reading its contents.
-		 */
-		for (i = 0; i < mbox_size; i++)
-			if (cdns_mhdp_mailbox_read(mhdp) < 0)
-				break;
-
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int cdns_mhdp_mailbox_recv_data(struct cdns_mhdp_device *mhdp,
-				       u8 *buff, u16 buff_size)
-{
-	u32 i;
-	int ret;
-
-	for (i = 0; i < buff_size; i++) {
-		ret = cdns_mhdp_mailbox_read(mhdp);
-		if (ret < 0)
-			return ret;
-
-		buff[i] = ret;
-	}
-
-	return 0;
-}
-
-static int cdns_mhdp_mailbox_send(struct cdns_mhdp_device *mhdp, u8 module_id,
-				  u8 opcode, u16 size, u8 *message)
-{
-	u8 header[4];
-	int ret, i;
-
-	header[0] = opcode;
-	header[1] = module_id;
-	put_unaligned_be16(size, header + 2);
-
-	for (i = 0; i < sizeof(header); i++) {
-		ret = cdns_mhdp_mailbox_write(mhdp, header[i]);
-		if (ret)
-			return ret;
-	}
-
-	for (i = 0; i < size; i++) {
-		ret = cdns_mhdp_mailbox_write(mhdp, message[i]);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-static
-int cdns_mhdp_reg_read(struct cdns_mhdp_device *mhdp, u32 addr, u32 *value)
-{
-	u8 msg[4], resp[8];
-	int ret;
-
-	put_unaligned_be32(addr, msg);
-
-	mutex_lock(&mhdp->mbox_mutex);
-
-	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL,
-				     GENERAL_REGISTER_READ,
-				     sizeof(msg), msg);
-	if (ret)
-		goto out;
-
-	ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_GENERAL,
-					    GENERAL_REGISTER_READ,
-					    sizeof(resp));
-	if (ret)
-		goto out;
-
-	ret = cdns_mhdp_mailbox_recv_data(mhdp, resp, sizeof(resp));
-	if (ret)
-		goto out;
-
-	/* Returned address value should be the same as requested */
-	if (memcmp(msg, resp, sizeof(msg))) {
-		ret = -EINVAL;
-		goto out;
-	}
-
-	*value = get_unaligned_be32(resp + 4);
-
-out:
-	mutex_unlock(&mhdp->mbox_mutex);
-	if (ret) {
-		dev_err(mhdp->dev, "Failed to read register\n");
-		*value = 0;
-	}
-
-	return ret;
-}
-
-static
-int cdns_mhdp_reg_write(struct cdns_mhdp_device *mhdp, u16 addr, u32 val)
-{
-	u8 msg[6];
-	int ret;
-
-	put_unaligned_be16(addr, msg);
-	put_unaligned_be32(val, msg + 2);
-
-	mutex_lock(&mhdp->mbox_mutex);
-
-	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
-				     DPTX_WRITE_REGISTER, sizeof(msg), msg);
-
-	mutex_unlock(&mhdp->mbox_mutex);
-
-	return ret;
-}
-
-static
-int cdns_mhdp_reg_write_bit(struct cdns_mhdp_device *mhdp, u16 addr,
-			    u8 start_bit, u8 bits_no, u32 val)
-{
-	u8 field[8];
-	int ret;
-
-	put_unaligned_be16(addr, field);
-	field[2] = start_bit;
-	field[3] = bits_no;
-	put_unaligned_be32(val, field + 4);
-
-	mutex_lock(&mhdp->mbox_mutex);
-
-	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
-				     DPTX_WRITE_FIELD, sizeof(field), field);
-
-	mutex_unlock(&mhdp->mbox_mutex);
-
-	return ret;
-}
-
 static
 int cdns_mhdp_dpcd_read(struct cdns_mhdp_device *mhdp,
 			u32 addr, u8 *data, u16 len)

@@ -2058,7 +1865,7 @@ static void cdns_mhdp_atomic_disable(struct drm_bridge *bridge,
 				     struct drm_bridge_state *bridge_state)
 {
 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
-	u32 resp;
+	u32 resp = 0;
 
 	dev_dbg(mhdp->dev, "%s\n", __func__);
 

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +0 -1

index bedddd510d17..10c878bf0e63 100644
@@ -212,7 +212,6 @@ struct phy;
 #define MB_MODULE_ID_HDCP_TX			0x07
 #define MB_MODULE_ID_HDCP_RX			0x08
 #define MB_MODULE_ID_HDCP_GENERAL		0x09
-#define MB_MODULE_ID_GENERAL			0x0a
 
 /* firmware and opcodes */
 #define FW_NAME					"cadence/mhdp8546.bin"

include/drm/bridge/cdns-mhdp-mailbox.h new file +240 -0

new file mode 100644
index 000000000000..0249322a74b0
@@ -0,0 +1,240 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Cadence MHDP Firmware Access API function by Malibox.
+ *
+ * Copyright (C) 2022 NXP Semiconductor, Inc.
+ *
+ */
+#ifndef CDNS_MHDP_MAILBOX_H
+#define CDNS_MHDP_MAILBOX_H
+
+#include <asm/unaligned.h>
+#include <linux/iopoll.h>
+
+/* mailbox regs offset */
+#define CDNS_MAILBOX_FULL			0x00008
+#define CDNS_MAILBOX_EMPTY			0x0000c
+#define CDNS_MAILBOX_TX_DATA		0x00010
+#define CDNS_MAILBOX_RX_DATA		0x00014
+
+#define MAILBOX_RETRY_US			1000
+#define MAILBOX_TIMEOUT_US			2000000
+
+/* Module ID Code */
+#define MB_MODULE_ID_GENERAL		0x0A
+#define MB_MODULE_ID_DP_TX			0x01
+
+/* General Commands */
+#define GENERAL_REGISTER_WRITE		0x05
+#define GENERAL_REGISTER_READ		0x07
+
+/* DP TX Command */
+#define DPTX_WRITE_FIELD			0x08
+
+/* MHDP Firmware access functions by Mailbox */
+#define cdns_mhdp_mailbox_read(__mhdp) \
+({ \
+	int ret, empty, val; \
+\
+	WARN_ON(!mutex_is_locked(&(__mhdp)->mbox_mutex)); \
+\
+	do {  \
+		ret = readx_poll_timeout(readl, (__mhdp)->regs + CDNS_MAILBOX_EMPTY,  \
+					 empty, !empty, MAILBOX_RETRY_US,  \
+					 MAILBOX_TIMEOUT_US);  \
+		if (ret < 0)  \
+			break;  \
+\
+		val = readl((__mhdp)->regs + CDNS_MAILBOX_RX_DATA) & 0xff; \
+	} while (0);  \
+\
+	(ret < 0) ? ret : val;  \
+})
+
+#define cdns_mhdp_mailbox_write(__mhdp, __val) \
+({ \
+	int ret, full;  \
+\
+	WARN_ON(!mutex_is_locked(&(__mhdp)->mbox_mutex)); \
+\
+	do {  \
+		ret = readx_poll_timeout(readl, (__mhdp)->regs + CDNS_MAILBOX_FULL,  \
+					 full, !full, MAILBOX_RETRY_US,  \
+					 MAILBOX_TIMEOUT_US);  \
+		if (ret < 0)  \
+			break;  \
+\
+		writel((__val), (__mhdp)->regs + CDNS_MAILBOX_TX_DATA); \
+	} while (0);  \
+\
+	ret; \
+})
+
+#define  cdns_mhdp_mailbox_recv_header(__mhdp, __module_id, __opcode, __req_size) \
+({  \
+	u32 mbox_size, i;  \
+	u8 header[4];  \
+	int ret;  \
+\
+	do {  \
+		/* read the header of the message */ \
+		for (i = 0; i < sizeof(header); i++) {  \
+			ret = cdns_mhdp_mailbox_read(__mhdp);  \
+			if (ret < 0)  \
+				break;  \
+\
+			header[i] = ret;  \
+		}  \
+\
+		mbox_size = get_unaligned_be16(header + 2);  \
+\
+		if ((__opcode) != header[0] || (__module_id) != header[1] ||  \
+		    (__req_size) != mbox_size) {  \
+			/* If the message in mailbox is not what we want, we need to
+			 * clear the mailbox by reading its contents. */  \
+			for (i = 0; i < mbox_size; i++)   \
+				if (cdns_mhdp_mailbox_read(__mhdp) < 0)  \
+					break;  \
+\
+			ret = -EINVAL;  \
+		}  \
+\
+		ret = 0; \
+\
+	} while (0);  \
+\
+	ret;  \
+})
+
+#define cdns_mhdp_mailbox_recv_data(mhdp, buff, buff_size)  \
+({  \
+	u32 i;  \
+	int ret;  \
+\
+	do {  \
+		for (i = 0; i < buff_size; i++) {  \
+			ret = cdns_mhdp_mailbox_read(mhdp);  \
+			if (ret < 0)  \
+				break;  \
+\
+			((u8 *)buff)[i] = ret;  \
+		}  \
+\
+		ret = 0;  \
+\
+	} while (0);  \
+\
+	ret; \
+})
+
+#define cdns_mhdp_mailbox_send(mhdp, module_id, opcode, size, message)  \
+({  \
+	u8 header[4];  \
+	int ret, i;  \
+\
+	header[0] = opcode;  \
+	header[1] = module_id;  \
+	put_unaligned_be16(size, header + 2);  \
+\
+	do {  \
+		for (i = 0; i < sizeof(header); i++) {  \
+			ret = cdns_mhdp_mailbox_write(mhdp, header[i]);  \
+			if (ret < 0)  \
+				break;  \
+		}  \
+\
+		for (i = 0; i < size; i++) {  \
+			ret = cdns_mhdp_mailbox_write(mhdp, ((u8 *)message)[i]);  \
+			if (ret < 0)  \
+				break;;  \
+		}  \
+		ret = 0;  \
+	} while (0);  \
+\
+	ret;  \
+})
+
+#define cdns_mhdp_reg_read(mhdp, addr, value)  \
+({  \
+	u8 msg[4], resp[8];  \
+	int ret;  \
+\
+	put_unaligned_be32(addr, msg);  \
+\
+	mutex_lock(&mhdp->mbox_mutex);  \
+\
+	do {  \
+		ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL,  \
+					     GENERAL_REGISTER_READ,  \
+					     sizeof(msg), msg);  \
+		if (ret < 0)  \
+			break;  \
+\
+		ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_GENERAL,  \
+						    GENERAL_REGISTER_READ,  \
+						    sizeof(resp));  \
+		if (ret < 0)  \
+			break;  \
+\
+		ret = cdns_mhdp_mailbox_recv_data(mhdp, resp, sizeof(resp));  \
+		if (ret < 0)  \
+			break;  \
+\
+		/* Returned address value should be the same as requested */  \
+		if (memcmp(msg, resp, sizeof(msg))) {  \
+			ret = -EINVAL;  \
+			break;  \
+		}  \
+\
+		*((u32 *)value) = get_unaligned_be32(resp + 4);  \
+			ret = 0;  \
+	} while (0);  \
+\
+	mutex_unlock(&mhdp->mbox_mutex);  \
+	if (ret < 0) {  \
+		dev_err(mhdp->dev, "Failed to read register\n");  \
+		*((u32 *)value) = 0;  \
+	}  \
+\
+	ret;  \
+})
+
+#define cdns_mhdp_reg_write(mhdp, addr, val)  \
+({  \
+	u8 msg[8];  \
+	int ret;  \
+\
+	put_unaligned_be32(addr, msg);  \
+	put_unaligned_be32(val, msg + 4);  \
+\
+	mutex_lock(&mhdp->mbox_mutex);  \
+\
+	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL,  \
+				      GENERAL_REGISTER_WRITE, sizeof(msg), msg);  \
+\
+	mutex_unlock(&mhdp->mbox_mutex);  \
+\
+	ret;  \
+})
+
+#define cdns_mhdp_reg_write_bit(mhdp, addr, start_bit, bits_no, val) \
+({  \
+	u8 field[8];  \
+	int ret;  \
+\
+	put_unaligned_be16(addr, field);  \
+	field[2] = start_bit;  \
+	field[3] = bits_no;  \
+	put_unaligned_be32(val, field + 4);  \
+\
+	mutex_lock(&mhdp->mbox_mutex);  \
+\
+	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, \
+				     DPTX_WRITE_FIELD, sizeof(field), field);  \
+\
+	mutex_unlock(&mhdp->mbox_mutex);  \
+\
+	ret; \
+})
+
+#endif

-----Original Message-----
From: Lucas Stach <[email protected]>
Sent: 2022年12月9日 19:30
To: Sandor Yu <[email protected]>; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]; [email protected]
Cc: Oliver Brown <[email protected]>; dl-linux-imx <[email protected]>; [email protected]
Subject: [EXT] Re: [PATCH v5 01/10] drm: bridge: cadence: convert mailbox functions to macro functions

Caution: EXT Email

Hi Sandor,

Am Montag, dem 28.11.2022 um 15:36 +0800 schrieb Sandor Yu:

Quoted 5 lines

Mailbox access functions could be share to other mhdp driver and HDP-TX HDMI/DP PHY drivers, move those functions to head file include/drm/bridge/cdns-mhdp-mailbox.h and convert them to macro functions.

This does not look right. If those functions need to be called from other units and implemented in the header, they should simply be static inline functions rather than macros. Those macros obfuscate the code a lot.

However, I don't believe those should be called by other units directly. From what I can see this is mostly used by the PHY drivers, to interact with the mailbox and read/write PHY registers. However, there is no locking between the bridge and the core driver in any form, so they could corrupt the mailbox state. The PHY drivers have mailbox mutexes, but as far as I can see they aren't used and even if they were they would not guard against concurrent access to the mailbox between the bridge and the PHY driver.

I think the right thing to do here would be to have a regmap implementation in the bridge driver, which uses the mailbox functions to implement the register access. Then this regmap could be passed down from the bridge driver to the PHY, which should simply be a child node of the bridge in DT.

Regards,
Lucas

Quoted 5 lines

Signed-off-by Sandor Yu <[email protected]>

---
 .../drm/bridge/cadence/cdns-mhdp8546-core.c   | 197 +-------------
 .../drm/bridge/cadence/cdns-mhdp8546-core.h   |   1 -
 include/drm/bridge/cdns-mhdp-mailbox.h        | 240

++++++++++++++++++

Quoted 18 lines

 3 files changed, 242 insertions(+), 196 deletions(-)  create mode

100644 include/drm/bridge/cdns-mhdp-mailbox.h

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +1 -0

index 31442a922502..b77b0ddcc9b3 100644
@@ -36,6 +36,7 @@
 #include <linux/slab.h>
 #include <linux/wait.h>
 
+#include <drm/bridge/cdns-mhdp-mailbox.h>
 #include <drm/display/drm_dp_helper.h>  #include

<drm/display/drm_hdcp_helper.h> #include <drm/drm_atomic.h> @@ -55,200 +56,6 @@ #include "cdns-mhdp8546-hdcp.h"
#include "cdns-mhdp8546-j721e.h"

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 6 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -6

-static int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp) -{
-     int ret, empty;
-
-     WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
-
-     ret = readx_poll_timeout(readl, mhdp->regs +

CDNS_MAILBOX_EMPTY,

Quoted 10 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -9

-                              empty, !empty, MAILBOX_RETRY_US,
-                              MAILBOX_TIMEOUT_US);
-     if (ret < 0)
-             return ret;
-
-     return readl(mhdp->regs + CDNS_MAILBOX_RX_DATA) & 0xff;
-}
-
-static int cdns_mhdp_mailbox_write(struct cdns_mhdp_device *mhdp, u8

val) -{

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 5 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -5

-     int ret, full;
-
-     WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
-
-     ret = readx_poll_timeout(readl, mhdp->regs +

CDNS_MAILBOX_FULL,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 11 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -11

-                              full, !full, MAILBOX_RETRY_US,
-                              MAILBOX_TIMEOUT_US);
-     if (ret < 0)
-             return ret;
-
-     writel(val, mhdp->regs + CDNS_MAILBOX_TX_DATA);
-
-     return 0;
-}
-
-static int cdns_mhdp_mailbox_recv_header(struct cdns_mhdp_device

*mhdp,

Quoted 12 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -12

-                                      u8 module_id, u8 opcode,
-                                      u16 req_size)
-{
-     u32 mbox_size, i;
-     u8 header[4];
-     int ret;
-
-     /* read the header of the message */
-     for (i = 0; i < sizeof(header); i++) {
-             ret = cdns_mhdp_mailbox_read(mhdp);
-             if (ret < 0)
-                     return ret;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 10 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -10

-
-             header[i] = ret;
-     }
-
-     mbox_size = get_unaligned_be16(header + 2);
-
-     if (opcode != header[0] || module_id != header[1] ||
-         req_size != mbox_size) {
-             /*
-              * If the message in mailbox is not what we want, we need

to

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 13 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -13

-              * clear the mailbox by reading its contents.
-              */
-             for (i = 0; i < mbox_size; i++)
-                     if (cdns_mhdp_mailbox_read(mhdp) < 0)
-                             break;
-
-             return -EINVAL;
-     }
-
-     return 0;
-}
-
-static int cdns_mhdp_mailbox_recv_data(struct cdns_mhdp_device

*mhdp,

Quoted 7 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -7

-                                    u8 *buff, u16 buff_size)
-{
-     u32 i;
-     int ret;
-
-     for (i = 0; i < buff_size; i++) {
-             ret = cdns_mhdp_mailbox_read(mhdp);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 10 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -10

-             if (ret < 0)
-                     return ret;
-
-             buff[i] = ret;
-     }
-
-     return 0;
-}
-
-static int cdns_mhdp_mailbox_send(struct cdns_mhdp_device *mhdp, u8

module_id,

Quoted 31 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -26

-                               u8 opcode, u16 size, u8 *message)
-{
-     u8 header[4];
-     int ret, i;
-
-     header[0] = opcode;
-     header[1] = module_id;
-     put_unaligned_be16(size, header + 2);
-
-     for (i = 0; i < sizeof(header); i++) {
-             ret = cdns_mhdp_mailbox_write(mhdp, header[i]);
-             if (ret)
-                     return ret;
-     }
-
-     for (i = 0; i < size; i++) {
-             ret = cdns_mhdp_mailbox_write(mhdp, message[i]);
-             if (ret)
-                     return ret;
-     }
-
-     return 0;
-}
-
-static
-int cdns_mhdp_reg_read(struct cdns_mhdp_device *mhdp, u32 addr, u32

*value) -{

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -4

-     u8 msg[4], resp[8];
-     int ret;
-
-     put_unaligned_be32(addr, msg);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 10 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -10

-
-     mutex_lock(&mhdp->mbox_mutex);
-
-     ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL,
-                                  GENERAL_REGISTER_READ,
-                                  sizeof(msg), msg);
-     if (ret)
-             goto out;
-
-     ret = cdns_mhdp_mailbox_recv_header(mhdp,

MB_MODULE_ID_GENERAL,

Quoted 1 line

-

GENERAL_REGISTER_READ,

Quoted 29 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -28

-                                         sizeof(resp));
-     if (ret)
-             goto out;
-
-     ret = cdns_mhdp_mailbox_recv_data(mhdp, resp, sizeof(resp));
-     if (ret)
-             goto out;
-
-     /* Returned address value should be the same as requested */
-     if (memcmp(msg, resp, sizeof(msg))) {
-             ret = -EINVAL;
-             goto out;
-     }
-
-     *value = get_unaligned_be32(resp + 4);
-
-out:
-     mutex_unlock(&mhdp->mbox_mutex);
-     if (ret) {
-             dev_err(mhdp->dev, "Failed to read register\n");
-             *value = 0;
-     }
-
-     return ret;
-}
-
-static
-int cdns_mhdp_reg_write(struct cdns_mhdp_device *mhdp, u16 addr, u32

val) -{

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 10 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -10

-     u8 msg[6];
-     int ret;
-
-     put_unaligned_be16(addr, msg);
-     put_unaligned_be32(val, msg + 2);
-
-     mutex_lock(&mhdp->mbox_mutex);
-
-     ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
-                                  DPTX_WRITE_REGISTER,

sizeof(msg), msg);

Quoted 12 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -12

-
-     mutex_unlock(&mhdp->mbox_mutex);
-
-     return ret;
-}
-
-static
-int cdns_mhdp_reg_write_bit(struct cdns_mhdp_device *mhdp, u16 addr,
-                         u8 start_bit, u8 bits_no, u32 val)
-{
-     u8 field[8];
-     int ret;

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 10 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -10

-
-     put_unaligned_be16(addr, field);
-     field[2] = start_bit;
-     field[3] = bits_no;
-     put_unaligned_be32(val, field + 4);
-
-     mutex_lock(&mhdp->mbox_mutex);
-
-     ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
-                                  DPTX_WRITE_FIELD, sizeof(field),

field);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

Quoted 9 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +0 -6

-
-     mutex_unlock(&mhdp->mbox_mutex);
-
-     return ret;
-}
-
 static
 int cdns_mhdp_dpcd_read(struct cdns_mhdp_device *mhdp,
                      u32 addr, u8 *data, u16 len) @@ -2058,7

+1865,7

Quoted 15 lines

@@ static void cdns_mhdp_atomic_disable(struct drm_bridge *bridge,
struct drm_bridge_state

*bridge_state)  {
      struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +1 -1

-     u32 resp;
+     u32 resp = 0;
 
      dev_dbg(mhdp->dev, "%s\n", __func__);

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +0 -0

index bedddd510d17..10c878bf0e63 100644

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h struct phy; · line 217

Quoted 7 lines

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +0 -1

@@ -212,7 +212,6 @@ struct phy;
 #define MB_MODULE_ID_HDCP_TX                 0x07
 #define MB_MODULE_ID_HDCP_RX                 0x08
 #define MB_MODULE_ID_HDCP_GENERAL            0x09
-#define MB_MODULE_ID_GENERAL                 0x0a
 
 /* firmware and opcodes */
 #define FW_NAME

"cadence/mhdp8546.bin"

Quoted 37 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +30 -0

new file mode 100644
index 000000000000..0249322a74b0
@@ -0,0 +1,240 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Cadence MHDP Firmware Access API function by Malibox.
+ *
+ * Copyright (C) 2022 NXP Semiconductor, Inc.
+ *
+ */
+#ifndef CDNS_MHDP_MAILBOX_H
+#define CDNS_MHDP_MAILBOX_H
+
+#include <asm/unaligned.h>
+#include <linux/iopoll.h>
+
+/* mailbox regs offset */
+#define CDNS_MAILBOX_FULL                    0x00008
+#define CDNS_MAILBOX_EMPTY                   0x0000c
+#define CDNS_MAILBOX_TX_DATA         0x00010
+#define CDNS_MAILBOX_RX_DATA         0x00014
+
+#define MAILBOX_RETRY_US                     1000
+#define MAILBOX_TIMEOUT_US                   2000000
+
+/* Module ID Code */
+#define MB_MODULE_ID_GENERAL         0x0A
+#define MB_MODULE_ID_DP_TX                   0x01
+
+/* General Commands */
+#define GENERAL_REGISTER_WRITE               0x05
+#define GENERAL_REGISTER_READ                0x07
+

include/drm/bridge/cdns-mhdp-mailbox.h line 40

Quoted 10 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +10 -0

+/* DP TX Command */
+#define DPTX_WRITE_FIELD                     0x08
+
+/* MHDP Firmware access functions by Mailbox */ #define
+cdns_mhdp_mailbox_read(__mhdp) \ ({ \
+     int ret, empty, val; \
+\
+     WARN_ON(!mutex_is_locked(&(__mhdp)->mbox_mutex)); \ \
+     do {  \
+             ret = readx_poll_timeout(readl, (__mhdp)->regs +

CDNS_MAILBOX_EMPTY, \

include/drm/bridge/cdns-mhdp-mailbox.h line 41

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+                                      empty, !empty,

MAILBOX_RETRY_US, \

include/drm/bridge/cdns-mhdp-mailbox.h line 42

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+                                      MAILBOX_TIMEOUT_US);

\

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 4 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +4 -0

+             if (ret < 0)  \
+                     break;  \
+\
+             val = readl((__mhdp)->regs + CDNS_MAILBOX_RX_DATA)

& 0xff; \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 11 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +11 -0

+     } while (0);  \
+\
+     (ret < 0) ? ret : val;  \
+})
+
+#define cdns_mhdp_mailbox_write(__mhdp, __val) \ ({ \
+     int ret, full;  \
+\
+     WARN_ON(!mutex_is_locked(&(__mhdp)->mbox_mutex)); \ \
+     do {  \
+             ret = readx_poll_timeout(readl, (__mhdp)->regs +

CDNS_MAILBOX_FULL, \

include/drm/bridge/cdns-mhdp-mailbox.h line 58

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+                                      full, !full,

MAILBOX_RETRY_US, \

include/drm/bridge/cdns-mhdp-mailbox.h line 59

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+                                      MAILBOX_TIMEOUT_US);

\

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 4 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +4 -0

+             if (ret < 0)  \
+                     break;  \
+\
+             writel((__val), (__mhdp)->regs +

CDNS_MAILBOX_TX_DATA); \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 6 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +6 -0

+     } while (0);  \
+\
+     ret; \
+})
+
+#define  cdns_mhdp_mailbox_recv_header(__mhdp, __module_id,

__opcode,

Quoted 6 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +6 -0

+__req_size) \ ({  \
+     u32 mbox_size, i;  \
+     u8 header[4];  \
+     int ret;  \
+\
+     do {  \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 10 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +10 -0

+             /* read the header of the message */ \
+             for (i = 0; i < sizeof(header); i++) {  \
+                     ret = cdns_mhdp_mailbox_read(__mhdp);  \
+                     if (ret < 0)  \
+                             break;  \ \
+                     header[i] = ret;  \
+             }  \
+\
+             mbox_size = get_unaligned_be16(header + 2);  \ \
+             if ((__opcode) != header[0] || (__module_id) != header[1]

||  \
> +                 (__req_size) != mbox_size) {  \
> +                     /* If the message in mailbox is not what we

want, we need to

include/drm/bridge/cdns-mhdp-mailbox.h line 86

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+                      * clear the mailbox by reading its contents. */

\

include/drm/bridge/cdns-mhdp-mailbox.h line 88

Quoted 2 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +2 -0

+                     for (i = 0; i < mbox_size; i++)   \
+                             if (cdns_mhdp_mailbox_read(__mhdp)

< 0) \

Quoted 31 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +31 -0

+                                     break;  \ \
+                     ret = -EINVAL;  \
+             }  \
+\
+             ret = 0; \
+\
+     } while (0);  \
+\
+     ret;  \
+})
+
+#define cdns_mhdp_mailbox_recv_data(mhdp, buff, buff_size)  \ ({  \
+     u32 i;  \
+     int ret;  \
+\
+     do {  \
+             for (i = 0; i < buff_size; i++) {  \
+                     ret = cdns_mhdp_mailbox_read(mhdp);  \
+                     if (ret < 0)  \
+                             break;  \ \
+                     ((u8 *)buff)[i] = ret;  \
+             }  \
+\
+             ret = 0;  \
+\
+     } while (0);  \
+\
+     ret; \
+})
+
+#define cdns_mhdp_mailbox_send(mhdp, module_id, opcode, size,

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 10 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +10 -0

+message)  \ ({  \
+     u8 header[4];  \
+     int ret, i;  \
+\
+     header[0] = opcode;  \
+     header[1] = module_id;  \
+     put_unaligned_be16(size, header + 2);  \ \
+     do {  \
+             for (i = 0; i < sizeof(header); i++) {  \
+                     ret = cdns_mhdp_mailbox_write(mhdp,

header[i]); \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 6 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +6 -0

+                     if (ret < 0)  \
+                             break;  \
+             }  \
+\
+             for (i = 0; i < size; i++) {  \
+                     ret = cdns_mhdp_mailbox_write(mhdp, ((u8

*)message)[i]); \

Quoted 7 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +7 -0

+                     if (ret < 0)  \
+                             break;;  \
+             }  \
+             ret = 0;  \
+     } while (0);  \
+\
+     ret;  \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 10 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +10 -0

+})
+
+#define cdns_mhdp_reg_read(mhdp, addr, value)  \ ({  \
+     u8 msg[4], resp[8];  \
+     int ret;  \
+\
+     put_unaligned_be32(addr, msg);  \ \
+     mutex_lock(&mhdp->mbox_mutex);  \ \
+     do {  \
+             ret = cdns_mhdp_mailbox_send(mhdp,

MB_MODULE_ID_GENERAL, \

include/drm/bridge/cdns-mhdp-mailbox.h line 153

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+

GENERAL_REGISTER_READ, \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 5 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +5 -0

+                                          sizeof(msg), msg);  \
+             if (ret < 0)  \
+                     break;  \
+\
+             ret = cdns_mhdp_mailbox_recv_header(mhdp,

MB_MODULE_ID_GENERAL, \

include/drm/bridge/cdns-mhdp-mailbox.h line 159

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+

GENERAL_REGISTER_READ, \

include/drm/bridge/cdns-mhdp-mailbox.h line 160

Quoted 1 line

include/drm/bridge/cdns-mhdp-mailbox.h new file +1 -0

+                                                 sizeof(resp));

\

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 4 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +4 -0

+             if (ret < 0)  \
+                     break;  \
+\
+             ret = cdns_mhdp_mailbox_recv_data(mhdp, resp,

sizeof(resp)); \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 4 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +4 -0

+             if (ret < 0)  \
+                     break;  \
+\
+             /* Returned address value should be the same as

requested */ \

Quoted 16 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +16 -0

+             if (memcmp(msg, resp, sizeof(msg))) {  \
+                     ret = -EINVAL;  \
+                     break;  \
+             }  \
+\
+             *((u32 *)value) = get_unaligned_be32(resp + 4);  \
+                     ret = 0;  \
+     } while (0);  \
+\
+     mutex_unlock(&mhdp->mbox_mutex);  \
+     if (ret < 0) {  \
+             dev_err(mhdp->dev, "Failed to read register\n");  \
+             *((u32 *)value) = 0;  \
+     }  \
+\
+     ret;  \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 10 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +10 -0

+})
+
+#define cdns_mhdp_reg_write(mhdp, addr, val)  \ ({  \
+     u8 msg[8];  \
+     int ret;  \
+\
+     put_unaligned_be32(addr, msg);  \
+     put_unaligned_be32(val, msg + 4);  \ \
+     mutex_lock(&mhdp->mbox_mutex);  \ \
+     ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL,

\

Quoted 8 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +8 -0

+                                   GENERAL_REGISTER_WRITE,
+sizeof(msg), msg);  \ \
+     mutex_unlock(&mhdp->mbox_mutex);  \ \
+     ret;  \
+})
+
+#define cdns_mhdp_reg_write_bit(mhdp, addr, start_bit, bits_no, val)
+\ ({  \

include/drm/bridge/cdns-mhdp-mailbox.h

Quoted 10 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +10 -0

+     u8 field[8];  \
+     int ret;  \
+\
+     put_unaligned_be16(addr, field);  \
+     field[2] = start_bit;  \
+     field[3] = bits_no;  \
+     put_unaligned_be32(val, field + 4);  \ \
+     mutex_lock(&mhdp->mbox_mutex);  \ \
+     ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX, \
+                                  DPTX_WRITE_FIELD,

sizeof(field),

Quoted 6 lines

include/drm/bridge/cdns-mhdp-mailbox.h new file +6 -0

+field);  \ \
+     mutex_unlock(&mhdp->mbox_mutex);  \ \
+     ret; \
+})
+
+#endif

Add bindings for i.MX8MQ MHDP DisplayPort.

Signed-off-by Sandor Yu <[email protected]>

---
 .../display/bridge/cdns,mhdp-imx8mq-dp.yaml   | 102 ++++++++++++++++++
 1 file changed, 102 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp-imx8mq-dp.yaml

Documentation/devicetree/bindings/display/bridge/cdns,mhdp-imx8mq-dp.yaml new file +8 -0

new file mode 100644
index 000000000000..21cf87c79766
@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/cdns,mhdp-imx8mq-dp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence MHDP Displayport bridge
+

Documentation/devicetree/bindings/display/bridge/cdns,mhdp-imx8mq-dp.yaml new file +77 -0

+
+  phys:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: Hotplug cable plugin.
+      - description: Hotplug cable plugout.
+
+  interrupt-names:
+    items:
+      - const: plug_in
+      - const: plug_out
+
+  ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+
+    properties:
+      port@0:
+        $ref: /schemas/graph.yaml#/properties/port
+        description:
+          Input port from display controller output.
+      port@1:
+        $ref: /schemas/graph.yaml#/properties/port
+        description:
+          Output port to DP connector.
+
+    required:
+      - port@0
+      - port@1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - interrupts
+  - interrupt-names
+  - phys
+  - ports
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mq-clock.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    mhdp_dp: dp-bridge@32c00000 {
+        compatible = "cdns,mhdp-imx8mq-dp";
+        reg = <0x32c00000 0x100000>;
+        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "plug_in", "plug_out";
+        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
+        phys = <&dp_phy>;
+
+        ports {
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            port@0 {
+                reg = <0>;
+
+                mhdp_in: endpoint {
+                    remote-endpoint = <&dcss_out>;
+                };
+            };
+
+            port@1 {
+                reg = <1>;
+
+                mhdp_out: endpoint {
+                    remote-endpoint = <&dp_con>;
+                };
+            };
+        };
+    };

Signature · 1 line

2.34.1

Add bindings for i.MX8MQ MHDP HDMI.

Signed-off-by Sandor Yu <[email protected]>

---
 .../display/bridge/cdns,mhdp-imx8mq-hdmi.yaml | 102 ++++++++++++++++++
 1 file changed, 102 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp-imx8mq-hdmi.yaml

Documentation/devicetree/bindings/display/bridge/cdns,mhdp-imx8mq-hdmi.yaml new file +3 -0

new file mode 100644
index 000000000000..cca6954a84ff
@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---

Documentation/devicetree/bindings/display/bridge/cdns,mhdp-imx8mq-hdmi.yaml new file +84 -0

+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+    description: MHDP HDMI APB clock.
+
+  phys:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: Hotplug cable plugin.
+      - description: Hotplug cable plugout.
+
+  interrupt-names:
+    items:
+      - const: plug_in
+      - const: plug_out
+
+  ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+
+    properties:
+      port@0:
+        $ref: /schemas/graph.yaml#/properties/port
+        description:
+          Input port from display controller output.
+
+      port@1:
+        $ref: /schemas/graph.yaml#/properties/port
+        description:
+          Output port to HDMI connector.
+
+    required:
+      - port@0
+      - port@1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - interrupts
+  - interrupt-names
+  - phys
+  - ports
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mq-clock.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    mhdp_hdmi: hdmi-bridge@32c00000 {
+        compatible = "cdns,mhdp-imx8mq-hdmi";
+        reg = <0x32c00000 0x100000>;
+        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "plug_in", "plug_out";
+        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
+        phys = <&hdmi_phy>;
+
+        ports {
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            port@0 {
+                reg = <0>;
+
+                mhdp_in: endpoint {
+                    remote-endpoint = <&dcss_out>;
+                };
+            };
+
+            port@1 {
+                reg = <1>;
+
+                mhdp_out: endpoint {
+                    remote-endpoint = <&hdmi_con>;
+                };
+            };
+        };
+    };

Signature · 1 line

2.34.1

Add bindings for Cadence HDP-TX DisplayPort PHY.

Signed-off-by Sandor Yu <[email protected]>

---
 .../bindings/phy/cdns,hdptx-dp-phy.yaml       | 68 +++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml

Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml new file +5 -0

new file mode 100644
index 000000000000..f4f741150c12
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/cdns,hdptx-dp-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#

Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml new file +8 -0

+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: PHY reference clock.
+      - description: APB clock.

Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml new file +28 -0

+    description:
+      Maximum DisplayPort link bit rate to use, in Mbps
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [2160, 2430, 2700, 3240, 4320, 5400]
+    default: 5400
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8mq-clock.h>
+    #include <dt-bindings/phy/phy.h>
+    dp_phy: phy@32c00000 {
+        compatible = "cdns,hdptx-dp-phy";
+        reg = <0x32c00000 0x100000>;
+        #phy-cells = <0>;
+        clocks = <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
+        clock-names = "ref", "apb";
+        cdns,num-lanes = <4>;
+        cdns,max-bit-rate = <5400>;
+    };

Signature · 1 line

2.34.1