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Add support for Variscite VAR-SOM-MX7 and MX7CustomBoard

PATCH Superseded Stefano Radaelli 3 participants 7 messages Aug 26

Subsystems (2)

v5 of 8 Superseded Latest is v8 →

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v5 cover Add support for Variscite VAR-SOM-MX7 and MX7CustomBoard

This patch series adds support for the Variscite VAR-SOM-MX7 system on module and the MX7CustomBoard carrier board.

The series includes:

- DT bindings for the supported VAR-SOM-MX7 board configurations
- VAR-SOM-MX7 device tree support, including V1 and V2 hardware revisions
- MX7CustomBoard carrier board support
- eMMC and NAND storage variants
- optional WM8731 audio codec support

The implementation follows the standard SOM + carrier board pattern, where the common SOM dtsi contains the on-module peripherals and hardware revision differences, while the MX7CustomBoard dtsi contains the carrier-specific interfaces.

The final board device trees combine the supported VAR-SOM-MX7 configurations with the MX7CustomBoard carrier board.

v4->v5:
- Removed wrong gpio-hog

v3->v4:
- Fixed non-generic names and wrong separators
- Fixed ads7846_ts pendown gpio

v2->v3:
- Removed wrong header in dtsi
- Fixed pinctrl name
- Fixed sai clocks

v1->v2:
- Fixed commit messages and spacing
- Moved ethphy1 reset pin mux
- Fixed irq types
- Removed duplicate assigned-clock-rates property
- fixed wifi child node name
- Added color property in gpio led definition
- Updated deprecated reset-gpio property
- Added disable-over-current property in usb nodes
- Fixed model names

Stefano Radaelli (3):
dt-bindings: arm: fsl: add Variscite VAR-SOM-MX7 boards
ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support
ARM: dts: imx7d: add Variscite MX7CustomBoard support

 .../devicetree/bindings/arm/fsl.yaml          |  17 +
 arch/arm/boot/dts/nxp/imx/Makefile            |   6 +
 .../imx/imx7d-var-som-emmc-mx7customboard.dts |  22 +
 ...x7d-var-som-emmc-wm8731-mx7customboard.dts |  23 +
 .../boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi  |  90 +++
 .../nxp/imx/imx7d-var-som-mx7customboard.dtsi | 382 +++++++++++
 .../imx/imx7d-var-som-nand-mx7customboard.dts |  22 +
 ...x7d-var-som-nand-wm8731-mx7customboard.dts |  23 +
 .../boot/dts/nxp/imx/imx7d-var-som-nand.dtsi  |  73 ++
 .../imx7d-var-som-v2-emmc-mx7customboard.dts  |  23 +
 .../imx7d-var-som-v2-nand-mx7customboard.dts  |  23 +
 .../boot/dts/nxp/imx/imx7d-var-som-v2.dtsi    |  66 ++
 .../dts/nxp/imx/imx7d-var-som-wm8731.dtsi     |  65 ++
 arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi  | 635 ++++++++++++++++++
 14 files changed, 1470 insertions(+)
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-wm8731-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-wm8731-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-emmc-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-nand-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi

base-commit: 9400c5b6aa357be2379c98ae86a207bc21dc7a48

Signature · 1 line
2.47.3
#1 lore raw

PATCH v5 1/3 dt-bindings: arm: fsl: add Variscite VAR-SOM-MX7 boards

From: Stefano Radaelli <[email protected]>

Add DT compatible strings for the Variscite VAR-SOM-MX7 SoM variants used with the MX7CustomBoard carrier board.

Both the first and second hardware revisions are supported, including eMMC and NAND configurations, with WM8731 variants available for the first hardware revision.

---
v4->v5:
-

v3->v4:
-

v2->v3:
-

v1->v2:
- Fixed commit message
- Fixed spacing

 Documentation/devicetree/bindings/arm/fsl.yaml | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
Documentation/devicetree/bindings/arm/fsl.yaml +17 -0
index 656f2596e1d5..b732ff810265 100644
@@ -950,6 +950,23 @@ properties:
           - const: toradex,colibri-imx7d-emmc
           - const: fsl,imx7d
 
+      - description: i.MX7D Variscite Boards based on VAR-SOM-MX7 Module
+        oneOf:
+          - items:
+              - enum:
+                  - variscite,var-som-imx7d-emmc-mx7customboard
+                  - variscite,var-som-imx7d-emmc-wm8731-mx7customboard
+                  - variscite,var-som-imx7d-nand-mx7customboard
+                  - variscite,var-som-imx7d-nand-wm8731-mx7customboard
+              - const: variscite,var-som-imx7d
+              - const: fsl,imx7d
+          - items:
+              - enum:
+                  - variscite,var-som-imx7d-v2-emmc-mx7customboard
+                  - variscite,var-som-imx7d-v2-nand-mx7customboard
+              - const: variscite,var-som-imx7d-v2
+              - const: fsl,imx7d
+
       - description: i.MX7ULP based Boards
         items:
           - enum:
Signature · 1 line
2.47.3
#2 lore raw

PATCH v5 2/3 ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support

In reply to Stefano Radaelli

From: Stefano Radaelli <[email protected]>

Add device tree support for the Variscite VAR-SOM-MX7 system on module.

The module is based on the NXP i.MX7Dual SoC and is available in multiple configurations and hardware revisions.

Add the common SoM description together with support for:
- eMMC storage
- NAND storage
- WM8731 audio codec
- VAR-SOM-MX7 V2 hardware revision

Only SoM-specific peripherals are described here. Carrier board specific interfaces are provided by the respective carrier board device trees.

---
v4->v5:
- Removed wrong gpio-hog

v3->v4:
- Fixed non-generic names and wrong separators
- Fixed ads7846_ts pendown gpio

v2->v3:
- Removed wrong header in dtsi
- Fixed pinctrl name
- Fixed sai clocks

v1->v2:
- Moved ethphy1 reset pin mux
- Fixed irq types
- Removed duplicate assigned-clock-rates property
- fixed wifi child node name
- Added color property in gpio led definition
- Updated deprecated reset-gpio propery
- Added disable-over-current property in usb nodes

 .../boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi  |  90 +++
 .../nxp/imx/imx7d-var-som-mx7customboard.dtsi | 382 +++++++++++
 .../boot/dts/nxp/imx/imx7d-var-som-nand.dtsi  |  73 ++
 .../boot/dts/nxp/imx/imx7d-var-som-v2.dtsi    |  66 ++
 .../dts/nxp/imx/imx7d-var-som-wm8731.dtsi     |  65 ++
 arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi  | 635 ++++++++++++++++++
 6 files changed, 1311 insertions(+)
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi
arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi new file +90 -0
new file mode 100644
index 000000000000..383c70329780
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Common dtsi for eMMC support on Variscite VAR-SOM-MX7
+ *
+ * Link: https://variscite.com/system-on-module-som/i-mx-7/var-som-mx7/
+ *
+ * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
+ *
+ */
+
+&usdhc3 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	pinctrl-3 = <&pinctrl_usdhc3_sleep>;
+	vmmc-supply = <&vgen3_reg>;
+	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
+	assigned-clock-rates = <400000000>;
+	no-1-8-v;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl_usdhc3: usdhc3grp {
+		fsl,pins = <
+			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x59
+			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
+			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
+			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
+			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
+			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
+			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
+			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
+			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
+			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
+			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
+		>;
+	};
+
+	pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+		fsl,pins = <
+			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x59
+			MX7D_PAD_SD3_CMD__SD3_CMD		0x5a
+			MX7D_PAD_SD3_CLK__SD3_CLK		0x1a
+			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a
+			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a
+			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a
+			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a
+			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a
+			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a
+			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a
+			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a
+		>;
+	};
+
+	pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+		fsl,pins = <
+			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x59
+			MX7D_PAD_SD3_CMD__SD3_CMD		0x5b
+			MX7D_PAD_SD3_CLK__SD3_CLK		0x1b
+			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b
+			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b
+			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b
+			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b
+			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b
+			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b
+			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b
+			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b
+		>;
+	};
+
+	pinctrl_usdhc3_sleep: usdhc3-sleepgrp {
+		fsl,pins = <
+			MX7D_PAD_SD3_RESET_B__GPIO6_IO11	0x10
+			MX7D_PAD_SD3_CMD__GPIO6_IO1		0x10
+			MX7D_PAD_SD3_CLK__GPIO6_IO0		0x10
+			MX7D_PAD_SD3_DATA0__GPIO6_IO2		0x10
+			MX7D_PAD_SD3_DATA1__GPIO6_IO3		0x10
+			MX7D_PAD_SD3_DATA2__GPIO6_IO4		0x10
+			MX7D_PAD_SD3_DATA3__GPIO6_IO5		0x10
+			MX7D_PAD_SD3_DATA4__GPIO6_IO6		0x10
+			MX7D_PAD_SD3_DATA5__GPIO6_IO7		0x10
+			MX7D_PAD_SD3_DATA6__GPIO6_IO8		0x10
+			MX7D_PAD_SD3_DATA7__GPIO6_IO9		0x10
+		>;
+	};
+};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +382 -0

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arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand.dtsi new file +73 -0

73 lines not on this page · raw message

arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2.dtsi new file +66 -0

66 lines not on this page · raw message

arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +65 -0

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arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +635 -0

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Signature · 1 line
2.47.3
#3 lore raw

Re: [PATCH v5 2/3] ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: - [Medium] Contradictory microphone routing disables analog capture on WM8904. - [Medium] Contradictory…

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Contradictory microphone routing disables analog capture on WM8904.
- [Medium] Contradictory no-1-8-v property in usdhc1 disables UHS SD card speeds despite hardware support. --

commit 5821f4e873dc44e1cfd4f21d2d7e03f1e0298edd
Author: Stefano Radaelli <[email protected]>

ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support

Add device tree support for the Variscite VAR-SOM-MX7 system on module. The module is based on the NXP i.MX7Dual SoC and is available in multiple configurations and hardware revisions.

Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +0 -0
index 0000000000000..aecc8c747f041

[ ... ]

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi line 214

Quoted 7 lines

+&usdhc1 {

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +6 -0
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
+	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+	no-1-8-v;

[Severity: Medium]
Does including the no-1-8-v property here needlessly cap SD card performance by explicitly disabling all 1.8V capabilities and preventing UHS-I negotiation?

The pinctrl configurations below for SD1_VSELECT prove the hardware supports 1.8V switching:

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi line 322

Quoted 6 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +6 -0
+	pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
+		fsl,pins = <
+			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59
+			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59
+		>;
+	};

With no-1-8-v present, the MMC subsystem will never switch to 1.8V, rendering the UHS-I pinctrl states dead code and capping speeds at 50MHz.

Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +0 -0
index 0000000000000..158158afc3391

[ ... ]

Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +4 -0
+	codec_wm8904: sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,bitclock-master = <&dailink_master>;
+		simple-audio-card,format = "i2s";

arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 57

Quoted 10 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +10 -0
+		simple-audio-card,frame-master = <&dailink_master>;
+		simple-audio-card,name = "wm8904-audio";
+		simple-audio-card,routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"IN2L", "Line In Jack",
+			"IN2R", "Line In Jack",
+			"IN1L", "Microphone Jack",
+			"IN1R", "Microphone Jack",
+			"Microphone Jack", "MICBIAS";

[Severity: Medium]
Does this routing contradict the configuration of IN1L as a digital input?

The routing maps the analog Microphone Jack to IN1L. However, the wm8904 node configures IN1L as a digital microphone input via wlf,in1l-as-dmicdat1:

Quoted 3 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +3 -0
+	wm8904: audio-codec@1a {
+		compatible = "wlf,wm8904";
+		reg = <0x1a>;

[ ... ]

arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 330

Quoted 3 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +3 -0
+		/* DMIC is connected to IN1L */
+		wlf,in1l-as-dmicdat1;
+	};

Because IN1L is placed in digital mode, does this cause the analog signal from the Microphone Jack to be ignored and break analog audio capture?

Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2
#4 lore raw

Re: [PATCH v5 2/3] ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support

Quoted 21 lines · On Wed, Aug 26, 2026 at 08:31:32AM +0000, [email protected] wrote:
Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +0 -0
index 0000000000000..aecc8c747f041

[ ... ]

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi line 214

Quoted 7 lines

+&usdhc1 {

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +6 -0
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
+	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+	no-1-8-v;

[Severity: Medium]
Does including the no-1-8-v property here needlessly cap SD card performance by explicitly disabling all 1.8V capabilities and preventing UHS-I negotiation?

The pinctrl configurations below for SD1_VSELECT prove the hardware supports 1.8V switching:

Quoted 9 lines

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi line 322

Quoted 6 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +6 -0
+	pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
+		fsl,pins = <
+			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59
+			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59
+		>;
+	};

With no-1-8-v present, the MMC subsystem will never switch to 1.8V, rendering the UHS-I pinctrl states dead code and capping speeds at 50MHz.

This is intentional. The board does not support reliable 1.8V signaling on this SD interface, so no-1-8-v is required despite the presence of the VSELECT pinmux.

Quoted 31 lines
Quoted 5 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +0 -0
index 0000000000000..158158afc3391

[ ... ]

Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +4 -0
+	codec_wm8904: sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,bitclock-master = <&dailink_master>;
+		simple-audio-card,format = "i2s";

arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 57

Quoted 10 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +10 -0
+		simple-audio-card,frame-master = <&dailink_master>;
+		simple-audio-card,name = "wm8904-audio";
+		simple-audio-card,routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"IN2L", "Line In Jack",
+			"IN2R", "Line In Jack",
+			"IN1L", "Microphone Jack",
+			"IN1R", "Microphone Jack",
+			"Microphone Jack", "MICBIAS";

[Severity: Medium]
Does this routing contradict the configuration of IN1L as a digital input?

The routing maps the analog Microphone Jack to IN1L. However, the wm8904 node configures IN1L as a digital microphone input via wlf,in1l-as-dmicdat1:

Quoted 3 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +3 -0
+	wm8904: audio-codec@1a {
+		compatible = "wlf,wm8904";
+		reg = <0x1a>;

[ ... ]

Quoted 6 lines

arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 330

Quoted 3 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +3 -0
+		/* DMIC is connected to IN1L */
+		wlf,in1l-as-dmicdat1;
+	};

Because IN1L is placed in digital mode, does this cause the analog signal from the Microphone Jack to be ignored and break analog audio capture?

This is intentional. IN1L is used as DMICDAT1, while the analog microphone path is handled through the remaining codec input routing. The current routing matches the board hardware configuration.

Stefano

#5 lore raw

Re: [PATCH v5 2/3] ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support

Quoted 32 lines · Stefano Radaelli
Quoted 21 lines · On Wed, Aug 26, 2026 at 08:31:32AM +0000, [email protected] wrote:
Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +0 -0
index 0000000000000..aecc8c747f041

[ ... ]

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi line 214

Quoted 7 lines

+&usdhc1 {

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +6 -0
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
+	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+	no-1-8-v;

[Severity: Medium]
Does including the no-1-8-v property here needlessly cap SD card performance by explicitly disabling all 1.8V capabilities and preventing UHS-I negotiation?

The pinctrl configurations below for SD1_VSELECT prove the hardware supports 1.8V switching:

Quoted 9 lines

arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi line 322

Quoted 6 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +6 -0
+	pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
+		fsl,pins = <
+			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59
+			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59
+		>;
+	};

With no-1-8-v present, the MMC subsystem will never switch to 1.8V, rendering the UHS-I pinctrl states dead code and capping speeds at 50MHz.

Quoted 3 lines

This is intentional. The board does not support reliable 1.8V signaling on this SD interface, so no-1-8-v is required despite the presence of the VSELECT pinmux.

Needn't pinctrl_usdhc1_100mhz and pinctrl_usdhc1_200mhz if don't support sd3.0

Frank

Quoted 45 lines
Quoted 32 lines
Quoted 6 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +0 -0
index 0000000000000..158158afc3391

[ ... ]

Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +4 -0
+	codec_wm8904: sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,bitclock-master = <&dailink_master>;
+		simple-audio-card,format = "i2s";

arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 57

Quoted 10 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +10 -0
+		simple-audio-card,frame-master = <&dailink_master>;
+		simple-audio-card,name = "wm8904-audio";
+		simple-audio-card,routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"IN2L", "Line In Jack",
+			"IN2R", "Line In Jack",
+			"IN1L", "Microphone Jack",
+			"IN1R", "Microphone Jack",
+			"Microphone Jack", "MICBIAS";

[Severity: Medium]
Does this routing contradict the configuration of IN1L as a digital input?

The routing maps the analog Microphone Jack to IN1L. However, the wm8904 node configures IN1L as a digital microphone input via wlf,in1l-as-dmicdat1:

Quoted 3 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +3 -0
+	wm8904: audio-codec@1a {
+		compatible = "wlf,wm8904";
+		reg = <0x1a>;

[ ... ]

Quoted 6 lines

arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 330

Quoted 3 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +3 -0
+		/* DMIC is connected to IN1L */
+		wlf,in1l-as-dmicdat1;
+	};

Because IN1L is placed in digital mode, does this cause the analog signal from the Microphone Jack to be ignored and break analog audio capture?

This is intentional. IN1L is used as DMICDAT1, while the analog microphone path is handled through the remaining codec input routing. The current routing matches the board hardware configuration.

Stefano

#6 lore raw

PATCH v5 3/3 ARM: dts: imx7d: add Variscite MX7CustomBoard support

In reply to Stefano Radaelli

From: Stefano Radaelli <[email protected]>

Add device tree support for the Variscite MX7CustomBoard carrier board with the VAR-SOM-MX7 system on module.

This includes supported board configurations for both VAR-SOM-MX7 hardware revisions, with eMMC and NAND variants, and WM8731 variants for the first hardware revision.

Also add the resulting DTBs to the i.MX7D device tree Makefile.

---
v4->v5:
-

v3->v4:
-

v2->v3:
-

v1->v2:
- Fixed commit message
- Fixed model names

 arch/arm/boot/dts/nxp/imx/Makefile            |  6 +++++
 .../imx/imx7d-var-som-emmc-mx7customboard.dts | 22 ++++++++++++++++++
 ...x7d-var-som-emmc-wm8731-mx7customboard.dts | 23 +++++++++++++++++++
 .../imx/imx7d-var-som-nand-mx7customboard.dts | 22 ++++++++++++++++++
 ...x7d-var-som-nand-wm8731-mx7customboard.dts | 23 +++++++++++++++++++
 .../imx7d-var-som-v2-emmc-mx7customboard.dts  | 23 +++++++++++++++++++
 .../imx7d-var-som-v2-nand-mx7customboard.dts  | 23 +++++++++++++++++++
 7 files changed, 142 insertions(+)
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-wm8731-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-wm8731-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-emmc-mx7customboard.dts
 create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-nand-mx7customboard.dts
arch/arm/boot/dts/nxp/imx/Makefile +6 -0
index 1a2539fa19b4..37da667f9ffb 100644
@@ -444,6 +444,12 @@ dtb-$(CONFIG_SOC_IMX7D) += \
 	imx7d-sdb-reva.dtb \
 	imx7d-sdb-sht11.dtb \
 	imx7d-smegw01.dtb \
+	imx7d-var-som-emmc-mx7customboard.dtb \
+	imx7d-var-som-emmc-wm8731-mx7customboard.dtb \
+	imx7d-var-som-nand-mx7customboard.dtb \
+	imx7d-var-som-nand-wm8731-mx7customboard.dtb \
+	imx7d-var-som-v2-emmc-mx7customboard.dtb \
+	imx7d-var-som-v2-nand-mx7customboard.dtb \
 	imx7d-zii-rmu2.dtb \
 	imx7d-zii-rpu2.dtb \
 	imx7s-colibri-aster.dtb \
arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-mx7customboard.dts new file +22 -0
new file mode 100644
index 000000000000..855b621b0ee8
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * VAR-MX7CustomBoard for VAR-SOM-MX7 with eMMC
+ *
+ * Link: https://variscite.com/carrier-boards/var-mx7customboard/
+ *
+ * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
+ *
+ */
+
+/dts-v1/;
+
+#include "imx7d-var-som.dtsi"
+#include "imx7d-var-som-emmc.dtsi"
+#include "imx7d-var-som-mx7customboard.dtsi"
+
+/ {
+	model = "Variscite VAR-SOM-MX7 with eMMC & WM8904 on VAR-MX7CustomBoard";
+	compatible = "variscite,var-som-imx7d-emmc-mx7customboard",
+		     "variscite,var-som-imx7d",
+		     "fsl,imx7d";
+};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-wm8731-mx7customboard.dts new file +23 -0
new file mode 100644
index 000000000000..94c4b1fa5d6c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * VAR-MX7CustomBoard for VAR-SOM-MX7 with eMMC and WM8731
+ *
+ * Link: https://variscite.com/carrier-boards/var-mx7customboard/
+ *
+ * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
+ *
+ */
+
+/dts-v1/;
+
+#include "imx7d-var-som.dtsi"
+#include "imx7d-var-som-emmc.dtsi"
+#include "imx7d-var-som-wm8731.dtsi"
+#include "imx7d-var-som-mx7customboard.dtsi"
+
+/ {
+	model = "Variscite VAR-SOM-MX7 with eMMC & WM8731 on VAR-MX7CustomBoard";
+	compatible = "variscite,var-som-imx7d-emmc-wm8731-mx7customboard",
+		     "variscite,var-som-imx7d",
+		     "fsl,imx7d";
+};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-mx7customboard.dts new file +22 -0
new file mode 100644
index 000000000000..0da9653ecffc
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * VAR-MX7CustomBoard for VAR-SOM-MX7 with NAND
+ *
+ * Link: https://variscite.com/carrier-boards/var-mx7customboard/
+ *
+ * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
+ *
+ */
+
+/dts-v1/;
+
+#include "imx7d-var-som.dtsi"
+#include "imx7d-var-som-nand.dtsi"
+#include "imx7d-var-som-mx7customboard.dtsi"
+
+/ {
+	model = "Variscite VAR-SOM-MX7 with NAND flash & WM8904 on VAR-MX7CustomBoard";
+	compatible = "variscite,var-som-imx7d-nand-mx7customboard",
+		     "variscite,var-som-imx7d",
+		     "fsl,imx7d";
+};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-wm8731-mx7customboard.dts new file +23 -0
new file mode 100644
index 000000000000..603b2dbf4c8e
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * VAR-MX7CustomBoard for VAR-SOM-MX7 with NAND and WM8731
+ *
+ * Link: https://variscite.com/carrier-boards/var-mx7customboard/
+ *
+ * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
+ *
+ */
+
+/dts-v1/;
+
+#include "imx7d-var-som.dtsi"
+#include "imx7d-var-som-nand.dtsi"
+#include "imx7d-var-som-wm8731.dtsi"
+#include "imx7d-var-som-mx7customboard.dtsi"
+
+/ {
+	model = "Variscite VAR-SOM-MX7 with NAND flash & WM8731 on VAR-MX7CustomBoard";
+	compatible = "variscite,var-som-imx7d-nand-wm8731-mx7customboard",
+		     "variscite,var-som-imx7d",
+		     "fsl,imx7d";
+};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-emmc-mx7customboard.dts new file +23 -0
new file mode 100644
index 000000000000..12971bfefdcc
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * VAR-MX7CustomBoard for VAR-SOM-MX7 V2 with eMMC
+ *
+ * Link: https://variscite.com/carrier-boards/var-mx7customboard/
+ *
+ * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
+ *
+ */
+
+/dts-v1/;
+
+#include "imx7d-var-som.dtsi"
+#include "imx7d-var-som-v2.dtsi"
+#include "imx7d-var-som-emmc.dtsi"
+#include "imx7d-var-som-mx7customboard.dtsi"
+
+/ {
+	model = "Variscite VAR-SOM-MX7-5G_V2 with eMMC & WM8904 on VAR-MX7CustomBoard";
+	compatible = "variscite,var-som-imx7d-v2-emmc-mx7customboard",
+		     "variscite,var-som-imx7d-v2",
+		     "fsl,imx7d";
+};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-nand-mx7customboard.dts new file +23 -0
new file mode 100644
index 000000000000..1c465e89f198
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * VAR-MX7CustomBoard for VAR-SOM-MX7 V2 with NAND
+ *
+ * Link: https://variscite.com/carrier-boards/var-mx7customboard/
+ *
+ * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
+ *
+ */
+
+/dts-v1/;
+
+#include "imx7d-var-som.dtsi"
+#include "imx7d-var-som-v2.dtsi"
+#include "imx7d-var-som-nand.dtsi"
+#include "imx7d-var-som-mx7customboard.dtsi"
+
+/ {
+	model = "Variscite VAR-SOM-MX7-5G_V2 with NAND flash & WM8904 on VAR-MX7CustomBoard";
+	compatible = "variscite,var-som-imx7d-v2-nand-mx7customboard",
+		     "variscite,var-som-imx7d-v2",
+		     "fsl,imx7d";
+};
Signature · 1 line
2.47.3