Add support for Variscite VAR-SOM-MX7 and MX7CustomBoard
Subsystems (2)
v7 cover Add support for Variscite VAR-SOM-MX7 and MX7CustomBoard
This patch series adds support for the Variscite VAR-SOM-MX7 system on module and the MX7CustomBoard carrier board.
The series includes:
- DT bindings for the supported VAR-SOM-MX7 board configurations
- VAR-SOM-MX7 device tree support, including V1 and V2 hardware revisions
- MX7CustomBoard carrier board support
- eMMC and NAND storage variants
- optional WM8731 audio codec support
The implementation follows the standard SOM + carrier board pattern, where the common SOM dtsi contains the on-module peripherals and hardware revision differences, while the MX7CustomBoard dtsi contains the carrier-specific interfaces.
The final board device trees combine the supported VAR-SOM-MX7 configurations with the MX7CustomBoard carrier board.
v6->v7:
- Added common dtsi for wm8904 codec removing it from base dtsi
- Spacing cleanup
v5->v6:
- Removed unused 100mhz and 200mhz pinctrl
v4->v5:
- Removed wrong gpio-hog
v3->v4:
- Fixed non-generic names and wrong separators
- Fixed ads7846_ts pendown gpio
v2->v3:
- Removed wrong header in dtsi
- Fixed pinctrl name
- Fixed sai clocks
v1->v2:
- Fixed commit messages and spacing
- Moved ethphy1 reset pin mux
- Fixed irq types
- Removed duplicate assigned-clock-rates property
- fixed wifi child node name
- Added color property in gpio led definition
- Updated deprecated reset-gpio property
- Added disable-over-current property in usb nodes
- Fixed model names
Stefano Radaelli (3):
dt-bindings: arm: fsl: add Variscite VAR-SOM-MX7 boards
ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support
ARM: dts: imx7d: add Variscite MX7CustomBoard support
.../devicetree/bindings/arm/fsl.yaml | 17 + arch/arm/boot/dts/nxp/imx/Makefile | 6 + .../imx/imx7d-var-som-emmc-mx7customboard.dts | 23 + ...x7d-var-som-emmc-wm8731-mx7customboard.dts | 23 + .../boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi | 56 ++ .../nxp/imx/imx7d-var-som-mx7customboard.dtsi | 358 ++++++++++++ .../imx/imx7d-var-som-nand-mx7customboard.dts | 23 + ...x7d-var-som-nand-wm8731-mx7customboard.dts | 23 + .../boot/dts/nxp/imx/imx7d-var-som-nand.dtsi | 73 +++ .../imx7d-var-som-v2-emmc-mx7customboard.dts | 24 + .../imx7d-var-som-v2-nand-mx7customboard.dts | 24 + .../boot/dts/nxp/imx/imx7d-var-som-v2.dtsi | 66 +++ .../dts/nxp/imx/imx7d-var-som-wm8731.dtsi | 102 ++++ .../dts/nxp/imx/imx7d-var-som-wm8904.dtsi | 118 ++++ arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi | 533 ++++++++++++++++++ 15 files changed, 1469 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-wm8731-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-wm8731-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-emmc-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-nand-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8904.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi
base-commit: 9400c5b6aa357be2379c98ae86a207bc21dc7a48
Signature · 1 line
2.47.3
PATCH v7 1/3 dt-bindings: arm: fsl: add Variscite VAR-SOM-MX7 boards
From: Stefano Radaelli <[email protected]>
Add DT compatible strings for the Variscite VAR-SOM-MX7 SoM variants used with the MX7CustomBoard carrier board.
Both the first and second hardware revisions are supported, including eMMC and NAND configurations, with WM8731 variants available for the first hardware revision.
---v6->v7:
-
v5->v6:
-
v4->v5:
-
v3->v4:
-
v2->v3:
-
v1->v2:
- Fixed commit message
- Fixed spacing
Documentation/devicetree/bindings/arm/fsl.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
Documentation/devicetree/bindings/arm/fsl.yaml +17 -0
@@ -950,6 +950,23 @@ properties: - const: toradex,colibri-imx7d-emmc - const: fsl,imx7d + - description: i.MX7D Variscite Boards based on VAR-SOM-MX7 Module + oneOf: + - items: + - enum: + - variscite,var-som-imx7d-emmc-mx7customboard + - variscite,var-som-imx7d-emmc-wm8731-mx7customboard + - variscite,var-som-imx7d-nand-mx7customboard + - variscite,var-som-imx7d-nand-wm8731-mx7customboard + - const: variscite,var-som-imx7d + - const: fsl,imx7d + - items: + - enum: + - variscite,var-som-imx7d-v2-emmc-mx7customboard + - variscite,var-som-imx7d-v2-nand-mx7customboard + - const: variscite,var-som-imx7d-v2 + - const: fsl,imx7d + - description: i.MX7ULP based Boards items: - enum:
Signature · 1 line
2.47.3
PATCH v7 2/3 ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support
In reply to Stefano RadaelliFrom: Stefano Radaelli <[email protected]>
Add device tree support for the Variscite VAR-SOM-MX7 system on module.
The module is based on the NXP i.MX7Dual SoC and is available in multiple configurations and hardware revisions.
Add the common SoM description together with support for:
- eMMC storage
- NAND storage
- WM8731 audio codec
- VAR-SOM-MX7 V2 hardware revision
Only SoM-specific peripherals are described here. Carrier board specific interfaces are provided by the respective carrier board device trees.
---v6->v7:
- Added common dtsi for wm8904 codec removing it from base dtsi
- Spacing cleanup
- Removed unused 100mhz and 200mhz pinctrl on usdhc3
v5->v6:
- Removed unused 100mhz and 200mhz pinctrl
v4->v5:
- Removed wrong gpio-hog
v3->v4:
- Fixed non-generic names and wrong separators
- Fixed ads7846_ts pendown gpio
v2->v3:
- Removed wrong header in dtsi
- Fixed pinctrl name
- Fixed sai clocks
v1->v2:
- Moved ethphy1 reset pin mux
- Fixed irq types
- Removed duplicate assigned-clock-rates property
- fixed wifi child node name
- Added color property in gpio led definition
- Updated deprecated reset-gpio propery
- Added disable-over-current property in usb nodes
.../boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi | 56 ++ .../nxp/imx/imx7d-var-som-mx7customboard.dtsi | 358 ++++++++++++ .../boot/dts/nxp/imx/imx7d-var-som-nand.dtsi | 73 +++ .../boot/dts/nxp/imx/imx7d-var-som-v2.dtsi | 66 +++ .../dts/nxp/imx/imx7d-var-som-wm8731.dtsi | 102 ++++ .../dts/nxp/imx/imx7d-var-som-wm8904.dtsi | 118 ++++ arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi | 533 ++++++++++++++++++ 7 files changed, 1306 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8904.dtsi create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi
arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc.dtsi new file +56 -0
@@ -0,0 +1,56 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Common dtsi for eMMC support on Variscite VAR-SOM-MX7 + * + * Link: https://variscite.com/system-on-module-som/i-mx-7/var-som-mx7/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +&usdhc3 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_sleep>; + vmmc-supply = <&vgen3_reg>; + assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; + assigned-clock-rates = <400000000>; + no-1-8-v; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&iomuxc { + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59 + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x19 + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 + >; + }; + + pinctrl_usdhc3_sleep: usdhc3-sleepgrp { + fsl,pins = < + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 0x10 + MX7D_PAD_SD3_CMD__GPIO6_IO1 0x10 + MX7D_PAD_SD3_CLK__GPIO6_IO0 0x10 + MX7D_PAD_SD3_DATA0__GPIO6_IO2 0x10 + MX7D_PAD_SD3_DATA1__GPIO6_IO3 0x10 + MX7D_PAD_SD3_DATA2__GPIO6_IO4 0x10 + MX7D_PAD_SD3_DATA3__GPIO6_IO5 0x10 + MX7D_PAD_SD3_DATA4__GPIO6_IO6 0x10 + MX7D_PAD_SD3_DATA5__GPIO6_IO7 0x10 + MX7D_PAD_SD3_DATA6__GPIO6_IO8 0x10 + MX7D_PAD_SD3_DATA7__GPIO6_IO9 0x10 + >; + }; +};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +358 -0
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arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand.dtsi new file +73 -0
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arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2.dtsi new file +66 -0
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arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +102 -0
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arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8904.dtsi new file +118 -0
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arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +533 -0
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Signature · 1 line
2.47.3
[email protected]
AI reviewRe: [PATCH v7 2/3] ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider: - [High] The VDD_ARM regulator (sw1a) max voltage constraint is dangerously set to 3.3V. - [High] MCLK…
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] The VDD_ARM regulator (sw1a) max voltage constraint is dangerously set to 3.3V.
- [High] MCLK audio clock routing is missing required direction properties and incorrectly assigned to the wrong CCF clock node.
- [Low] Misplaced header inclusion for LED macros creates brittle dependencies.
- [Low] The commit message fails to list support for the WM8904 audio codec.
--
commit 0f005e2caf9fb13eb2178194911af6c97acfe6fc
Author: Stefano Radaelli <[email protected]>
ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support
Add device tree support for the Variscite VAR-SOM-MX7 system on module.
The module is based on the NXP i.MX7Dual SoC and is available in multiple configurations and hardware revisions.
Add the common SoM description together with support for:
- eMMC storage
- NAND storage
- WM8731 audio codec
- VAR-SOM-MX7 V2 hardware revision
Quoted 5 lines
Add the common SoM description together with support for:
- eMMC storage
- NAND storage
- WM8731 audio codec
- VAR-SOM-MX7 V2 hardware revision
[Severity: Low]
Does this list in the commit message omit the WM8904 audio codec, which is also introduced by this patch?
Quoted 5 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +0
-0
[ ... ]
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi line 47
Quoted 8 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-mx7customboard.dtsi new file +8
-0+ leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led-d10 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>;
[Severity: Low]
Are the LED_FUNCTION_STATUS and LED_COLOR_ID_GREEN macros used here without explicitly including the required <dt-bindings/leds/common.h> header? It looks like the header was mistakenly included in imx7d-var-som.dtsi instead, creating a brittle dependency based on implicit inclusions.
Quoted 5 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +0
-0
[ ... ]
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi line 50
Quoted 10 lines
+&i2c2 {
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +9
-0+ wm8731: audio-codec@1a { + compatible = "wlf,wm8731"; + reg = <0x1a>; + #sound-dai-cells = <0>; + AVDD-supply = <&vgen6_reg>; + DBVDD-supply = <&vgen6_reg>; + DCVDD-supply = <&vgen6_reg>; + HPVDD-supply = <&vgen6_reg>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
[Severity: High]
Does the codec driver incorrectly bind to IMX7D_AUDIO_MCLK_ROOT_DIV instead of the physical SAI1 root clock driving the pin, causing the ASoC driver to read an incorrect frequency?
Quoted 8 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +8
-0+ clock-names = "mclk"; + assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>, + <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <12288000>; + }; +}; +
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi line 68
Quoted 10 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +10
-0+&sai1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_sai1>, <&pinctrl_sai1_mclk>; + pinctrl-1 = <&pinctrl_sai1_sleep>, <&pinctrl_sai1_mclk_sleep>; + assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, + <&clks IMX7D_SAI1_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <36864000>; + status = "okay"; +};
[Severity: High]
Is the sai1 node missing the fsl,sai-mclk-direction-output property, leaving the codec's MCLK pin undriven?
Quoted 5 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8904.dtsi new file +0
-0
[ ... ]
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8904.dtsi line 47
Quoted 6 lines
+&i2c2 {
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8904.dtsi new file +5
-0+ wm8904: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + #sound-dai-cells = <0>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
[Severity: High]
Similar to the wm8731 codec, does this codec driver also incorrectly bind to IMX7D_AUDIO_MCLK_ROOT_DIV instead of the physical SAI1 root clock?
Quoted 7 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +1
-0@@ -0,0 +1,533 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 11
Quoted 10 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +10
-0+/* + * Common dtsi for Variscite VAR-SOM-MX7 + * + * Link: https://variscite.com/system-on-module-som/i-mx-7/var-som-mx7/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +#include <dt-bindings/leds/common.h>
[Severity: Low]
Is this header included but not used in this file? It appears the LED macros are used in imx7d-var-som-mx7customboard.dtsi instead.
[ ... ]
Quoted 7 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +7
-0+&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi line 176
Quoted 10 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som.dtsi new file +10
-0+ status = "okay"; + + pfuze300: pmic@8 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1a { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <3300000>;
[Severity: High]
Is it safe to set regulator-max-microvolt to 3.3V for the VDD_ARM regulator? Since this could allow the PMIC to supply up to 3.3V to the core, does this exceed the i.MX7Dual hardware absolute maximum tolerances (around 1.3V)?
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2
Re: [PATCH v7 2/3] ARM: dts: imx7d: add Variscite VAR-SOM-MX7 support
Quoted 9 lines · On Mon, Aug 31, 2026 at 01:05:06PM +0000, [email protected] wrote:
Quoted 6 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +0
-0[ ... ]
Quoted 15 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi line 50
Quoted 10 lines
+&i2c2 {
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +9
-0+ wm8731: audio-codec@1a { + compatible = "wlf,wm8731"; + reg = <0x1a>; + #sound-dai-cells = <0>; + AVDD-supply = <&vgen6_reg>; + DBVDD-supply = <&vgen6_reg>; + DCVDD-supply = <&vgen6_reg>; + HPVDD-supply = <&vgen6_reg>; + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;[Severity: High]
Does the codec driver incorrectly bind toIMX7D_AUDIO_MCLK_ROOT_DIVinstead of the physical SAI1 root clock driving the pin, causing the ASoC driver to read an incorrect frequency?
IMX7D_AUDIO_MCLK_ROOT_DIV is intentional here.
The codec MCLK is provided by the dedicated audio MCLK root, while the SAI1 root clock is configured separately for the SAI interface. This configuration has also been validated on the hardware.
Quoted 15 lines
Quoted 15 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +14
-0+ clock-names = "mclk"; + assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>, + <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; + assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <12288000>; + }; +}; + +&sai1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_sai1>, <&pinctrl_sai1_mclk>; + pinctrl-1 = <&pinctrl_sai1_sleep>, <&pinctrl_sai1_mclk_sleep>; + assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, + <&clks IMX7D_SAI1_ROOT_CLK>;
Quoted 9 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi line 68
Quoted 4 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +4
-0+ assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; + assigned-clock-rates = <0>, <36864000>; + status = "okay"; +};[Severity: High]
Is the sai1 node missing the fsl,sai-mclk-direction-output property, leaving the codec's MCLK pin undriven?
This is intentional. fsl,sai-mclk-direction-output is optional and is not required for this hardware configuration.
The SAI1 MCLK pinmux and current clock setup have been validated on the board without this property.
Quoted 15 lines
Quoted 15 lines
+&i2c1 {
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +13
-0+ clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pfuze300: pmic@8 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + + regulators {
Quoted 8 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi
Quoted 3 lines
arch/arm/boot/dts/nxp/imx/imx7d-var-som-wm8731.dtsi new file +3
-0+ sw1a_reg: sw1a { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <3300000>;[Severity: High]
Is it safe to set regulator-max-microvolt to 3.3V for theVDD_ARMregulator? Since this could allow the PMIC to supply up to 3.3V to the core, does this exceed the i.MX7Dual hardware absolute maximum tolerances (around 1.3V)?
This is intentional and matches the existing validated board configuration. The regulator constraints are not used to drive VDD_ARM to 3.3 V during normal operation.
PATCH v7 3/3 ARM: dts: imx7d: add Variscite MX7CustomBoard support
In reply to Stefano RadaelliFrom: Stefano Radaelli <[email protected]>
Add device tree support for the Variscite MX7CustomBoard carrier board with the VAR-SOM-MX7 system on module.
This includes supported board configurations for both VAR-SOM-MX7 hardware revisions, with eMMC and NAND variants, and WM8731 variants for the first hardware revision.
Also add the resulting DTBs to the i.MX7D device tree Makefile.
---v6->v7:
- Added common dtsi for wm8904 codec removing it from base dtsi
v5->v6:
-
v4->v5:
-
v3->v4:
-
v2->v3:
-
v1->v2:
- Fixed commit message
- Fixed model names
arch/arm/boot/dts/nxp/imx/Makefile | 6 +++++ .../imx/imx7d-var-som-emmc-mx7customboard.dts | 23 ++++++++++++++++++ ...x7d-var-som-emmc-wm8731-mx7customboard.dts | 23 ++++++++++++++++++ .../imx/imx7d-var-som-nand-mx7customboard.dts | 23 ++++++++++++++++++ ...x7d-var-som-nand-wm8731-mx7customboard.dts | 23 ++++++++++++++++++ .../imx7d-var-som-v2-emmc-mx7customboard.dts | 24 +++++++++++++++++++ .../imx7d-var-som-v2-nand-mx7customboard.dts | 24 +++++++++++++++++++ 7 files changed, 146 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-wm8731-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-wm8731-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-emmc-mx7customboard.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-nand-mx7customboard.dts
arch/arm/boot/dts/nxp/imx/Makefile +6 -0
@@ -444,6 +444,12 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-sdb-reva.dtb \ imx7d-sdb-sht11.dtb \ imx7d-smegw01.dtb \ + imx7d-var-som-emmc-mx7customboard.dtb \ + imx7d-var-som-emmc-wm8731-mx7customboard.dtb \ + imx7d-var-som-nand-mx7customboard.dtb \ + imx7d-var-som-nand-wm8731-mx7customboard.dtb \ + imx7d-var-som-v2-emmc-mx7customboard.dtb \ + imx7d-var-som-v2-nand-mx7customboard.dtb \ imx7d-zii-rmu2.dtb \ imx7d-zii-rpu2.dtb \ imx7s-colibri-aster.dtb \
arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-mx7customboard.dts new file +23 -0
@@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * VAR-MX7CustomBoard for VAR-SOM-MX7 with eMMC + * + * Link: https://variscite.com/carrier-boards/var-mx7customboard/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +/dts-v1/; + +#include "imx7d-var-som.dtsi" +#include "imx7d-var-som-emmc.dtsi" +#include "imx7d-var-som-wm8904.dtsi" +#include "imx7d-var-som-mx7customboard.dtsi" + +/ { + model = "Variscite VAR-SOM-MX7 with eMMC & WM8904 on VAR-MX7CustomBoard"; + compatible = "variscite,var-som-imx7d-emmc-mx7customboard", + "variscite,var-som-imx7d", + "fsl,imx7d"; +};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-emmc-wm8731-mx7customboard.dts new file +23 -0
@@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * VAR-MX7CustomBoard for VAR-SOM-MX7 with eMMC and WM8731 + * + * Link: https://variscite.com/carrier-boards/var-mx7customboard/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +/dts-v1/; + +#include "imx7d-var-som.dtsi" +#include "imx7d-var-som-emmc.dtsi" +#include "imx7d-var-som-wm8731.dtsi" +#include "imx7d-var-som-mx7customboard.dtsi" + +/ { + model = "Variscite VAR-SOM-MX7 with eMMC & WM8731 on VAR-MX7CustomBoard"; + compatible = "variscite,var-som-imx7d-emmc-wm8731-mx7customboard", + "variscite,var-som-imx7d", + "fsl,imx7d"; +};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-mx7customboard.dts new file +23 -0
@@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * VAR-MX7CustomBoard for VAR-SOM-MX7 with NAND + * + * Link: https://variscite.com/carrier-boards/var-mx7customboard/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +/dts-v1/; + +#include "imx7d-var-som.dtsi" +#include "imx7d-var-som-nand.dtsi" +#include "imx7d-var-som-wm8904.dtsi" +#include "imx7d-var-som-mx7customboard.dtsi" + +/ { + model = "Variscite VAR-SOM-MX7 with NAND flash & WM8904 on VAR-MX7CustomBoard"; + compatible = "variscite,var-som-imx7d-nand-mx7customboard", + "variscite,var-som-imx7d", + "fsl,imx7d"; +};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-nand-wm8731-mx7customboard.dts new file +23 -0
@@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * VAR-MX7CustomBoard for VAR-SOM-MX7 with NAND and WM8731 + * + * Link: https://variscite.com/carrier-boards/var-mx7customboard/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +/dts-v1/; + +#include "imx7d-var-som.dtsi" +#include "imx7d-var-som-nand.dtsi" +#include "imx7d-var-som-wm8731.dtsi" +#include "imx7d-var-som-mx7customboard.dtsi" + +/ { + model = "Variscite VAR-SOM-MX7 with NAND flash & WM8731 on VAR-MX7CustomBoard"; + compatible = "variscite,var-som-imx7d-nand-wm8731-mx7customboard", + "variscite,var-som-imx7d", + "fsl,imx7d"; +};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-emmc-mx7customboard.dts new file +24 -0
@@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * VAR-MX7CustomBoard for VAR-SOM-MX7 V2 with eMMC + * + * Link: https://variscite.com/carrier-boards/var-mx7customboard/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +/dts-v1/; + +#include "imx7d-var-som.dtsi" +#include "imx7d-var-som-v2.dtsi" +#include "imx7d-var-som-emmc.dtsi" +#include "imx7d-var-som-wm8904.dtsi" +#include "imx7d-var-som-mx7customboard.dtsi" + +/ { + model = "Variscite VAR-SOM-MX7-5G_V2 with eMMC & WM8904 on VAR-MX7CustomBoard"; + compatible = "variscite,var-som-imx7d-v2-emmc-mx7customboard", + "variscite,var-som-imx7d-v2", + "fsl,imx7d"; +};
arch/arm/boot/dts/nxp/imx/imx7d-var-som-v2-nand-mx7customboard.dts new file +24 -0
@@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * VAR-MX7CustomBoard for VAR-SOM-MX7 V2 with NAND + * + * Link: https://variscite.com/carrier-boards/var-mx7customboard/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * + */ + +/dts-v1/; + +#include "imx7d-var-som.dtsi" +#include "imx7d-var-som-v2.dtsi" +#include "imx7d-var-som-nand.dtsi" +#include "imx7d-var-som-wm8904.dtsi" +#include "imx7d-var-som-mx7customboard.dtsi" + +/ { + model = "Variscite VAR-SOM-MX7-5G_V2 with NAND flash & WM8904 on VAR-MX7CustomBoard"; + compatible = "variscite,var-som-imx7d-v2-nand-mx7customboard", + "variscite,var-som-imx7d-v2", + "fsl,imx7d"; +};
Signature · 1 line
2.47.3